Merge branch 'feature/c3_master_unit_test' into 'master'

C3: build unit tests for C3

See merge request espressif/esp-idf!11856
This commit is contained in:
Angus Gratton
2021-01-11 18:11:06 +08:00
23 changed files with 138 additions and 48 deletions

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@@ -56,6 +56,8 @@ TEST_CASE("can use std::vector", "[cxx]")
#define LEAKS "300"
#elif CONFIG_IDF_TARGET_ESP32S2
#define LEAKS "800"
#elif CONFIG_IDF_TARGET_ESP32C3
#define LEAKS "600"
#else
#error "unknown target in CXX tests, can't set leaks threshold"
#endif

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@@ -185,9 +185,12 @@ PriorityInitTest g_static_init_priority_test3;
PriorityInitTest g_static_init_priority_test2 __attribute__((init_priority(1000)));
PriorityInitTest g_static_init_priority_test1 __attribute__((init_priority(999)));
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
// TODO ESP32C3 IDF-2206
TEST_CASE("init_priority extension works", "[cxx]")
{
TEST_ASSERT_EQUAL(0, g_static_init_priority_test1.index);
TEST_ASSERT_EQUAL(1, g_static_init_priority_test2.index);
TEST_ASSERT_EQUAL(2, g_static_init_priority_test3.index);
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)

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@@ -15,6 +15,7 @@
#include "esp_event_internal.h"
#include "esp_heap_caps.h"
#include "esp_timer.h"
#include "sdkconfig.h"
#include "unity.h"

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@@ -6,6 +6,7 @@
#include "esp_wifi_netif.h"
#include <string.h>
TEST_CASE("esp_netif: init and destroy", "[esp_netif]")
{
esp_netif_config_t cfg = ESP_NETIF_DEFAULT_WIFI_STA();

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@@ -185,7 +185,7 @@ TEST_CASE("Test ring buffer No-Split", "[esp_ringbuf]")
}
//Write pointer should be near the end, test wrap around
uint32_t write_pos_before, write_pos_after;
UBaseType_t write_pos_before, write_pos_after;
vRingbufferGetInfo(buffer_handle, NULL, NULL, &write_pos_before, NULL, NULL);
//Send large item that causes wrap around
send_item_and_check(buffer_handle, large_item, LARGE_ITEM_SIZE, TIMEOUT_TICKS, false);
@@ -216,7 +216,7 @@ TEST_CASE("Test ring buffer Allow-Split", "[esp_ringbuf]")
}
//Write pointer should be near the end, test wrap around
uint32_t write_pos_before, write_pos_after;
UBaseType_t write_pos_before, write_pos_after;
vRingbufferGetInfo(buffer_handle, NULL, NULL, &write_pos_before, NULL, NULL);
//Send large item that causes wrap around
send_item_and_check(buffer_handle, large_item, LARGE_ITEM_SIZE, TIMEOUT_TICKS, false);
@@ -247,7 +247,7 @@ TEST_CASE("Test ring buffer Byte Buffer", "[esp_ringbuf]")
}
//Write pointer should be near the end, test wrap around
uint32_t write_pos_before, write_pos_after;
UBaseType_t write_pos_before, write_pos_after;
vRingbufferGetInfo(buffer_handle, NULL, NULL, &write_pos_before, NULL, NULL);
//Send large item that causes wrap around
send_item_and_check(buffer_handle, large_item, LARGE_ITEM_SIZE, TIMEOUT_TICKS, false);

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@@ -18,6 +18,7 @@
#include "sdkconfig.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3,ESP32C3)
// TODO ESP32-C3 IDF-2585
#define TIMER_DIVIDER 16 /*!< Hardware timer clock divider */
#define TIMER_SCALE (TIMER_BASE_CLK / TIMER_DIVIDER) /*!< used to calculate counter value */
@@ -354,4 +355,4 @@ TEST_CASE("alloc and free isr handle on different core", "[intr_alloc]")
}
#endif
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#endif // #if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)

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@@ -9,7 +9,8 @@
#include "esp_sleep.h"
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3) // IDF-1780 ESP32-S3 Deep sleep and light sleep
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3) // IDF-1780 ESP32-S3 Deep sleep and light sleep
// TODO ESP32-C3 IDF-2571
static void timer_cb1(void *arg)
{
@@ -49,4 +50,4 @@ TEST_CASE("Test the periodic timer does not handle lost events during light slee
TEST_ESP_OK(esp_timer_delete(periodic_timer));
}
#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)

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@@ -24,11 +24,9 @@ extern void IRAM_ATTR spi_flash_enable_interrupts_caches_and_other_cpu(void);
//Functions in librtc.a called by WIFI or Blutooth directly in ISR
#if SOC_BT_SUPPORTED
extern void bt_bb_init_cmplx_reg(void);
extern void bt_track_pll_cap(void);
#endif
extern void force_wifi_mode(int);
extern void unforce_wifi_mode(void);
static const char* TAG = "test_phy_rtc";
@@ -56,6 +54,10 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg)
{
test_phy_rtc_init();
#if CONFIG_IDF_TARGET_ESP32
extern void force_wifi_mode(int);
extern void unforce_wifi_mode(void);
for (int i = 0; i < 2; i++) {
ESP_LOGI(TAG, "Test force_wifi_mode(%d)...", i);
spi_flash_disable_interrupts_caches_and_other_cpu();
@@ -67,18 +69,38 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg)
unforce_wifi_mode();
spi_flash_enable_interrupts_caches_and_other_cpu();
}
#endif //CONFIG_IDF_TARGET_ESP32
#if SOC_BT_SUPPORTED
ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()...");
spi_flash_disable_interrupts_caches_and_other_cpu();
bt_bb_init_cmplx_reg();
spi_flash_enable_interrupts_caches_and_other_cpu();
ESP_LOGI(TAG, "Test bt_track_pll_cap()...");
spi_flash_disable_interrupts_caches_and_other_cpu();
bt_track_pll_cap();
spi_flash_enable_interrupts_caches_and_other_cpu();
#endif
#if CONFIG_IDF_TARGET_ESP32
extern void bt_bb_init_cmplx_reg(void);
ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()...");
spi_flash_disable_interrupts_caches_and_other_cpu();
bt_bb_init_cmplx_reg();
spi_flash_enable_interrupts_caches_and_other_cpu();
#endif //CONFIG_IDF_TARGET_ESP32
#if CONFIG_IDF_TARGET_ESP32C3
extern void bt_bb_v2_init_cmplx(int print_version);
ESP_LOGI(TAG, "Test bt_bb_v2_init_cmplx()...");
spi_flash_disable_interrupts_caches_and_other_cpu();
bt_bb_v2_init_cmplx(0);
spi_flash_enable_interrupts_caches_and_other_cpu();
extern void coex_pti_v2(void);
ESP_LOGI(TAG, "Test coex_pti_v2()...");
spi_flash_disable_interrupts_caches_and_other_cpu();
coex_pti_v2();
spi_flash_enable_interrupts_caches_and_other_cpu();
#endif //CONFIG_IDF_TARGET_ESP32C3
#endif //SOC_BT_SUPPORTED
TEST_ASSERT( xSemaphoreGive(semphr_done) );
@@ -89,12 +111,11 @@ TEST_CASE("Test PHY/RTC functions called when cache is disabled", "[phy_rtc][cac
{
semphr_done = xSemaphoreCreateCounting(1, 0);
xTaskCreatePinnedToCore(test_phy_rtc_cache_task, "phy_rtc_test_task", 2048,
xTaskCreatePinnedToCore(test_phy_rtc_cache_task, "phy_rtc_test_task", 3072,
NULL, configMAX_PRIORITIES-1, NULL, 0);
TEST_ASSERT( xSemaphoreTake(semphr_done, portMAX_DELAY) );
vSemaphoreDelete(semphr_done);
}
#endif
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)

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@@ -23,7 +23,8 @@
#define EVENT_HANDLER_FLAG_DO_NOT_AUTO_RECONNECT 0x00000001
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
/* TODO ESP32-S2 IDF-2618, TODO ESP32-C3 IDF-2618 */
static const char* TAG = "test_wifi";
static uint32_t wifi_event_handler_flag;
@@ -342,4 +343,4 @@ static void test_wifi_connection_softap(void)
TEST_CASE_MULTIPLE_DEVICES("test wifi retain connection for 60s", "[wifi][test_env=UT_T2_1][timeout=90]", test_wifi_connection_sta, test_wifi_connection_softap);
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)

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@@ -307,7 +307,7 @@ TEST_CASE("(SD) opendir, readdir, rewinddir, seekdir work as expected using UTF-
#endif //SDMMC HOST SUPPORTED
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
//no runners
static void sdspi_speed_test(void *buf, size_t buf_size, size_t file_size, bool write);
@@ -373,4 +373,4 @@ static void sdspi_speed_test(void *buf, size_t buf_size, size_t file_size, bool
TEST_ESP_OK(esp_vfs_fat_sdcard_unmount(path, card));
}
#endif
#endif //TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)

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@@ -89,6 +89,9 @@ TEST_CASE("Suspend/resume task on other core", "[freertos]")
}
#endif
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
// TODO ESP32C3 IDF-2588
/* Task suspends itself, then sets a flag and deletes itself */
static void task_suspend_self(void *vp_resumed)
{
@@ -115,6 +118,7 @@ TEST_CASE("Suspend the current running task", "[freertos]")
// Shouldn't need any delay here, as task should resume on this CPU immediately
TEST_ASSERT_TRUE(resumed);
}
#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
volatile bool timer_isr_fired;

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@@ -9,7 +9,6 @@
#include "freertos/task.h"
#include "freertos/semphr.h"
#include "freertos/queue.h"
#include "freertos/xtensa_api.h"
#include "unity.h"
#include "esp_heap_caps.h"

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@@ -66,7 +66,7 @@ static void test_bignum_mult_variant(const char *a_str, const char *b_str, const
#ifdef CONFIG_MBEDTLS_HARDWARE_MPI
/* if mod_bits arg is set, also do a esp_mpi_mul_mod() call */
if (mod_bits > 0) {
if (mod_bits > 0 && mod_bits <= SOC_RSA_MAX_BIT_LEN) {
mbedtls_mpi_init(&M);
for(int i = 0; i < mod_bits; i++) {
mbedtls_mpi_set_bit(&M, i, 1);

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@@ -154,6 +154,7 @@ void tskRunSHASelftests(void *param)
while (1) {}
}
#if SOC_SHA_SUPPORT_SHA512
if (mbedtls_sha512_self_test(1)) {
printf("SHA512 self-tests failed.\n");
while (1) {}
@@ -163,6 +164,7 @@ void tskRunSHASelftests(void *param)
printf("SHA512 self-tests failed.\n");
while (1) {}
}
#endif //SOC_SHA_SUPPORT_SHA512
}
xSemaphoreGive(done_sem);
vTaskDelete(NULL);

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@@ -902,7 +902,9 @@ static void test_write_large_buffer(const esp_partition_t* part, const uint8_t *
read_and_check(part, source, length);
}
#if !CONFIG_SPIRAM
#if !CONFIG_SPIRAM && !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
/* No runners on C3, TODO ESP32-C3 IDF-2399 */
typedef struct {
uint32_t us_start;
size_t len;

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@@ -69,25 +69,6 @@ static int cmp_or_dump(const void *a, const void *b, size_t len)
return r;
}
static void IRAM_ATTR fix_rom_func(void)
{
#ifdef CONFIG_IDF_TARGET_ESP32S2
esp_rom_spiflash_read_mode_t read_mode;
# if defined CONFIG_ESPTOOLPY_FLASHMODE_QIO
read_mode = ESP_ROM_SPIFLASH_QIO_MODE;
# elif defined CONFIG_ESPTOOLPY_FLASHMODE_QOUT
read_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
# elif defined CONFIG_ESPTOOLPY_FLASHMODE_DIO
read_mode = ESP_ROM_SPIFLASH_DIO_MODE;
# elif defined CONFIG_ESPTOOLPY_FLASHMODE_DOUT
read_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
# endif
//Currently only call this can fix the rom_read issue, maybe we need to call more functions (freq, dummy, etc) in the future
spi_flash_disable_interrupts_caches_and_other_cpu();
esp_rom_spiflash_config_readmode(read_mode);
spi_flash_enable_interrupts_caches_and_other_cpu();
#endif
}
static void IRAM_ATTR test_read(int src_off, int dst_off, int len)
{
@@ -160,6 +141,29 @@ TEST_CASE("Test spi_flash_read", "[spi_flash][esp_flash]")
#endif
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
// TODO ESP32C3 IDF-2579
static void IRAM_ATTR fix_rom_func(void)
{
#ifdef CONFIG_IDF_TARGET_ESP32S2
esp_rom_spiflash_read_mode_t read_mode;
# if defined CONFIG_ESPTOOLPY_FLASHMODE_QIO
read_mode = ESP_ROM_SPIFLASH_QIO_MODE;
# elif defined CONFIG_ESPTOOLPY_FLASHMODE_QOUT
read_mode = ESP_ROM_SPIFLASH_QOUT_MODE;
# elif defined CONFIG_ESPTOOLPY_FLASHMODE_DIO
read_mode = ESP_ROM_SPIFLASH_DIO_MODE;
# elif defined CONFIG_ESPTOOLPY_FLASHMODE_DOUT
read_mode = ESP_ROM_SPIFLASH_DOUT_MODE;
# endif
//Currently only call this can fix the rom_read issue, maybe we need to call more functions (freq, dummy, etc) in the future
spi_flash_disable_interrupts_caches_and_other_cpu();
esp_rom_spiflash_config_readmode(read_mode);
spi_flash_enable_interrupts_caches_and_other_cpu();
#endif
}
static void IRAM_ATTR test_write(int dst_off, int src_off, int len)
{
char src_buf[64], dst_gold[64];
@@ -263,6 +267,8 @@ TEST_CASE("Test spi_flash_write", "[spi_flash][esp_flash]")
#endif
}
#endif //TEMPORARY_DISABLED_FOR_TARGETS(ESP32C3)
#ifdef CONFIG_SPIRAM
TEST_CASE("spi_flash_read can read into buffer in external RAM", "[spi_flash]")

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@@ -29,7 +29,16 @@
#include <sys/lock.h>
#include "esp_vfs.h"
#include "esp_err.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/spi_flash.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/spi_flash.h"
#endif
#include "spiffs_api.h"
static const char* TAG = "SPIFFS";

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@@ -14,7 +14,7 @@ using namespace idf;
#if CONFIG_IDF_TARGET_ESP32
#define LEAKS "300"
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
#define LEAKS "800"
#else
#error "unknown target in CXX tests, can't set leaks threshold"

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@@ -59,7 +59,7 @@ TEST_CASE("I2CMaster SDA and SCL equal", "[cxx i2c][leaks=300]")
}
// TODO The I2C driver tests are disabled, so disable them here, too. Probably due to no runners.
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
static void i2c_slave_read_raw_byte(void)
{
@@ -465,6 +465,5 @@ static void i2c_master_reuse_composed_trans(void)
TEST_CASE_MULTIPLE_DEVICES("I2CMaster reuse composed transfer", "[cxx i2c][test_env=UT_T2_I2C][timeout=150]",
i2c_master_reuse_composed_trans, i2c_slave_composed_trans_twice);
#endif //TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2)
#endif //TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
#endif // __cpp_exceptions

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@@ -11,6 +11,7 @@ assign_test:
- build_ssc_esp32
- build_esp_idf_tests_cmake_esp32
- build_esp_idf_tests_cmake_esp32s2
- build_esp_idf_tests_cmake_esp32c3
variables:
SUBMODULES_TO_FETCH: "components/esptool_py/esptool"
EXAMPLE_TEST_DIR: "${CI_PROJECT_DIR}/examples"
@@ -58,6 +59,7 @@ update_test_cases:
needs:
- build_esp_idf_tests_cmake_esp32
- build_esp_idf_tests_cmake_esp32s2
- build_esp_idf_tests_cmake_esp32c3
artifacts:
when: always
paths:

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@@ -134,6 +134,11 @@ build_esp_idf_tests_cmake_esp32s3:
variables:
IDF_TARGET: esp32s3
build_esp_idf_tests_cmake_esp32c3:
extends: .build_esp_idf_tests_cmake
variables:
IDF_TARGET: esp32c3
.build_examples_template:
extends:
- .build_template
@@ -237,6 +242,12 @@ build_test_apps_esp32s3:
variables:
IDF_TARGET: esp32s3
build_test_apps_esp32c3:
extends: .build_test_apps
parallel: 8
variables:
IDF_TARGET: esp32c3
.build_component_ut:
extends:
- .build_test_apps
@@ -255,6 +266,11 @@ build_component_ut_esp32s2:
variables:
IDF_TARGET: esp32s2
build_component_ut_esp32c3:
extends: .build_component_ut
variables:
IDF_TARGET: esp32c3
.build_docs_template:
stage: build
image: $ESP_IDF_DOC_ENV_IMAGE

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@@ -41,8 +41,11 @@
.if-label-unit_test-s2: &if-label-unit_test-s2
if: '$BOT_LABEL_UNIT_TEST_S2'
.if-label-unit_test-c3: &if-label-unit_test-c3
if: '$BOT_LABEL_UNIT_TEST_C3'
.if-label-unit_test-all_labels: &if-label-unit_test-all_labels
if: '$BOT_LABEL_UNIT_TEST || $BOT_LABEL_UNIT_TEST_32 || $BOT_LABEL_UNIT_TEST_S2'
if: '$BOT_LABEL_UNIT_TEST || $BOT_LABEL_UNIT_TEST_32 || $BOT_LABEL_UNIT_TEST_S2 || $BOT_LABEL_UNIT_TEST_C3'
.if-label-weekend_test: &if-label-weekend_test
if: '$BOT_LABEL_WEEKEND_TEST'
@@ -193,6 +196,11 @@
- <<: *if-label-unit_test
- <<: *if-label-unit_test-s2
.rules:tests:unit_test_c3:
rules:
- <<: *if-label-unit_test
- <<: *if-label-unit_test-c3
.rules:tests:integration_test:
rules:
- <<: *if-protected-no_label

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@@ -99,6 +99,11 @@
- .unit_test_template
- .rules:tests:unit_test_s2
.unit_test_c3_template:
extends:
- .unit_test_template
- .rules:tests:unit_test_c3 # due to the lack of runners, c3 tests will only be triggered by label
.integration_test_template:
extends:
- .target_test_job_template
@@ -562,6 +567,13 @@ UT_046:
- ESP32_IDF
- UT_T1_GPIO
UT_C3:
extends: .unit_test_c3_template
parallel: 26
tags:
- ESP32C3_IDF
- UT_T1_1
nvs_compatible_test:
extends: .integration_test_template
artifacts: