mirror of
https://github.com/espressif/esp-idf.git
synced 2025-10-03 02:20:57 +02:00
Merge branch 'feat/twai_esp32h4_v5.5' into 'release/v5.5'
fix(twai): busoff and clkout may not available in SOC (v5.5) See merge request espressif/esp-idf!41718
This commit is contained in:
@@ -22,7 +22,7 @@ from pytest_embedded_idf.utils import idf_parametrize
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@idf_parametrize(
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@idf_parametrize(
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'target', ['esp32', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32s2', 'esp32s3', 'esp32p4'], indirect=['target']
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'target', ['esp32', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32s2', 'esp32s3', 'esp32p4'], indirect=['target']
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)
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)
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def test_twai_self(dut: Dut) -> None:
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def test_legacy_twai_self(dut: Dut) -> None:
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dut.run_all_single_board_cases(group='twai-loop-back')
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dut.run_all_single_board_cases(group='twai-loop-back')
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@@ -31,11 +31,11 @@ def fixture_create_socket_can() -> Bus:
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# Set up the socket CAN with the bitrate
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# Set up the socket CAN with the bitrate
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start_command = 'sudo ip link set can0 up type can bitrate 250000 restart-ms 100'
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start_command = 'sudo ip link set can0 up type can bitrate 250000 restart-ms 100'
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stop_command = 'sudo ip link set can0 down'
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stop_command = 'sudo ip link set can0 down'
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subprocess.run(start_command, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE, text=True)
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subprocess.run(start_command, shell=True, capture_output=True, text=True)
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bus = Bus(interface='socketcan', channel='can0', bitrate=250000)
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bus = Bus(interface='socketcan', channel='can0', bitrate=250000)
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yield bus # test invoked here
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yield bus # test invoked here
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bus.shutdown()
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bus.shutdown()
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subprocess.run(stop_command, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE, text=True)
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subprocess.run(stop_command, shell=True, capture_output=True, text=True)
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@pytest.mark.twai_std
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@pytest.mark.twai_std
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@@ -49,7 +49,7 @@ def fixture_create_socket_can() -> Bus:
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@idf_parametrize(
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@idf_parametrize(
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'target', ['esp32', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32s2', 'esp32s3', 'esp32p4'], indirect=['target']
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'target', ['esp32', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32s2', 'esp32s3', 'esp32p4'], indirect=['target']
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)
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)
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def test_twai_listen_only(dut: Dut, socket_can: Bus) -> None:
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def test_legacy_twai_listen_only(dut: Dut, socket_can: Bus) -> None:
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dut.serial.hard_reset()
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dut.serial.hard_reset()
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dut.expect_exact('Press ENTER to see the list of tests')
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dut.expect_exact('Press ENTER to see the list of tests')
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@@ -79,7 +79,7 @@ def test_twai_listen_only(dut: Dut, socket_can: Bus) -> None:
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@idf_parametrize(
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@idf_parametrize(
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'target', ['esp32', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32s2', 'esp32s3', 'esp32p4'], indirect=['target']
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'target', ['esp32', 'esp32c3', 'esp32c6', 'esp32h2', 'esp32s2', 'esp32s3', 'esp32p4'], indirect=['target']
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)
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)
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def test_twai_remote_request(dut: Dut, socket_can: Bus) -> None:
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def test_legacy_twai_remote_request(dut: Dut, socket_can: Bus) -> None:
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dut.serial.hard_reset()
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dut.serial.hard_reset()
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dut.expect_exact('Press ENTER to see the list of tests')
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dut.expect_exact('Press ENTER to see the list of tests')
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@@ -123,6 +123,8 @@ static esp_err_t _node_config_io(twai_onchip_ctx_t *node, const twai_onchip_node
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ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(node_config->io_cfg.tx), ESP_ERR_INVALID_ARG, TAG, "Invalid tx gpio num");
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ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(node_config->io_cfg.tx), ESP_ERR_INVALID_ARG, TAG, "Invalid tx gpio num");
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ESP_RETURN_ON_FALSE(GPIO_IS_VALID_GPIO(node_config->io_cfg.rx), ESP_ERR_INVALID_ARG, TAG, "Invalid rx gpio num");
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ESP_RETURN_ON_FALSE(GPIO_IS_VALID_GPIO(node_config->io_cfg.rx), ESP_ERR_INVALID_ARG, TAG, "Invalid rx gpio num");
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uint64_t reserve_mask = BIT64(node_config->io_cfg.tx);
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uint64_t reserve_mask = BIT64(node_config->io_cfg.tx);
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ESP_RETURN_ON_FALSE(!(GPIO_IS_VALID_OUTPUT_GPIO(node_config->io_cfg.quanta_clk_out) && (twai_controller_periph_signals.controllers[node->ctrlr_id].clk_out_sig < 0)), ESP_ERR_NOT_SUPPORTED, TAG, "quanta_clk_out is not supported");
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ESP_RETURN_ON_FALSE(!(GPIO_IS_VALID_OUTPUT_GPIO(node_config->io_cfg.bus_off_indicator) && (twai_controller_periph_signals.controllers[node->ctrlr_id].bus_off_sig < 0)), ESP_ERR_NOT_SUPPORTED, TAG, "bus_off_indicator is not supported");
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// Set RX pin
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// Set RX pin
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gpio_input_enable(node_config->io_cfg.rx);
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gpio_input_enable(node_config->io_cfg.rx);
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@@ -29,7 +29,7 @@ static IRAM_ATTR bool test_driver_install_rx_cb(twai_node_handle_t handle, const
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{
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{
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twai_frame_t rx_frame = {0};
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twai_frame_t rx_frame = {0};
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if (ESP_OK == twai_node_receive_from_isr(handle, &rx_frame)) {
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if (ESP_OK == twai_node_receive_from_isr(handle, &rx_frame)) {
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ESP_EARLY_LOGI("Recv ", "id 0x%lx rtr %d", rx_frame.header.id, rx_frame.header.rtr);
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esp_rom_printf("Recv id 0x%lx rtr %d", rx_frame.header.id, rx_frame.header.rtr);
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}
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}
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if (rx_frame.header.id != 0x100) {
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if (rx_frame.header.id != 0x100) {
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TEST_FAIL(); //callback is unregistered, should not run here
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TEST_FAIL(); //callback is unregistered, should not run here
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@@ -111,6 +111,8 @@ static void test_twai_baudrate_correctness(twai_clock_source_t clk_src, uint32_t
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.clk_src = clk_src,
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.clk_src = clk_src,
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.rx = TEST_TX_GPIO,
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.io_cfg.rx = TEST_TX_GPIO,
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.io_cfg.quanta_clk_out = GPIO_NUM_NC,
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.io_cfg.bus_off_indicator = GPIO_NUM_NC,
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.bit_timing.bitrate = test_bitrate,
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.bit_timing.bitrate = test_bitrate,
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.tx_queue_depth = 1,
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.tx_queue_depth = 1,
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.flags.enable_loopback = true,
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.flags.enable_loopback = true,
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@@ -67,6 +67,8 @@ TEST_CASE("twai range filter (loopback)", "[twai]")
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twai_onchip_node_config_t node_config = {
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twai_onchip_node_config_t node_config = {
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.rx = TEST_TX_GPIO, // Using same pin for test without transceiver
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.io_cfg.rx = TEST_TX_GPIO, // Using same pin for test without transceiver
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.io_cfg.quanta_clk_out = GPIO_NUM_NC,
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.io_cfg.bus_off_indicator = GPIO_NUM_NC,
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.bit_timing.bitrate = 1000000,
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.bit_timing.bitrate = 1000000,
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.tx_queue_depth = TEST_TWAI_QUEUE_DEPTH,
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.tx_queue_depth = TEST_TWAI_QUEUE_DEPTH,
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.flags.enable_loopback = true,
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.flags.enable_loopback = true,
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@@ -142,6 +144,8 @@ TEST_CASE("twai fd transmit time (loopback)", "[twai]")
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twai_onchip_node_config_t node_config = {
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twai_onchip_node_config_t node_config = {
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.rx = TEST_TX_GPIO, // Using same pin for test without transceiver
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.io_cfg.rx = TEST_TX_GPIO, // Using same pin for test without transceiver
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.io_cfg.quanta_clk_out = GPIO_NUM_NC,
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.io_cfg.bus_off_indicator = GPIO_NUM_NC,
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.bit_timing.bitrate = 1000000,
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.bit_timing.bitrate = 1000000,
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.data_timing.bitrate = 4000000,
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.data_timing.bitrate = 4000000,
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.data_timing.ssp_permill = 700, // ssp 70.0%
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.data_timing.ssp_permill = 700, // ssp 70.0%
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@@ -31,6 +31,8 @@ TEST_CASE("twai_listen_only", "[twai_net]")
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twai_onchip_node_config_t node_config = {
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twai_onchip_node_config_t node_config = {
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.rx = TEST_RX_GPIO,
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.io_cfg.rx = TEST_RX_GPIO,
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.io_cfg.quanta_clk_out = GPIO_NUM_NC,
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.io_cfg.bus_off_indicator = GPIO_NUM_NC,
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.bit_timing.bitrate = 250000,
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.bit_timing.bitrate = 250000,
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.tx_queue_depth = 3,
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.tx_queue_depth = 3,
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.flags.enable_listen_only = true,
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.flags.enable_listen_only = true,
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@@ -72,6 +74,8 @@ TEST_CASE("twai_remote_request", "[twai_net]")
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twai_onchip_node_config_t node_config = {
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twai_onchip_node_config_t node_config = {
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.tx = TEST_TX_GPIO,
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.io_cfg.rx = TEST_RX_GPIO,
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.io_cfg.rx = TEST_RX_GPIO,
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.io_cfg.quanta_clk_out = GPIO_NUM_NC,
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.io_cfg.bus_off_indicator = GPIO_NUM_NC,
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.bit_timing.bitrate = 250000,
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.bit_timing.bitrate = 250000,
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.fail_retry_cnt = -1, // retry forever if send remote frame failed
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.fail_retry_cnt = -1, // retry forever if send remote frame failed
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.tx_queue_depth = 3,
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.tx_queue_depth = 3,
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@@ -26,13 +26,13 @@ def fixture_create_socket_can() -> Bus:
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start_command = 'sudo ip link set can0 up type can bitrate 250000'
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start_command = 'sudo ip link set can0 up type can bitrate 250000'
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stop_command = 'sudo ip link set can0 down'
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stop_command = 'sudo ip link set can0 down'
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try:
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try:
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subprocess.run(start_command, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE, text=True)
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subprocess.run(start_command, shell=True, capture_output=True, text=True)
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except Exception as e:
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except Exception as e:
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print(f'Open bus Error: {e}')
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print(f'Open bus Error: {e}')
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bus = Bus(interface='socketcan', channel='can0', bitrate=250000)
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bus = Bus(interface='socketcan', channel='can0', bitrate=250000)
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yield bus # test invoked here
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yield bus # test invoked here
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bus.shutdown()
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bus.shutdown()
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subprocess.run(stop_command, shell=True, stdout=subprocess.PIPE, stderr=subprocess.PIPE, text=True)
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subprocess.run(stop_command, shell=True, capture_output=True, text=True)
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@pytest.mark.twai_std
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@pytest.mark.twai_std
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@@ -98,7 +98,16 @@ static inline void twaifd_ll_reset_register(uint8_t twai_id)
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*/
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*/
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static inline void twaifd_ll_set_clock_source(uint8_t twai_id, twai_clock_source_t clk_src)
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static inline void twaifd_ll_set_clock_source(uint8_t twai_id, twai_clock_source_t clk_src)
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{
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{
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PCR.twai[twai_id].twai_func_clk_conf.twai_func_clk_sel = (clk_src == TWAI_CLK_SRC_XTAL) ? 0 : 1;
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switch (clk_src) {
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case TWAI_CLK_SRC_PLL_F80M:
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PCR.twai[twai_id].twai_func_clk_conf.twai_func_clk_sel = 1;
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break;
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case TWAI_CLK_SRC_XTAL:
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PCR.twai[twai_id].twai_func_clk_conf.twai_func_clk_sel = 0;
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break;
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default:
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HAL_ASSERT(false);
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}
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}
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}
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/**
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/**
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@@ -149,12 +149,18 @@ ESP_STATIC_ASSERT(sizeof(twai_ll_frame_buffer_t) == 13, "TX/RX buffer type shoul
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*/
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*/
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static inline void twai_ll_enable_bus_clock(int group_id, bool enable)
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static inline void twai_ll_enable_bus_clock(int group_id, bool enable)
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{
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{
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switch (group_id)
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switch (group_id) {
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{
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case 0:
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case 0: HP_SYS_CLKRST.soc_clk_ctrl2.reg_twai0_apb_clk_en = enable; break;
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HP_SYS_CLKRST.soc_clk_ctrl2.reg_twai0_apb_clk_en = enable;
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case 1: HP_SYS_CLKRST.soc_clk_ctrl2.reg_twai1_apb_clk_en = enable; break;
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break;
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case 2: HP_SYS_CLKRST.soc_clk_ctrl2.reg_twai2_apb_clk_en = enable; break;
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case 1:
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default: HAL_ASSERT(false);
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HP_SYS_CLKRST.soc_clk_ctrl2.reg_twai1_apb_clk_en = enable;
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break;
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case 2:
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HP_SYS_CLKRST.soc_clk_ctrl2.reg_twai2_apb_clk_en = enable;
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break;
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default:
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HAL_ASSERT(false);
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}
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}
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}
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}
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@@ -169,17 +175,19 @@ static inline void twai_ll_enable_bus_clock(int group_id, bool enable)
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*/
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*/
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static inline void twai_ll_reset_register(int group_id)
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static inline void twai_ll_reset_register(int group_id)
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{
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{
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switch (group_id)
|
switch (group_id) {
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{
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case 0:
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case 0: HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai0 = 1;
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai0 = 1;
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai0 = 0;
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai0 = 0;
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break;
|
break;
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case 1: HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai1 = 1;
|
case 1:
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai1 = 0;
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai1 = 1;
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break;
|
HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai1 = 0;
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case 2: HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai2 = 1;
|
break;
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai2 = 0;
|
case 2:
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break;
|
HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai2 = 1;
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HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_twai2 = 0;
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break;
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default: HAL_ASSERT(false);
|
default: HAL_ASSERT(false);
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}
|
}
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}
|
}
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@@ -220,21 +228,23 @@ static inline void twai_ll_enable_clock(int group_id, bool en)
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__attribute__((always_inline))
|
__attribute__((always_inline))
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static inline void twai_ll_set_clock_source(int group_id, twai_clock_source_t clk_src)
|
static inline void twai_ll_set_clock_source(int group_id, twai_clock_source_t clk_src)
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{
|
{
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|
// We do not plan to support the TWAI_CLK_SRC_RC_FAST clock source,
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|
// as the accuracy of this clock does not meet the requirements for the baud rate
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|
HAL_ASSERT(clk_src == TWAI_CLK_SRC_XTAL);
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uint32_t clk_id = 0;
|
uint32_t clk_id = 0;
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|
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switch (clk_src) {
|
|
||||||
case TWAI_CLK_SRC_XTAL: clk_id = 0; break;
|
|
||||||
#if SOC_CLK_TREE_SUPPORTED
|
|
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case TWAI_CLK_SRC_RC_FAST: clk_id = 1; break;
|
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||||||
#endif
|
|
||||||
default: HAL_ASSERT(false);
|
|
||||||
}
|
|
||||||
|
|
||||||
switch (group_id) {
|
switch (group_id) {
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case 0: HP_SYS_CLKRST.peri_clk_ctrl115.reg_twai0_clk_src_sel = clk_id; break;
|
case 0:
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case 1: HP_SYS_CLKRST.peri_clk_ctrl115.reg_twai1_clk_src_sel = clk_id; break;
|
HP_SYS_CLKRST.peri_clk_ctrl115.reg_twai0_clk_src_sel = clk_id;
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case 2: HP_SYS_CLKRST.peri_clk_ctrl115.reg_twai2_clk_src_sel = clk_id; break;
|
break;
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default: HAL_ASSERT(false);
|
case 1:
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||||||
|
HP_SYS_CLKRST.peri_clk_ctrl115.reg_twai1_clk_src_sel = clk_id;
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||||||
|
break;
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||||||
|
case 2:
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||||||
|
HP_SYS_CLKRST.peri_clk_ctrl115.reg_twai2_clk_src_sel = clk_id;
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|
break;
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||||||
|
default:
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||||||
|
HAL_ASSERT(false);
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||||||
}
|
}
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||||||
}
|
}
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||||||
|
|
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@@ -542,9 +552,9 @@ __attribute__((always_inline))
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static inline void twai_ll_parse_err_code_cap(twai_dev_t *hw, twai_ll_err_type_t *type, twai_ll_err_dir_t *dir, twai_ll_err_seg_t *seg)
|
static inline void twai_ll_parse_err_code_cap(twai_dev_t *hw, twai_ll_err_type_t *type, twai_ll_err_dir_t *dir, twai_ll_err_seg_t *seg)
|
||||||
{
|
{
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uint32_t ecc = hw->err_code_cap.val;
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uint32_t ecc = hw->err_code_cap.val;
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*type = (twai_ll_err_type_t) ((ecc >> 6) & 0x3);
|
*type = (twai_ll_err_type_t)((ecc >> 6) & 0x3);
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*dir = (twai_ll_err_dir_t) ((ecc >> 5) & 0x1);
|
*dir = (twai_ll_err_dir_t)((ecc >> 5) & 0x1);
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*seg = (twai_ll_err_seg_t) (ecc & 0x1F);
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*seg = (twai_ll_err_seg_t)(ecc & 0x1F);
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||||||
}
|
}
|
||||||
|
|
||||||
/* ----------------------------- EWL Register ------------------------------- */
|
/* ----------------------------- EWL Register ------------------------------- */
|
||||||
|
@@ -15,9 +15,9 @@ const twai_controller_signal_conn_t twai_controller_periph_signals = {
|
|||||||
.timer_irq_id = ETS_TWAI0_TIMER_INTR_SOURCE,
|
.timer_irq_id = ETS_TWAI0_TIMER_INTR_SOURCE,
|
||||||
.tx_sig = TWAI0_TX_IDX,
|
.tx_sig = TWAI0_TX_IDX,
|
||||||
.rx_sig = TWAI0_RX_IDX,
|
.rx_sig = TWAI0_RX_IDX,
|
||||||
.bus_off_sig = TWAI0_BUS_OFF_ON_IDX,
|
.bus_off_sig = -1,
|
||||||
.clk_out_sig = TWAI0_CLKOUT_IDX,
|
.clk_out_sig = -1,
|
||||||
.stand_by_sig = TWAI0_STANDBY_IDX,
|
.stand_by_sig = -1,
|
||||||
},
|
},
|
||||||
[1] = {
|
[1] = {
|
||||||
.module_name = "TWAI1",
|
.module_name = "TWAI1",
|
||||||
@@ -25,9 +25,9 @@ const twai_controller_signal_conn_t twai_controller_periph_signals = {
|
|||||||
.timer_irq_id = ETS_TWAI1_TIMER_INTR_SOURCE,
|
.timer_irq_id = ETS_TWAI1_TIMER_INTR_SOURCE,
|
||||||
.tx_sig = TWAI1_TX_IDX,
|
.tx_sig = TWAI1_TX_IDX,
|
||||||
.rx_sig = TWAI1_RX_IDX,
|
.rx_sig = TWAI1_RX_IDX,
|
||||||
.bus_off_sig = TWAI1_BUS_OFF_ON_IDX,
|
.bus_off_sig = -1,
|
||||||
.clk_out_sig = TWAI1_CLKOUT_IDX,
|
.clk_out_sig = -1,
|
||||||
.stand_by_sig = TWAI1_STANDBY_IDX,
|
.stand_by_sig = -1,
|
||||||
},
|
},
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
@@ -603,7 +603,6 @@ typedef enum {
|
|||||||
*/
|
*/
|
||||||
typedef enum {
|
typedef enum {
|
||||||
TWAI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
|
TWAI_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
|
||||||
TWAI_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST, /*!< Select RC_FAST as the source clock */
|
|
||||||
TWAI_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default clock choice */
|
TWAI_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the default clock choice */
|
||||||
} soc_periph_twai_clk_src_t;
|
} soc_periph_twai_clk_src_t;
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user