espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-11-02 16:11:41 +01:00
Code Issues Packages Projects Releases Wiki Activity

efuse: Add support for esp32h2

Browse Source
This commit is contained in:
KonstantinKondrashov
2023-02-15 19:09:14 +08:00
committed by BOT
parent cabfc75c3c
commit f3394c488a
24 changed files with 1396 additions and 1084 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
components/hal/esp32h2/efuse_hal.c
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -29,7 +29,7 @@ uint32_t efuse_hal_get_minor_chip_version(void)
void efuse_hal_set_timing(uint32_t apb_freq_hz)
{
(void) apb_freq_hz;
efuse_ll_set_pwr_off_num(0x190);
// keep the default values, no need to change
}
void efuse_hal_read(void)
@@ -78,16 +78,11 @@ bool efuse_hal_is_coding_error_in_block(unsigned block)
}
}
} else if (block <= 10) {
// Fail bit (mask=0x8):
// EFUSE_RD_RS_ERR0_REG: (hi) BLOCK7, BLOCK6, BLOCK5, BLOCK4, BLOCK3, BLOCK2, BLOCK1, ------ (low)
// EFUSE_RD_RS_ERR1_REG: BLOCK9, BLOCK8
// Error num bits (mask=0x7):
// EFUSE_RD_RS_ERR0_REG: (hi) BLOCK8, BLOCK7, BLOCK6, BLOCK5, BLOCK4, BLOCK3, BLOCK2, BLOCK1 (low)
// EFUSE_RD_RS_ERR1_REG: BLOCK10, BLOCK9
// BLOCK10 is not presented in the error regs.
uint32_t err_fail_reg = REG_READ(EFUSE_RD_RS_ERR0_REG + (block / 8) * 4);
uint32_t err_num_reg = REG_READ(EFUSE_RD_RS_ERR0_REG + ((block - 1) / 8) * 4);
return (ESP_EFUSE_BLOCK_ERROR_BITS(err_fail_reg, block % 8) != 0) || (ESP_EFUSE_BLOCK_ERROR_NUM_BITS(err_num_reg, (block - 1) % 8) != 0);
// EFUSE_RD_RS_ERR1_REG: BLOCK10, BLOCK9
block--;
uint32_t error_reg = REG_READ(EFUSE_RD_RS_ERR0_REG + (block / 8) * 4);
return ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block % 8) != 0;
}
return false;
}

44
components/hal/esp32h2/include/hal/efuse_ll.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -18,108 +18,106 @@ extern "C" {
// Always inline these functions even no gcc optimization is applied.
//// ESP32H2-TODO: efuse support IDF-6252
/******************* eFuse fields *************************/
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_flash_crypt_cnt(void)
{
return 0;//EFUSE.rd_repeat_data1.spi_boot_crypt_cnt;
return EFUSE.rd_repeat_data1.spi_boot_crypt_cnt;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_wdt_delay_sel(void)
{
return 0;//EFUSE.rd_repeat_data1.wdt_delay_sel;
return EFUSE.rd_repeat_data1.wdt_delay_sel;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac0(void)
{
return 0;//EFUSE.rd_mac_sys_0;
return EFUSE.rd_mac_sys_0.mac_0;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_mac1(void)
{
return 0;//EFUSE.rd_mac_sys_1.mac_1;
return EFUSE.rd_mac_sys_1.mac_1;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_secure_boot_v2_en(void)
{
return 0;//EFUSE.rd_repeat_data2.secure_boot_en;
return EFUSE.rd_repeat_data2.secure_boot_en;
}
// use efuse_hal_get_major_chip_version() to get major chip version
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_major(void)
{
return 0;//EFUSE.rd_mac_sys_5.wafer_version_major;
return EFUSE.rd_mac_sys_3.wafer_version_major;
}
// use efuse_hal_get_minor_chip_version() to get minor chip version
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_wafer_version_minor(void)
{
return 0;//(EFUSE.rd_mac_sys_5.wafer_version_minor_high << 3) + EFUSE.rd_mac_sys_3.wafer_version_minor_low;
return EFUSE.rd_mac_sys_3.wafer_version_minor;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_disable_wafer_version_major(void)
{
return 0;//EFUSE.rd_repeat_data4.disable_wafer_version_major;
return EFUSE.rd_mac_sys_3.disable_wafer_version_major;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_major(void)
{
return 0;//EFUSE.rd_sys_part1_data4.blk_version_major;
return EFUSE.rd_sys_part1_data4.blk_version_major;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_blk_version_minor(void)
{
return 0;//EFUSE.rd_mac_sys_3.blk_version_minor;
return EFUSE.rd_sys_part1_data4.blk_version_minor;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_disable_blk_version_major(void)
{
return 0;//EFUSE.rd_repeat_data4.disable_blk_version_major;
return EFUSE.rd_sys_part1_data4.disable_blk_version_major;
}
__attribute__((always_inline)) static inline uint32_t efuse_ll_get_chip_ver_pkg(void)
{
return 0;//EFUSE.rd_mac_sys_3.pkg_version;
return EFUSE.rd_mac_sys_4.pkg_version;
}
/******************* eFuse control functions *************************/
__attribute__((always_inline)) static inline bool efuse_ll_get_read_cmd(void)
{
return 0;//EFUSE.cmd.read_cmd;
return EFUSE.cmd.read_cmd;
}
__attribute__((always_inline)) static inline bool efuse_ll_get_pgm_cmd(void)
{
return 0;//EFUSE.cmd.pgm_cmd;
return EFUSE.cmd.pgm_cmd;
}
__attribute__((always_inline)) static inline void efuse_ll_set_read_cmd(void)
{
// EFUSE.cmd.read_cmd = 1;
EFUSE.cmd.read_cmd = 1;
}
__attribute__((always_inline)) static inline void efuse_ll_set_pgm_cmd(uint32_t block)
{
// HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX);
// EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD;
HAL_ASSERT(block < ETS_EFUSE_BLOCK_MAX);
EFUSE.cmd.val = ((block << EFUSE_BLK_NUM_S) & EFUSE_BLK_NUM_M) | EFUSE_PGM_CMD;
}
__attribute__((always_inline)) static inline void efuse_ll_set_conf_read_op_code(void)
{
// EFUSE.conf.op_code = EFUSE_READ_OP_CODE;
EFUSE.conf.op_code = EFUSE_READ_OP_CODE;
}
__attribute__((always_inline)) static inline void efuse_ll_set_conf_write_op_code(void)
{
// EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE;
EFUSE.conf.op_code = EFUSE_WRITE_OP_CODE;
}
__attribute__((always_inline)) static inline void efuse_ll_set_pwr_off_num(uint16_t value)
{
// EFUSE.wr_tim_conf2.pwr_off_num = value;
EFUSE.wr_tim_conf2.pwr_off_num = value;
}
/******************* eFuse control functions *************************/