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ci: increase parallel UT count for few jobs

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This commit is contained in:
Mahavir Jain
2021-10-12 16:15:26 +05:30
parent 11d9faf38c
commit f441ce977a
1 changed files with 2 additions and 2 deletions
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4
.gitlab/ci/target-test.yml
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@@ -478,7 +478,7 @@ UT_001:
UT_002: UT_002:
extends: .unit_test_esp32_template extends: .unit_test_esp32_template
parallel: 14 parallel: 15
tags: tags:
- ESP32_IDF - ESP32_IDF
- UT_T1_1 - UT_T1_1
@@ -683,7 +683,7 @@ UT_S2_SDSPI:
UT_C3: UT_C3:
extends: .unit_test_esp32c3_template extends: .unit_test_esp32c3_template
parallel: 32 parallel: 33
tags: tags:
- ESP32C3_IDF - ESP32C3_IDF
- UT_T1_1 - UT_T1_1