espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-04 05:04:33 +02:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'bugfix/int_wdt_in_ocd_mode' into 'master'

Browse Source 
panic: prevent INT WDT from re-triggering in OCD mode

See merge request !1764
This commit is contained in:
Angus Gratton
2018-01-16 15:07:26 +08:00
parent f68a059a8c 8e8cb1a139
commit f620a3c4f3
1 changed files with 6 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
components/esp32/panic.c
View File

@@ -165,6 +165,7 @@ static const char *edesc[] = {
#define NUM_EDESCS (sizeof(edesc) / sizeof(char *)) #define NUM_EDESCS (sizeof(edesc) / sizeof(char *))
static void commonErrorHandler(XtExcFrame *frame); static void commonErrorHandler(XtExcFrame *frame);
static inline void disableAllWdts();
//The fact that we've panic'ed probably means the other CPU is now running wild, possibly //The fact that we've panic'ed probably means the other CPU is now running wild, possibly
//messing up the serial output, so we stall it here. //messing up the serial output, so we stall it here.
@@ -257,6 +258,11 @@ void panicHandler(XtExcFrame *frame)
} }
if (esp_cpu_in_ocd_debug_mode()) { if (esp_cpu_in_ocd_debug_mode()) {
disableAllWdts();
if (frame->exccause == PANIC_RSN_INTWDT_CPU0 ||
frame->exccause == PANIC_RSN_INTWDT_CPU1) {
TIMERG1.int_clr_timers.wdt = 1;
}
#if CONFIG_ESP32_APPTRACE_ENABLE #if CONFIG_ESP32_APPTRACE_ENABLE
#if CONFIG_SYSVIEW_ENABLE #if CONFIG_SYSVIEW_ENABLE
SEGGER_RTT_ESP32_FlushNoLock(CONFIG_ESP32_APPTRACE_POSTMORTEM_FLUSH_TRAX_THRESH, APPTRACE_ONPANIC_HOST_FLUSH_TMO); SEGGER_RTT_ESP32_FlushNoLock(CONFIG_ESP32_APPTRACE_POSTMORTEM_FLUSH_TRAX_THRESH, APPTRACE_ONPANIC_HOST_FLUSH_TMO);