diff --git a/components/esp_hw_support/sleep_gpio.c b/components/esp_hw_support/sleep_gpio.c
index 759659d1a9..95dd309574 100644
--- a/components/esp_hw_support/sleep_gpio.c
+++ b/components/esp_hw_support/sleep_gpio.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -21,6 +21,7 @@
 #include "hal/gpio_hal.h"
 #include "hal/rtc_io_hal.h"
 #include "soc/rtc_io_periph.h"
+#include "soc/uart_channel.h"
 
 #if SOC_LP_AON_SUPPORTED
 #include "hal/lp_aon_hal.h"
@@ -101,6 +102,32 @@ void esp_sleep_enable_gpio_switch(bool enable)
     ESP_EARLY_LOGI(TAG, "%s automatic switching of GPIO sleep configuration", enable ? "Enable" : "Disable");
     for (gpio_num_t gpio_num = GPIO_NUM_0; gpio_num < GPIO_NUM_MAX; gpio_num++) {
         if (GPIO_IS_VALID_GPIO(gpio_num)) {
+#if CONFIG_ESP_CONSOLE_UART
+#if CONFIG_ESP_CONSOLE_UART_CUSTOM
+            const int uart_tx_gpio = (CONFIG_ESP_CONSOLE_UART_TX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_TX_GPIO : UART_NUM_0_TXD_DIRECT_GPIO_NUM;
+            const int uart_rx_gpio = (CONFIG_ESP_CONSOLE_UART_RX_GPIO >= 0) ? CONFIG_ESP_CONSOLE_UART_RX_GPIO : UART_NUM_0_RXD_DIRECT_GPIO_NUM;
+            if ((gpio_num == uart_tx_gpio) || (gpio_num == uart_rx_gpio)) {
+#else
+            if ((gpio_num == UART_NUM_0_TXD_DIRECT_GPIO_NUM) || (gpio_num == UART_NUM_0_RXD_DIRECT_GPIO_NUM)) {
+#endif
+                gpio_sleep_sel_dis(gpio_num);
+                continue;
+            }
+#endif
+            /* If the PSRAM is disable in ESP32xx chips equipped with PSRAM, there will be a large current leakage. */
+#if CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM
+            if (gpio_num == esp_mspi_get_io(ESP_MSPI_IO_CS1)) {
+                gpio_sleep_sel_dis(gpio_num);
+                continue;
+            }
+#endif // CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND && CONFIG_SPIRAM
+
+#if CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND
+            if (gpio_num == esp_mspi_get_io(ESP_MSPI_IO_CS0)) {
+                gpio_sleep_sel_dis(gpio_num);
+                continue;
+            }
+#endif // CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND
             if (enable) {
                 gpio_sleep_sel_en(gpio_num);
             } else {
diff --git a/examples/system/light_sleep/main/uart_wakeup.c b/examples/system/light_sleep/main/uart_wakeup.c
index fc882ad2c2..4c2a80027e 100644
--- a/examples/system/light_sleep/main/uart_wakeup.c
+++ b/examples/system/light_sleep/main/uart_wakeup.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Unlicense OR CC0-1.0
  */
@@ -119,10 +119,7 @@ static esp_err_t uart_initialization(void)
 
 static esp_err_t uart_wakeup_config(void)
 {
-    /* UART will wakeup the chip up from light sleep if the edges that RX pin received has reached the threshold
-     * Besides, the Rx pin need extra configuration to enable it can work during light sleep */
-    ESP_RETURN_ON_ERROR(gpio_sleep_set_direction(EXAMPLE_UART_RX_IO_NUM, GPIO_MODE_INPUT), TAG, "Set uart sleep gpio failed");
-    ESP_RETURN_ON_ERROR(gpio_sleep_set_pull_mode(EXAMPLE_UART_RX_IO_NUM, GPIO_PULLUP_ONLY), TAG, "Set uart sleep gpio failed");
+    /* UART will wakeup the chip up from light sleep if the edges that RX pin received has reached the threshold */
     ESP_RETURN_ON_ERROR(uart_set_wakeup_threshold(EXAMPLE_UART_NUM, EXAMPLE_UART_WAKEUP_THRESHOLD),
                         TAG, "Set uart wakeup threshold failed");
     /* Only uart0 and uart1 (if has) support to be configured as wakeup source */