mirror of
https://github.com/espressif/esp-idf.git
synced 2025-11-03 00:21:44 +01:00
Update LEDC, PCNT,Timer_Group driver for esp32s2beta.
This commit is contained in:
@@ -30,7 +30,9 @@ extern "C" {
|
||||
#define LEDC_ERR_VAL (-1)
|
||||
|
||||
typedef enum {
|
||||
#ifdef CONFIG_IDF_TARGET_ESP32
|
||||
LEDC_HIGH_SPEED_MODE = 0, /*!< LEDC high speed speed_mode */
|
||||
#endif
|
||||
LEDC_LOW_SPEED_MODE, /*!< LEDC low speed speed_mode */
|
||||
LEDC_SPEED_MODE_MAX, /*!< LEDC speed limit */
|
||||
} ledc_mode_t;
|
||||
@@ -86,12 +88,14 @@ typedef enum {
|
||||
LEDC_TIMER_12_BIT, /*!< LEDC PWM duty resolution of 12 bits */
|
||||
LEDC_TIMER_13_BIT, /*!< LEDC PWM duty resolution of 13 bits */
|
||||
LEDC_TIMER_14_BIT, /*!< LEDC PWM duty resolution of 14 bits */
|
||||
#ifdef CONFIG_IDF_TARGET_ESP32
|
||||
LEDC_TIMER_15_BIT, /*!< LEDC PWM duty resolution of 15 bits */
|
||||
LEDC_TIMER_16_BIT, /*!< LEDC PWM duty resolution of 16 bits */
|
||||
LEDC_TIMER_17_BIT, /*!< LEDC PWM duty resolution of 17 bits */
|
||||
LEDC_TIMER_18_BIT, /*!< LEDC PWM duty resolution of 18 bits */
|
||||
LEDC_TIMER_19_BIT, /*!< LEDC PWM duty resolution of 19 bits */
|
||||
LEDC_TIMER_20_BIT, /*!< LEDC PWM duty resolution of 20 bits */
|
||||
#endif
|
||||
LEDC_TIMER_BIT_MAX,
|
||||
} ledc_timer_bit_t;
|
||||
|
||||
|
||||
@@ -47,10 +47,13 @@ typedef enum {
|
||||
PCNT_UNIT_1 = 1, /*!< PCNT unit 1 */
|
||||
PCNT_UNIT_2 = 2, /*!< PCNT unit 2 */
|
||||
PCNT_UNIT_3 = 3, /*!< PCNT unit 3 */
|
||||
//ESP32-S2 only have 4 unit
|
||||
#ifdef CONFIG_IDF_TARGET_ESP32
|
||||
PCNT_UNIT_4 = 4, /*!< PCNT unit 4 */
|
||||
PCNT_UNIT_5 = 5, /*!< PCNT unit 5 */
|
||||
PCNT_UNIT_6 = 6, /*!< PCNT unit 6 */
|
||||
PCNT_UNIT_7 = 7, /*!< PCNT unit 7 */
|
||||
#endif
|
||||
PCNT_UNIT_MAX,
|
||||
} pcnt_unit_t;
|
||||
|
||||
@@ -67,11 +70,11 @@ typedef enum {
|
||||
* @brief Selection of counter's events the may trigger an interrupt
|
||||
*/
|
||||
typedef enum {
|
||||
PCNT_EVT_L_LIM = 0, /*!< PCNT watch point event: Minimum counter value */
|
||||
PCNT_EVT_H_LIM = 1, /*!< PCNT watch point event: Maximum counter value */
|
||||
PCNT_EVT_THRES_0 = 2, /*!< PCNT watch point event: threshold0 value event */
|
||||
PCNT_EVT_THRES_1 = 3, /*!< PCNT watch point event: threshold1 value event */
|
||||
PCNT_EVT_ZERO = 4, /*!< PCNT watch point event: counter value zero event */
|
||||
PCNT_EVT_THRES_1 = BIT(2), /*!< PCNT watch point event: threshold1 value event */
|
||||
PCNT_EVT_THRES_0 = BIT(3), /*!< PCNT watch point event: threshold0 value event */
|
||||
PCNT_EVT_L_LIM = BIT(4), /*!< PCNT watch point event: Minimum counter value */
|
||||
PCNT_EVT_H_LIM = BIT(5), /*!< PCNT watch point event: Maximum counter value */
|
||||
PCNT_EVT_ZERO = BIT(6), /*!< PCNT watch point event: counter value zero event */
|
||||
PCNT_EVT_MAX
|
||||
} pcnt_evt_type_t;
|
||||
|
||||
|
||||
@@ -89,6 +89,16 @@ typedef enum {
|
||||
TIMER_AUTORELOAD_MAX,
|
||||
} timer_autoreload_t;
|
||||
|
||||
#ifdef CONFIG_IDF_TARGET_ESP32S2BETA
|
||||
/**
|
||||
* @brief Select timer source clock.
|
||||
*/
|
||||
typedef enum {
|
||||
TIMER_SRC_CLK_APB = 0, /*!< Select APB as the source clock*/
|
||||
TIMER_SRC_CLK_XTAL = 1, /*!< Select XTAL as the source clock*/
|
||||
} timer_src_clk_t;
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Data structure with timer's configuration settings
|
||||
*/
|
||||
@@ -99,6 +109,9 @@ typedef struct {
|
||||
timer_count_dir_t counter_dir; /*!< Counter direction */
|
||||
bool auto_reload; /*!< Timer auto-reload */
|
||||
uint32_t divider; /*!< Counter clock divider. The divider's range is from from 2 to 65536. */
|
||||
#ifdef CONFIG_IDF_TARGET_ESP32S2BETA
|
||||
timer_src_clk_t clk_sel; /*!< Use XTAL as source clock. */
|
||||
#endif
|
||||
} timer_config_t;
|
||||
|
||||
|
||||
|
||||
Reference in New Issue
Block a user