diff --git a/components/bootloader_support/test_apps/.build-test-rules.yml b/components/bootloader_support/test_apps/.build-test-rules.yml index 701cbd5518..1dbe91f913 100644 --- a/components/bootloader_support/test_apps/.build-test-rules.yml +++ b/components/bootloader_support/test_apps/.build-test-rules.yml @@ -4,7 +4,3 @@ components/bootloader_support/test_apps/rtc_custom_section: enable: - if: SOC_RTC_MEM_SUPPORTED == 1 reason: this feature is supported on chips that have RTC memory - disable: - - if: IDF_TARGET == "esp32p4" - temporary: true - reason: this feature on esp32p4 isn't supported yet # TODO: IDF-8069 diff --git a/components/bootloader_support/test_apps/rtc_custom_section/README.md b/components/bootloader_support/test_apps/rtc_custom_section/README.md index 19f1d19a54..a79fcf4c5e 100644 --- a/components/bootloader_support/test_apps/rtc_custom_section/README.md +++ b/components/bootloader_support/test_apps/rtc_custom_section/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_rom/esp32/Kconfig.soc_caps.in b/components/esp_rom/esp32/Kconfig.soc_caps.in index c53676fa51..1e2fb931a3 100644 --- a/components/esp_rom/esp32/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32/Kconfig.soc_caps.in @@ -30,3 +30,7 @@ config ESP_ROM_NEEDS_SWSETUP_WORKAROUND config ESP_ROM_HAS_NEWLIB_NANO_FORMAT bool default y + +config ESP_ROM_HAS_SW_FLOAT + bool + default y diff --git a/components/esp_rom/esp32/esp_rom_caps.h b/components/esp_rom/esp32/esp_rom_caps.h index e9473e4f23..f072c6cc8f 100644 --- a/components/esp_rom/esp32/esp_rom_caps.h +++ b/components/esp_rom/esp32/esp_rom_caps.h @@ -13,3 +13,4 @@ #define ESP_ROM_HAS_UART_BUF_SWITCH (1) // ROM has exported the uart buffer switch function #define ESP_ROM_NEEDS_SWSETUP_WORKAROUND (1) // ROM uses 32-bit time_t. A workaround is required to prevent printf functions from crashing #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT (1) // ROM has the newlib nano version of formatting functions +#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions diff --git a/components/esp_rom/esp32c2/Kconfig.soc_caps.in b/components/esp_rom/esp32c2/Kconfig.soc_caps.in index 752cf25be6..0a73025f75 100644 --- a/components/esp_rom/esp32c2/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c2/Kconfig.soc_caps.in @@ -66,3 +66,7 @@ config ESP_ROM_RAM_APP_NEEDS_MMU_INIT config ESP_ROM_HAS_MBEDTLS_CRYPTO_LIB bool default y + +config ESP_ROM_HAS_SW_FLOAT + bool + default y diff --git a/components/esp_rom/esp32c2/esp_rom_caps.h b/components/esp_rom/esp32c2/esp_rom_caps.h index 8eacb1616c..dadfd9f4ff 100644 --- a/components/esp_rom/esp32c2/esp_rom_caps.h +++ b/components/esp_rom/esp32c2/esp_rom_caps.h @@ -22,3 +22,4 @@ #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap #define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init #define ESP_ROM_HAS_MBEDTLS_CRYPTO_LIB (1) // ROM has the mbedtls crypto algorithm lib +#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions diff --git a/components/esp_rom/esp32c3/Kconfig.soc_caps.in b/components/esp_rom/esp32c3/Kconfig.soc_caps.in index 03b25e62ee..ba3797fccf 100644 --- a/components/esp_rom/esp32c3/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c3/Kconfig.soc_caps.in @@ -66,3 +66,7 @@ config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE config ESP_ROM_RAM_APP_NEEDS_MMU_INIT bool default y + +config ESP_ROM_HAS_SW_FLOAT + bool + default y diff --git a/components/esp_rom/esp32c3/esp_rom_caps.h b/components/esp_rom/esp32c3/esp_rom_caps.h index 8ff06b7601..0bf8742c40 100644 --- a/components/esp_rom/esp32c3/esp_rom_caps.h +++ b/components/esp_rom/esp32c3/esp_rom_caps.h @@ -22,3 +22,4 @@ #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT (1) // ROM has the newlib nano version of formatting functions #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap #define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init +#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions diff --git a/components/esp_rom/esp32c6/Kconfig.soc_caps.in b/components/esp_rom/esp32c6/Kconfig.soc_caps.in index 9e23f349b7..8263e12821 100644 --- a/components/esp_rom/esp32c6/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32c6/Kconfig.soc_caps.in @@ -78,3 +78,7 @@ config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE config ESP_ROM_RAM_APP_NEEDS_MMU_INIT bool default y + +config ESP_ROM_HAS_SW_FLOAT + bool + default y diff --git a/components/esp_rom/esp32c6/esp_rom_caps.h b/components/esp_rom/esp32c6/esp_rom_caps.h index 1ec2d87239..1abd21f34b 100644 --- a/components/esp_rom/esp32c6/esp_rom_caps.h +++ b/components/esp_rom/esp32c6/esp_rom_caps.h @@ -25,3 +25,4 @@ #define ESP_ROM_WDT_INIT_PATCH (1) // ROM version does not configure the clock #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap #define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init +#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions diff --git a/components/esp_rom/esp32h2/Kconfig.soc_caps.in b/components/esp_rom/esp32h2/Kconfig.soc_caps.in index a5b8f87971..d6871ae560 100644 --- a/components/esp_rom/esp32h2/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32h2/Kconfig.soc_caps.in @@ -66,3 +66,7 @@ config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE config ESP_ROM_RAM_APP_NEEDS_MMU_INIT bool default y + +config ESP_ROM_HAS_SW_FLOAT + bool + default y diff --git a/components/esp_rom/esp32h2/esp_rom_caps.h b/components/esp_rom/esp32h2/esp_rom_caps.h index 321ab91b8e..9c2377176a 100644 --- a/components/esp_rom/esp32h2/esp_rom_caps.h +++ b/components/esp_rom/esp32h2/esp_rom_caps.h @@ -22,3 +22,4 @@ #define ESP_ROM_WDT_INIT_PATCH (1) // ROM version does not configure the clock #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap #define ESP_ROM_RAM_APP_NEEDS_MMU_INIT (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init +#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions diff --git a/components/esp_rom/esp32s2/Kconfig.soc_caps.in b/components/esp_rom/esp32s2/Kconfig.soc_caps.in index c748eef166..c8dc1b24b9 100644 --- a/components/esp_rom/esp32s2/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32s2/Kconfig.soc_caps.in @@ -34,3 +34,7 @@ config ESP_ROM_USB_OTG_NUM config ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG bool default y + +config ESP_ROM_HAS_SW_FLOAT + bool + default y diff --git a/components/esp_rom/esp32s2/esp_rom_caps.h b/components/esp_rom/esp32s2/esp_rom_caps.h index 100711d827..b80ede21ce 100644 --- a/components/esp_rom/esp32s2/esp_rom_caps.h +++ b/components/esp_rom/esp32s2/esp_rom_caps.h @@ -14,3 +14,4 @@ #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT (1) // ROM has the newlib nano version of formatting functions #define ESP_ROM_USB_OTG_NUM (3) // The serial port ID (UART, USB, ...) of USB_OTG CDC in the ROM. #define ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG (1) // ROM api Cache_Count_Flash_Pages will return unexpected value +#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions diff --git a/components/esp_rom/esp32s3/Kconfig.soc_caps.in b/components/esp_rom/esp32s3/Kconfig.soc_caps.in index 94b178a10e..c0f584018d 100644 --- a/components/esp_rom/esp32s3/Kconfig.soc_caps.in +++ b/components/esp_rom/esp32s3/Kconfig.soc_caps.in @@ -86,3 +86,7 @@ config ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG config ESP_ROM_HAS_CACHE_WRITEBACK_BUG bool default y + +config ESP_ROM_HAS_SW_FLOAT + bool + default y diff --git a/components/esp_rom/esp32s3/esp_rom_caps.h b/components/esp_rom/esp32s3/esp_rom_caps.h index abb4bd39e0..0ad7ed8418 100644 --- a/components/esp_rom/esp32s3/esp_rom_caps.h +++ b/components/esp_rom/esp32s3/esp_rom_caps.h @@ -27,3 +27,4 @@ #define ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG (1) // ROM api Cache_Count_Flash_Pages will return unexpected value #define ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG (1) // ROM api Cache_Suspend_I/DCache and Cache_Freeze_I/DCache_Enable does not waiti #define ESP_ROM_HAS_CACHE_WRITEBACK_BUG (1) // ROM api Cache_WriteBack_Addr address or size misalignment may cause cache hit with wrong value. +#define ESP_ROM_HAS_SW_FLOAT (1) // ROM has libgcc software floating point emulation functions diff --git a/components/esp_rom/test_apps/.build-test-rules.yml b/components/esp_rom/test_apps/.build-test-rules.yml index 5d711a1bc0..15492a369e 100644 --- a/components/esp_rom/test_apps/.build-test-rules.yml +++ b/components/esp_rom/test_apps/.build-test-rules.yml @@ -5,7 +5,3 @@ components/esp_rom/test_apps: - if: IDF_TARGET in ["esp32", "esp32c2"] temporary: false reason: lack of memory for testing miniz compressing - disable: - - if: IDF_TARGET in ["esp32p4"] - temporary: true - reason: Not supported on p4 # TODO: IDF-8071 diff --git a/components/esp_rom/test_apps/rom_tests/README.md b/components/esp_rom/test_apps/rom_tests/README.md index a8b7833fa3..bf47d80ec6 100644 --- a/components/esp_rom/test_apps/rom_tests/README.md +++ b/components/esp_rom/test_apps/rom_tests/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_rom/test_apps/rom_tests/main/test_libgcc.c b/components/esp_rom/test_apps/rom_tests/main/test_libgcc.c index 438b1027ab..c0a0926789 100644 --- a/components/esp_rom/test_apps/rom_tests/main/test_libgcc.c +++ b/components/esp_rom/test_apps/rom_tests/main/test_libgcc.c @@ -5,6 +5,7 @@ */ #include #include "unity.h" +#include "esp_rom_caps.h" TEST_CASE("libgcc math functions", "[rom][libgcc]") { @@ -14,8 +15,6 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") TEST_ASSERT(__absvsi2(-1) == 1); extern double __adddf3(double x, double y); TEST_ASSERT(__adddf3(1.0, 4.0) == 5.0); - extern float __addsf3(float x, float y); - TEST_ASSERT(__addsf3(1.0f, 4.0f) == 5.0f); extern int64_t __addvdi3(int64_t x, int64_t y); TEST_ASSERT(__addvdi3(1L, 4L) == 5L); extern int __addvsi3(int x, int y); @@ -56,8 +55,7 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") TEST_ASSERT(__divsi3(16, 2) == 8); extern int __eqdf2(double x, double y); TEST_ASSERT(__eqdf2(4.0, 4.0) == 0); - extern int __eqsf2(float x, float y); - TEST_ASSERT(__eqsf2(4.0f, 4.0f) == 0); + extern double __extendsfdf2(float x); TEST_ASSERT(__extendsfdf2(4.0f) == 4.0); extern int __ffsdi2(uint64_t x); @@ -70,8 +68,6 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") TEST_ASSERT(__fixdfsi(4.0) == 4); extern int64_t __fixsfdi(float x); TEST_ASSERT(__fixsfdi(4.0f) == 4LL); - extern int __fixsfsi(float x); - TEST_ASSERT(__fixsfsi(4.0f) == 4); extern unsigned __fixunsdfsi(double x); TEST_ASSERT(__fixunsdfsi(16.0) == 16); extern uint64_t __fixunssfdi(float x); @@ -84,34 +80,24 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") TEST_ASSERT(__floatdisf(-1LL) == -1.0f); extern double __floatsidf(int x); TEST_ASSERT(__floatsidf(-1) == -1.0); - extern float __floatsisf(int x); - TEST_ASSERT(__floatsisf(-1) == -1.0f); + extern double __floatundidf(uint64_t x); TEST_ASSERT(__floatundidf(16) == 16.0); extern float __floatundisf(uint64_t x); TEST_ASSERT(__floatundisf(16) == 16.0f); extern double __floatunsidf(unsigned x); TEST_ASSERT(__floatunsidf(16) == 16.0); - extern float __floatunsisf(unsigned x); - TEST_ASSERT(__floatunsisf(16) == 16.0f); extern int __gedf2(double x, double y); - TEST_ASSERT(__gedf2(2.0, 0.0) >= 0); - extern int __gesf2(float x, float y); - TEST_ASSERT(__gesf2(2.0f, 0.0f) >= 0); extern int __gtdf2(double x, double y); TEST_ASSERT(__gtdf2(2.0, 0.0) >= 0); - extern int __gtsf2(float x, float y); - TEST_ASSERT(__gtsf2(2.0f, 0.0f) >= 0); extern int __ledf2(double x, double y); TEST_ASSERT(__ledf2(0.0, 2.0) <= 0); - extern int __lesf2(float x, float y); - TEST_ASSERT(__lesf2(0.0f, 2.0f) <= 0); + extern int64_t __lshrdi3(int64_t x, int y); TEST_ASSERT(__lshrdi3(0x8000000000000000LL, 1) == 0x4000000000000000LL); extern int __ltdf2(double x, double y); TEST_ASSERT(__ltdf2(0.0, 2.0) < 0); - extern int __ltsf2(float x, float y); - TEST_ASSERT(__ltsf2(0.0f, 2.0f) < 0); + extern int64_t __moddi3(int64_t x, int64_t y); TEST_ASSERT(__moddi3(15, 2) == 1); extern int __modsi3(int x, int y); @@ -124,8 +110,7 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") TEST_ASSERT(__muldi3(2, 8) == 16); extern complex float __mulsc3(float a, float b, float c, float d); TEST_ASSERT(__mulsc3(1.0f, 0.0f, 0.0f, -1.0f) == -I); - extern float __mulsf3(float a, float b); - TEST_ASSERT(__mulsf3(2.0f, 8.0f) == 16.0f); + extern int __mulsi3(int x, int y); TEST_ASSERT(__mulsi3(2, 8) == 16); extern int __mulvdi3(int64_t x, int64_t y); @@ -138,14 +123,12 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") TEST_ASSERT(__negdf2(1.0) == -1.0); extern int64_t __negdi2(int64_t x); TEST_ASSERT(__negdi2(-1LL) == 1); - extern float __negsf2(float x); - TEST_ASSERT(__negsf2(-1.0f) == 1.0f); + extern int64_t __negvdi2(int64_t x); TEST_ASSERT(__negvdi2(-1LL) == 1); extern int __negvsi2(int x); TEST_ASSERT(__negvsi2(-1) == 1); - extern int __nesf2(float x, float y); - TEST_ASSERT(__nesf2(2.0, 0.0) != 0); + extern int __paritysi2(unsigned x); TEST_ASSERT(__paritysi2(0x10101010) == 0); extern int __popcountdi2(uint64_t); @@ -158,8 +141,7 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") TEST_ASSERT(__powisf2(2.0f, 2) == 4.0f); extern double __subdf3(double x, double y); TEST_ASSERT(__subdf3(2.0, 1.0) == 1.0); - extern float __subsf3(float x, float y); - TEST_ASSERT(__subsf3(5.0f, 4.0f) == 1.0f); + extern int64_t __subvdi3(int64_t x, int64_t y); TEST_ASSERT(__subvdi3(-1LL, -1LL) == 0); extern int __subvsi3(int x, int y); @@ -186,6 +168,36 @@ TEST_CASE("libgcc math functions", "[rom][libgcc]") #endif extern int __unorddf2(double x, double y); TEST_ASSERT(__unorddf2(1.0, 2.0) == 0); + +#if ESP_ROM_HAS_SW_FLOAT + extern float __addsf3(float x, float y); + TEST_ASSERT(__addsf3(1.0f, 4.0f) == 5.0f); + extern int __eqsf2(float x, float y); + TEST_ASSERT(__eqsf2(4.0f, 4.0f) == 0); + extern int __fixsfsi(float x); + TEST_ASSERT(__fixsfsi(4.0f) == 4); + extern float __floatsisf(int x); + TEST_ASSERT(__floatsisf(-1) == -1.0f); + extern float __floatunsisf(unsigned x); + TEST_ASSERT(__floatunsisf(16) == 16.0f); + TEST_ASSERT(__gedf2(2.0, 0.0) >= 0); + extern int __gesf2(float x, float y); + TEST_ASSERT(__gesf2(2.0f, 0.0f) >= 0); + extern int __gtsf2(float x, float y); + TEST_ASSERT(__gtsf2(2.0f, 0.0f) >= 0); + extern int __lesf2(float x, float y); + TEST_ASSERT(__lesf2(0.0f, 2.0f) <= 0); + extern int __ltsf2(float x, float y); + TEST_ASSERT(__ltsf2(0.0f, 2.0f) < 0); + extern float __mulsf3(float a, float b); + TEST_ASSERT(__mulsf3(2.0f, 8.0f) == 16.0f); + extern float __negsf2(float x); + TEST_ASSERT(__negsf2(-1.0f) == 1.0f); + extern int __nesf2(float x, float y); + TEST_ASSERT(__nesf2(2.0, 0.0) != 0); + extern float __subsf3(float x, float y); + TEST_ASSERT(__subsf3(5.0f, 4.0f) == 1.0f); extern int __unordsf2(float x, float y); TEST_ASSERT(__unordsf2(2.0f, 1.0f) == 0); +#endif //ESP_ROM_HAS_SW_FLOAT } diff --git a/components/esp_system/port/soc/esp32p4/cache_err_int.c b/components/esp_system/port/soc/esp32p4/cache_err_int.c index 673953660d..db57614bb1 100644 --- a/components/esp_system/port/soc/esp32p4/cache_err_int.c +++ b/components/esp_system/port/soc/esp32p4/cache_err_int.c @@ -53,7 +53,7 @@ void esp_cache_err_int_init(void) ESP_INTR_ENABLE(ETS_CACHEERR_INUM); } -int IRAM_ATTR esp_cache_err_get_cpuid(void) +int esp_cache_err_get_cpuid(void) { //TODO: IDF-7515 //Should return hart ID according to the cache error diff --git a/components/esp_system/port/soc/esp32p4/reset_reason.c b/components/esp_system/port/soc/esp32p4/reset_reason.c index 0615ce2b52..305a8bea26 100644 --- a/components/esp_system/port/soc/esp32p4/reset_reason.c +++ b/components/esp_system/port/soc/esp32p4/reset_reason.c @@ -97,8 +97,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint) REG_WRITE(RTC_RESET_CAUSE_REG, val); } -/* in IRAM, can be called from panic handler */ -esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void) +esp_reset_reason_t esp_reset_reason_get_hint(void) { uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG); uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK; diff --git a/components/hal/include/hal/systimer_hal.h b/components/hal/include/hal/systimer_hal.h index ac6e338e45..b03b927fcf 100644 --- a/components/hal/include/hal/systimer_hal.h +++ b/components/hal/include/hal/systimer_hal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -126,14 +126,6 @@ void systimer_hal_counter_can_stall_by_cpu(systimer_hal_context_t *hal, uint32_t void systimer_hal_set_steps_per_tick(systimer_hal_context_t *hal, int clock_source, uint32_t steps); #endif -/** - * @brief Set Systimer clock source - * - * Use this function as - PERIPH_RCC_ATOMIC(){ systimer_hal_set_clock_source(hal, clk_src); } - * due to Reset and Clock Control registers are mixing with other peripherals, so we need to use a critical section - */ -void systimer_hal_set_clock_source(systimer_hal_context_t *hal, systimer_clock_source_t clk_src); - /** * @brief Get Systimer clock source */ diff --git a/components/hal/systimer_hal.c b/components/hal/systimer_hal.c index 728534b7bb..658bfaad47 100644 --- a/components/hal/systimer_hal.c +++ b/components/hal/systimer_hal.c @@ -31,12 +31,6 @@ void systimer_hal_deinit(systimer_hal_context_t *hal) hal->dev = NULL; } -void systimer_hal_set_clock_source(systimer_hal_context_t *hal, systimer_clock_source_t clk_src) -{ - (void)hal; - systimer_ll_set_clock_source(clk_src); -} - systimer_clock_source_t systimer_hal_get_clock_source(systimer_hal_context_t *hal) { (void)hal; diff --git a/tools/test_apps/.build-test-rules.yml b/tools/test_apps/.build-test-rules.yml index 5cf3291d28..55a3ae2cdc 100644 --- a/tools/test_apps/.build-test-rules.yml +++ b/tools/test_apps/.build-test-rules.yml @@ -101,9 +101,7 @@ tools/test_apps/system/build_test: - if: CONFIG_NAME == "no_rvfplib" and ESP_ROM_HAS_RVFPLIB != 1 - if: CONFIG_NAME == "usb_serial_jtag" AND SOC_USB_SERIAL_JTAG_SUPPORTED != 1 - if: CONFIG_NAME == "usb_console_ets_printf" AND SOC_USB_OTG_SUPPORTED != 1 - - if: IDF_TARGET in ["esp32p4"] - temporary: true - reason: target(s) not supported yet #TODO: IDF-8119 + - if: CONFIG_NAME == "phy_multiple_init_data" AND IDF_TARGET == "esp32p4" # Update with caps here when IDF-7460 is resolved tools/test_apps/system/cxx_no_except: enable: diff --git a/tools/test_apps/system/build_test/README.md b/tools/test_apps/system/build_test/README.md index ff94877200..8253a41e8b 100644 --- a/tools/test_apps/system/build_test/README.md +++ b/tools/test_apps/system/build_test/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 | -| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | This project is for testing if the application can be built with a particular sdkconfig setting.