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https://github.com/espressif/esp-idf.git
synced 2025-08-06 06:04:33 +02:00
test: move uart test to test_app
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@@ -76,3 +76,9 @@ components/driver/test_apps/touch_sensor_v2:
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components/driver/test_apps/twai:
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disable:
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- if: SOC_TWAI_SUPPORTED != 1
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components/driver/test_apps/uart:
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disable_test:
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- if: IDF_TARGET == "esp32c6"
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temporary: true
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reason: target esp32c6 not supported yet
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7
components/driver/test_apps/uart/CMakeLists.txt
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7
components/driver/test_apps/uart/CMakeLists.txt
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@@ -0,0 +1,7 @@
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# This is the project CMakeLists.txt file for the test subproject
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cmake_minimum_required(VERSION 3.16)
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set(EXTRA_COMPONENT_DIRS "$ENV{IDF_PATH}/tools/unit-test-app/components")
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include($ENV{IDF_PATH}/tools/cmake/project.cmake)
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project(uart_test)
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2
components/driver/test_apps/uart/README.md
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2
components/driver/test_apps/uart/README.md
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@@ -0,0 +1,2 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- |
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7
components/driver/test_apps/uart/main/CMakeLists.txt
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7
components/driver/test_apps/uart/main/CMakeLists.txt
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@@ -0,0 +1,7 @@
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# In order for the cases defined by `TEST_CASE` to be linked into the final elf,
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# the component can be registered as WHOLE_ARCHIVE
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idf_component_register(
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SRCS "test_app_main.c" "test_uart.c"
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REQUIRES driver unity
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WHOLE_ARCHIVE
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)
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48
components/driver/test_apps/uart/main/test_app_main.c
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48
components/driver/test_apps/uart/main/test_app_main.c
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@@ -0,0 +1,48 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "unity.h"
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#include "unity_test_utils.h"
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#include "esp_heap_caps.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#define TEST_MEMORY_LEAK_THRESHOLD (200)
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static size_t before_free_8bit;
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static size_t before_free_32bit;
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void setUp(void)
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{
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before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
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before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
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}
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void tearDown(void)
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{
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size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
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size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
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printf("\n");
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unity_utils_check_leak(before_free_8bit, after_free_8bit, "8BIT", TEST_MEMORY_LEAK_THRESHOLD);
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unity_utils_check_leak(before_free_32bit, after_free_32bit, "32BIT", TEST_MEMORY_LEAK_THRESHOLD);
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}
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void app_main(void)
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{
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// _____ _ _ _ _ ____ _____
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//|_ _|__ ___| |_ | | | | / \ | _ \_ _|
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// | |/ _ \/ __| __| | | | |/ _ \ | |_) || |
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// | | __/\__ \ |_ | |_| / ___ \| _ < | |
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// |_|\___||___/\__| \___/_/ \_\_| \_\|_|
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printf("\n");
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printf(" _____ _ _ _ _ ____ _____ \n");
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printf(" |_ _|__ ___| |_ | | | | / \\ | _ \\_ _|\n");
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printf(" | |/ _ \\/ __| __| | | | |/ _ \\ | |_) || | \n");
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printf(" | | __/\\__ \\ |_ | |_| / ___ \\| _ < | | \n");
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printf(" |_|\\___||___/\\__| \\___/_/ \\_\\_| \\_\\|_| \n");
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unity_run_menu();
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}
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@@ -6,7 +6,6 @@
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#include <string.h>
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#include <sys/param.h>
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#include "unity.h"
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#include "test_utils.h" // unity_send_signal
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#include "driver/uart.h" // for the uart driver access
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#include "esp_log.h"
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#include "esp_system.h" // for uint32_t esp_random()
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@@ -23,14 +22,6 @@
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#define TOLERANCE (0.02) //baud rate error tolerance 2%.
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#define UART1_CTS_PIN (13)
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// RTS for RS485 Half-Duplex Mode manages DE/~RE
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#define UART1_RTS_PIN (18)
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// Number of packets to be send during test
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#define PACKETS_NUMBER (10)
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// Wait timeout for uart driver
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#define PACKET_READ_TICS (1000 / portTICK_PERIOD_MS)
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static void uart_config(uint32_t baud_rate, uart_sclk_t source_clk)
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{
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@@ -48,9 +39,9 @@ static void uart_config(uint32_t baud_rate, uart_sclk_t source_clk)
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TEST_ESP_OK(uart_set_loop_back(UART_NUM1, true));
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}
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static volatile bool exit_flag;
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static volatile bool exit_flag, case_end;
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static void test_task(void *pvParameters)
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static void test_task1(void *pvParameters)
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{
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SemaphoreHandle_t *sema = (SemaphoreHandle_t *) pvParameters;
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char* data = (char *) malloc(256);
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@@ -76,26 +67,39 @@ static void test_task2(void *pvParameters)
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vTaskDelete(NULL);
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}
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TEST_CASE("test uart_wait_tx_done is not blocked when ticks_to_wait=0", "[uart]")
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static void test_task3(void *pvParameters)
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{
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uart_config(UART_BAUD_11520, UART_SCLK_DEFAULT);
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SemaphoreHandle_t exit_sema = xSemaphoreCreateBinary();
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exit_flag = false;
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case_end = false;
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xTaskCreate(test_task, "tsk1", 2048, &exit_sema, 5, NULL);
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xTaskCreate(test_task1, "tsk1", 2048, &exit_sema, 5, NULL);
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xTaskCreate(test_task2, "tsk2", 2048, NULL, 5, NULL);
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printf("Waiting for 5 sec\n");
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vTaskDelay(5000 / portTICK_PERIOD_MS);
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vTaskDelay(pdMS_TO_TICKS(5000));
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exit_flag = true;
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if (xSemaphoreTake(exit_sema, 1000 / portTICK_PERIOD_MS) == pdTRUE) {
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if (xSemaphoreTake(exit_sema, pdMS_TO_TICKS(1000)) == pdTRUE) {
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vSemaphoreDelete(exit_sema);
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} else {
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TEST_FAIL_MESSAGE("uart_wait_tx_done is blocked");
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}
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TEST_ESP_OK(uart_driver_delete(UART_NUM1));
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vTaskDelay(2); // wait for test_task1 to exit
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case_end = true;
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vTaskDelete(NULL);
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}
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TEST_CASE("test uart_wait_tx_done is not blocked when ticks_to_wait=0", "[uart]")
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{
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xTaskCreate(test_task3, "tsk3", 4096, NULL, 5, NULL);
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while(!case_end);
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vTaskDelay(2); // wait for test_task3 to exit
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}
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TEST_CASE("test uart get baud-rate", "[uart]")
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@@ -130,7 +134,7 @@ TEST_CASE("test uart tx data with break", "[uart]")
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uart_config(UART_BAUD_115200, UART_SCLK_DEFAULT);
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printf("Uart%d send %d bytes with break\n", UART_NUM1, send_len);
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uart_write_bytes_with_break(UART_NUM1, (const char *)psend, send_len, brk_len);
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uart_wait_tx_done(UART_NUM1, (TickType_t)portMAX_DELAY);
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uart_wait_tx_done(UART_NUM1, portMAX_DELAY);
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//If the code is running here, it means the test passed, otherwise it will crash due to the interrupt wdt timeout.
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printf("Send data with break test passed\n");
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free(psend);
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@@ -238,7 +242,7 @@ static void uart_write_task(void *param)
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tx_buf[0] = (i & 0xff);
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tx_buf[1023] = ((~i) & 0xff);
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uart_write_bytes(uart_num, (const char*)tx_buf, 1024);
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uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
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uart_wait_tx_done(uart_num, portMAX_DELAY);
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}
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free(tx_buf);
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vTaskDelete(NULL);
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@@ -277,15 +281,14 @@ TEST_CASE("uart read write test", "[uart]")
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esp_rom_gpio_connect_out_signal(UART1_CTS_PIN, UART_PERIPH_SIGNAL(uart_num, SOC_UART_RTS_PIN_IDX), 0, 0);
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TEST_ESP_OK(uart_wait_tx_done(uart_num, portMAX_DELAY));
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vTaskDelay(1 / portTICK_PERIOD_MS); // make sure last byte has flushed from TX FIFO
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vTaskDelay(pdMS_TO_TICKS(20)); // make sure last byte has flushed from TX FIFO
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TEST_ESP_OK(uart_flush_input(uart_num));
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xTaskCreate(uart_write_task, "uart_write_task", 2048 * 4, (void *)uart_num, UNITY_FREERTOS_PRIORITY - 1, NULL);
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xTaskCreate(uart_write_task, "uart_write_task", 8192, (void *)uart_num, 5, NULL);
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for (int i = 0; i < 1024; i++) {
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int bytes_remaining = 1024;
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memset(rd_data, 0, 1024);
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while (bytes_remaining) {
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int bytes_received = uart_read_bytes(uart_num, rd_data + 1024 - bytes_remaining, bytes_remaining, (TickType_t)1000);
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int bytes_received = uart_read_bytes(uart_num, rd_data + 1024 - bytes_remaining, bytes_remaining, pdMS_TO_TICKS(100));
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if (bytes_received < 0) {
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TEST_FAIL_MESSAGE("read timeout, uart read write test fail");
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}
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@@ -315,9 +318,11 @@ TEST_CASE("uart read write test", "[uart]")
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TEST_FAIL();
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}
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}
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uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
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uart_wait_tx_done(uart_num, portMAX_DELAY);
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uart_driver_delete(uart_num);
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free(rd_data);
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vTaskDelay(pdMS_TO_TICKS(100)); // wait for uart_write_task to exit
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}
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TEST_CASE("uart tx with ringbuffer test", "[uart]")
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@@ -357,10 +362,10 @@ TEST_CASE("uart tx with ringbuffer test", "[uart]")
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uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
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TEST_ASSERT_LESS_THAN(2048, tx_buffer_free_space); // tx transmit in progress: tx buffer has content
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TEST_ASSERT_GREATER_OR_EQUAL(1024, tx_buffer_free_space);
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uart_wait_tx_done(uart_num, (TickType_t)portMAX_DELAY);
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uart_wait_tx_done(uart_num, portMAX_DELAY);
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uart_get_tx_buffer_free_size(uart_num, &tx_buffer_free_space);
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TEST_ASSERT_EQUAL_INT(2048, tx_buffer_free_space); // tx done: tx buffer back to empty
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uart_read_bytes(uart_num, rd_data, 1024, (TickType_t)1000);
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uart_read_bytes(uart_num, rd_data, 1024, pdMS_TO_TICKS(1000));
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TEST_ASSERT_EQUAL_HEX8_ARRAY(wr_data, rd_data, 1024);
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TEST_ESP_OK(uart_driver_delete(uart_num));
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free(rd_data);
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@@ -403,7 +408,7 @@ TEST_CASE("uart int state restored after flush", "[uart]")
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uart_write_bytes(uart_echo, (const char *) data, buf_size);
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/* As we set up a loopback, we can read them back on RX */
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int len = uart_read_bytes(uart_echo, data, buf_size, 1000 / portTICK_PERIOD_MS);
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int len = uart_read_bytes(uart_echo, data, buf_size, pdMS_TO_TICKS(1000));
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TEST_ASSERT_EQUAL(len, buf_size);
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/* Fill the RX buffer, this should disable the RX interrupts */
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@@ -418,7 +423,7 @@ TEST_CASE("uart int state restored after flush", "[uart]")
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uart_flush_input(uart_echo);
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written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
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TEST_ASSERT_NOT_EQUAL(-1, written);
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len = uart_read_bytes(uart_echo, data, buf_size, 1000 / portTICK_PERIOD_MS);
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len = uart_read_bytes(uart_echo, data, buf_size, pdMS_TO_TICKS(1000));
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/* len equals buf_size bytes if interrupts were indeed re-enabled */
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TEST_ASSERT_EQUAL(len, buf_size);
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@@ -433,7 +438,7 @@ TEST_CASE("uart int state restored after flush", "[uart]")
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uart_flush_input(uart_echo);
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written = uart_write_bytes(uart_echo, (const char *) data, buf_size);
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TEST_ASSERT_NOT_EQUAL(-1, written);
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len = uart_read_bytes(uart_echo, data, buf_size, 250 / portTICK_PERIOD_MS);
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len = uart_read_bytes(uart_echo, data, buf_size, pdMS_TO_TICKS(250));
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TEST_ASSERT_EQUAL(len, 0);
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TEST_ESP_OK(uart_driver_delete(uart_echo));
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11
components/driver/test_apps/uart/pytest_uart.py
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11
components/driver/test_apps/uart/pytest_uart.py
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@@ -0,0 +1,11 @@
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# SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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@pytest.mark.supported_targets
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@pytest.mark.generic
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@pytest.mark.parametrize('config', ['release',], indirect=True,)
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def test_uart_single_dev(case_tester) -> None: # type: ignore
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case_tester.run_all_normal_cases(reset=True)
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6
components/driver/test_apps/uart/sdkconfig.ci.release
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6
components/driver/test_apps/uart/sdkconfig.ci.release
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@@ -0,0 +1,6 @@
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CONFIG_PM_ENABLE=y
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CONFIG_FREERTOS_USE_TICKLESS_IDLE=y
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CONFIG_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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CONFIG_COMPILER_OPTIMIZATION_NONE=y
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2
components/driver/test_apps/uart/sdkconfig.defaults
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2
components/driver/test_apps/uart/sdkconfig.defaults
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@@ -0,0 +1,2 @@
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CONFIG_FREERTOS_HZ=1000
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CONFIG_ESP_TASK_WDT=n
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