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https://github.com/espressif/esp-idf.git
synced 2025-08-01 11:44:31 +02:00
docs: update api-reference chapters for C3
Checked and updated the following chapters: * api-reference/network * api-reference/protocols * api-reference/provisioning * api-reference/storage * api-reference/peripherals/ds * api-reference/peripherals/hmac * api-reference/peripherals/secure_element
This commit is contained in:
@@ -9,6 +9,8 @@
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#define SOC_GDMA_SUPPORTED 1
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#define SOC_GDMA_SUPPORTED 1
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#define SOC_TWAI_SUPPORTED 1
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#define SOC_TWAI_SUPPORTED 1
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#define SOC_BT_SUPPORTED 1
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#define SOC_BT_SUPPORTED 1
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#define SOC_DIG_SIGN_SUPPORTED 1
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#define SOC_HMAC_SUPPORTED 1
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#include "rmt_caps.h"
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#include "rmt_caps.h"
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@@ -48,6 +48,8 @@
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#define SOC_ULP_SUPPORTED 1
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#define SOC_ULP_SUPPORTED 1
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#define SOC_RTC_SLOW_MEM_SUPPORTED 1
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#define SOC_RTC_SLOW_MEM_SUPPORTED 1
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#define SOC_CCOMP_TIMER_SUPPORTED 1
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#define SOC_CCOMP_TIMER_SUPPORTED 1
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#define SOC_DIG_SIGN_SUPPORTED 1
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#define SOC_HMAC_SUPPORTED 1
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#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
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#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
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#define SOC_CACHE_SUPPORT_WRAP 1
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#define SOC_CACHE_SUPPORT_WRAP 1
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@@ -15,6 +15,8 @@
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#define SOC_ULP_SUPPORTED 1
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#define SOC_ULP_SUPPORTED 1
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#define SOC_RTC_SLOW_MEM_SUPPORTED 1
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#define SOC_RTC_SLOW_MEM_SUPPORTED 1
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#define SOC_CCOMP_TIMER_SUPPORTED 1
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#define SOC_CCOMP_TIMER_SUPPORTED 1
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#define SOC_DIG_SIGN_SUPPORTED 1
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#define SOC_HMAC_SUPPORTED 1
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#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
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#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
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@@ -5,7 +5,7 @@ Wear Levelling API
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Overview
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Overview
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--------
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--------
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Most of flash memory and especially SPI flash that is used in ESP32 has a sector-based organization and also has a limited number of erase/modification cycles per memory sector. The wear levelling component helps to distribute wear and tear among sectors more evenly without requiring any attention from the user.
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Most of flash memory and especially SPI flash that is used in {IDF_TARGET_NAME} has a sector-based organization and also has a limited number of erase/modification cycles per memory sector. The wear levelling component helps to distribute wear and tear among sectors more evenly without requiring any attention from the user.
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The wear levelling component provides API functions related to reading, writing, erasing, and memory mapping of data in external SPI flash through the partition component. The component also has higher-level API functions which work with the FAT filesystem defined in :doc:`FAT filesystem </api-reference/storage/fatfs>`.
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The wear levelling component provides API functions related to reading, writing, erasing, and memory mapping of data in external SPI flash through the partition component. The component also has higher-level API functions which work with the FAT filesystem defined in :doc:`FAT filesystem </api-reference/storage/fatfs>`.
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@@ -208,6 +208,8 @@ conditional_include_dict = {'SOC_BT_SUPPORTED':BT_DOCS,
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'SOC_TOUCH_SENSOR_NUM':TOUCH_SENSOR_DOCS,
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'SOC_TOUCH_SENSOR_NUM':TOUCH_SENSOR_DOCS,
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'SOC_ULP_SUPPORTED':ULP_DOCS,
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'SOC_ULP_SUPPORTED':ULP_DOCS,
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'SOC_RISCV_COPROC_SUPPORTED':RISCV_COPROC_DOCS,
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'SOC_RISCV_COPROC_SUPPORTED':RISCV_COPROC_DOCS,
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'SOC_DIG_SIGN_SUPPORTED':['api-reference/peripherals/ds.rst'],
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'SOC_HMAC_SUPPORTED':['api-reference/peripherals/hmac.rst'],
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'CONFIG_IDF_TARGET_ARCH_XTENSA':XTENSA_DOCS,
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'CONFIG_IDF_TARGET_ARCH_XTENSA':XTENSA_DOCS,
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'CONFIG_IDF_TARGET_ARCH_RISCV':RISCV_DOCS,
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'CONFIG_IDF_TARGET_ARCH_RISCV':RISCV_DOCS,
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'esp32':ESP32_DOCS,
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'esp32':ESP32_DOCS,
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@@ -1,3 +1,4 @@
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INPUT += \
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INPUT += \
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$(IDF_PATH)/components/driver/esp32c3/include/driver/temp_sensor.h \
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$(IDF_PATH)/components/driver/esp32c3/include/driver/temp_sensor.h \
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$(IDF_PATH)/components/esp32s2/include/esp_ds.h \
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$(IDF_PATH)/components/esp32c3/include/esp_hmac.h
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$(IDF_PATH)/components/esp32c3/include/esp_hmac.h
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@@ -51,7 +51,7 @@ Once the calculation has finished, :cpp:func:`esp_ds_finish_sign` can be called
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Configure the DS peripheral for a TLS connection
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Configure the DS peripheral for a TLS connection
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------------------------------------------------
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------------------------------------------------
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The DS peripheral on ESP32-S2 chip must be configured before it can be used for a TLS connection.
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The DS peripheral on {IDF_TARGET_NAME} chip must be configured before it can be used for a TLS connection.
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The configuration involves the following steps -
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The configuration involves the following steps -
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1) Randomly generate a 256 bit value called the `Initialization Vector` (IV).
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1) Randomly generate a 256 bit value called the `Initialization Vector` (IV).
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@@ -115,7 +115,7 @@ We use `ets_efuse_write_key` to set physical key block 4 in the eFuse for the HM
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.. code-block:: c
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.. code-block:: c
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#include "esp32s2/rom/efuse.h"
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#include "{IDF_TARGET_PATH_NAME}/rom/efuse.h"
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const uint8_t key_data[32] = { ... };
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const uint8_t key_data[32] = { ... };
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@@ -11,8 +11,8 @@ Peripherals API
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:SOC_DAC_PERIPH_NUM: DAC <dac>
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:SOC_DAC_PERIPH_NUM: DAC <dac>
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GPIO (including RTC low power I/O) <gpio>
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GPIO (including RTC low power I/O) <gpio>
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:SOC_DEDICATED_GPIO_SUPPORTED: Dedicated GPIO <dedic_gpio>
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:SOC_DEDICATED_GPIO_SUPPORTED: Dedicated GPIO <dedic_gpio>
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:esp32s2: HMAC <hmac>
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:SOC_HMAC_SUPPORTED: HMAC <hmac>
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:esp32s2: Digital Signature <ds>
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:SOC_DIG_SIGN_SUPPORTED: Digital Signature <ds>
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I2C <i2c>
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I2C <i2c>
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I2S <i2s>
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I2S <i2s>
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LED Control <ledc>
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LED Control <ledc>
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@@ -1,30 +1,31 @@
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ESP SPI Slave HD (Half Duplex) Mode Protocol
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ESP SPI Slave HD (Half Duplex) Mode Protocol
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============================================
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============================================
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.. note::
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.. only:: esp32
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This protocol is only for ESP32-S2. The driver for other chip versions hasn't be developed
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yet.
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.. warning::
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The driver for ESP32 hasn't been developed yet.
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.. _esp_spi_slave_caps:
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.. _esp_spi_slave_caps:
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SPI Slave Capabilities of Espressif chips
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SPI Slave Capabilities of Espressif chips
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-----------------------------------------
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-----------------------------------------
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+--------------------+-------+----------+
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+--------------------+-------+----------+----------+
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| | ESP32 | ESP32-S2 |
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| | ESP32 | ESP32-S2 | ESP32-C3 |
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+====================+=======+==========+
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+====================+=======+==========+==========+
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| SPI Slave HD | N | Y (v2) |
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| SPI Slave HD | N | Y (v2) | Y (v2) |
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+--------------------+-------+----------+
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+--------------------+-------+----------+----------+
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| Tohost intr | | N |
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| Tohost intr | | N | N |
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+--------------------+-------+----------+
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+--------------------+-------+----------+----------+
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| Frhost intr | | 2 \* |
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| Frhost intr | | 2 \* | 2 \* |
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+--------------------+-------+----------+
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+--------------------+-------+----------+----------+
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| TX DMA | | Y |
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| TX DMA | | Y | Y |
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+--------------------+-------+----------+
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+--------------------+-------+----------+----------+
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| RX DMA | | Y |
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| RX DMA | | Y | Y |
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+--------------------+-------+----------+
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+--------------------+-------+----------+----------+
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| Shared registers | | 72 |
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| Shared registers | | 72 | 64 |
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+--------------------+-------+----------+
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+--------------------+-------+----------+----------+
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Introduction
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Introduction
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------------
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------------
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@@ -137,20 +137,18 @@ SSL/TLS libraries and with all respective configurations set to default.
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.use_secure_element = true,
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.use_secure_element = true,
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};
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};
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.. only:: esp32s2
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.. only:: SOC_DIG_SIGN_SUPPORTED
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.. _digital-signature-with-esp-tls:
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.. _digital-signature-with-esp-tls:
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Digital Signature with ESP-TLS
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Digital Signature with ESP-TLS
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------------------------------
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------------------------------
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ESP-TLS provides support for using the Digital Signature (DS) with ESP32-S2.
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ESP-TLS provides support for using the Digital Signature (DS) with {IDF_TARGET_NAME}.
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Use of the DS for TLS is supported only when ESP-TLS is used with mbedTLS (default stack) as its underlying SSL/TLS stack.
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Use of the DS for TLS is supported only when ESP-TLS is used with mbedTLS (default stack) as its underlying SSL/TLS stack.
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For more details on Digital Signature, please refer to the :doc:`Digital Signature Documentation </api-reference/peripherals/ds>`. The technical details of Digital Signature such as
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For more details on Digital Signature, please refer to the :doc:`Digital Signature Documentation </api-reference/peripherals/ds>`. The technical details of Digital Signature such as
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how to calculate private key parameters can be found in *{IDF_TARGET_NAME} Technical Reference Manual* > *Digital Signature (DS)* [`PDF <{IDF_TARGET_TRM_EN_URL}#digsig>`__].
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how to calculate private key parameters can be found in *{IDF_TARGET_NAME} Technical Reference Manual* > *Digital Signature (DS)* [`PDF <{IDF_TARGET_TRM_EN_URL}#digsig>`__].
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The DS peripheral must be configured before it can be used to perform Digital Signature, see `Configure the DS Peripheral` in :doc:`Digital Signature </api-reference/peripherals/ds>`.
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The DS peripheral must be configured before it can be used to perform Digital Signature, see `Configure the DS Peripheral` in :doc:`Digital Signature </api-reference/peripherals/ds>`.
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.. note:: As the DS peripheral support is only available for ESP32-S2, the idf-target should be set to ESP32-S2. See `Selecting the Target` in :doc:`build-system.</api-guides/build-system>`.
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The DS peripheral must be initlized with the required encrypted private key parameters (obtained when the DS peripheral is configured). ESP-TLS internally initializes the DS peripheral when
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The DS peripheral must be initlized with the required encrypted private key parameters (obtained when the DS peripheral is configured). ESP-TLS internally initializes the DS peripheral when
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provided with the required DS context (DS parameters). Please see the below code snippet for passing the DS context to esp-tls context. The DS context passed to the esp-tls context should not be freed till the TLS connection is deleted.
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provided with the required DS context (DS parameters). Please see the below code snippet for passing the DS context to esp-tls context. The DS context passed to the esp-tls context should not be freed till the TLS connection is deleted.
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@@ -8,7 +8,7 @@ Overview
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The SD/SDIO/MMC driver currently supports SD memory, SDIO cards, and eMMC chips. This is a protocol level driver built on top of SDMMC and SD SPI host drivers.
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The SD/SDIO/MMC driver currently supports SD memory, SDIO cards, and eMMC chips. This is a protocol level driver built on top of SDMMC and SD SPI host drivers.
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SDMMC and SD SPI host drivers (:component_file:`driver/include/driver/sdmmc_host.h`) provide API functions for:
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SDMMC and SD SPI host drivers (:component_file:`driver/include/driver/sdmmc_host.h` and :component_file:`driver/include/driver/sdspi_host.h`) provide API functions for:
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- Sending commands to slave devices
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- Sending commands to slave devices
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- Sending and receiving data
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- Sending and receiving data
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@@ -16,13 +16,14 @@ SDMMC and SD SPI host drivers (:component_file:`driver/include/driver/sdmmc_host
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For functions used to initialize and configure:
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For functions used to initialize and configure:
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.. only:: esp32
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.. list::
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- SDMMC host, see :doc:`SDMMC Host API <../peripherals/sdmmc_host>`
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:SOC_SDMMC_HOST_SUPPORTED: - SDMMC host, see :doc:`SDMMC Host API <../peripherals/sdmmc_host>`
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- SD SPI host, see :doc:`SD SPI Host API <../peripherals/sdspi_host>`
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- SD SPI host, see :doc:`SD SPI Host API <../peripherals/sdspi_host>`
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.. only:: SOC_SDMMC_HOST_SUPPORTED
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The SDMMC protocol layer described in this document handles the specifics of the SD protocol, such as the card initialization and data transfer commands.
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The SDMMC protocol layer described in this document handles the specifics of the SD protocol, such as the card initialization and data transfer commands.
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The protocol layer works with the host via the :cpp:class:`sdmmc_host_t` structure. This structure contains pointers to various functions of the host.
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The protocol layer works with the host via the :cpp:class:`sdmmc_host_t` structure. This structure contains pointers to various functions of the host.
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@@ -33,7 +34,7 @@ For functions used to initialize and configure:
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An example which combines the SDMMC driver with the FATFS library is provided in the :example:`storage/sd_card` directory of ESP-IDF examples. This example initializes the card, then writes and reads data from it using POSIX and C library APIs. See README.md file in the example directory for more information.
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An example which combines the SDMMC driver with the FATFS library is provided in the :example:`storage/sd_card` directory of ESP-IDF examples. This example initializes the card, then writes and reads data from it using POSIX and C library APIs. See README.md file in the example directory for more information.
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.. only:: SOC_SDMMC_HOST_SUPPORTED
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Protocol layer API
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Protocol layer API
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------------------
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------------------
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@@ -1,12 +1,5 @@
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.. include:: ../../../../components/vfs/README.rst
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.. include:: ../../../../components/vfs/README.rst
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Application Example
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-------------------
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`Instructions`_
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.. _Instructions: ../../template.html
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API Reference
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API Reference
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-------------
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-------------
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@@ -10,8 +10,8 @@
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:SOC_DAC_PERIPH_NUM: DAC <dac>
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:SOC_DAC_PERIPH_NUM: DAC <dac>
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GPIO (包括 RTC 低功耗 I/O) <gpio>
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GPIO (包括 RTC 低功耗 I/O) <gpio>
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:SOC_DEDICATED_GPIO_SUPPORTED: 专用 GPIO <dedic_gpio>
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:SOC_DEDICATED_GPIO_SUPPORTED: 专用 GPIO <dedic_gpio>
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:esp32s2: HMAC <hmac>
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:SOC_HMAC_SUPPORTED: HMAC <hmac>
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:esp32s2: Digital Signature <ds>
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:SOC_DIG_SIGN_SUPPORTED: Digital Signature <ds>
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I2C <i2c>
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I2C <i2c>
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I2S <i2s>
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I2S <i2s>
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LED Control <ledc>
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LED Control <ledc>
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@@ -24,7 +24,7 @@ Prerequisites
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- Linux / MacOS / Windows (standard distributions)
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- Linux / MacOS / Windows (standard distributions)
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* The following packages are needed to use this utility:
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* The following packages are needed to use this utility:
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- Python: <https://www.python.org/downloads/>
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- `Python <https://www.python.org/downloads/>`_
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.. note::
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.. note::
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