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Merge branch 'bugfix/init_memctl_v3.2' into 'release/v3.2'

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bootloader, esp32: add workaround for Tensilica erratum 572 (backport v3.2)

See merge request idf/esp-idf!4134
This commit is contained in:
Jiang Jiang Jian
2019-01-23 21:43:58 +08:00
parent fe19ea977b 42b6c4953d
commit fcf1dba9cd
4 changed files with 23 additions and 0 deletions
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11
components/esp32/include/xtensa/config/core.h
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@@ -1401,5 +1401,16 @@ extern const unsigned int XCJOIN(Xthal_cp_mask_,XCHAL_CP7_IDENT);
#define XCHAL_ERRATUM_497 0
#endif
/*
* Erratum 572 (releases TBD, but present in ESP32)
* Disable zero-overhead loop buffer to prevent rare illegal instruction
* exceptions while executing zero-overhead loops.
*/
#if ( XCHAL_HAVE_LOOPS && XCHAL_LOOP_BUFFER_SIZE != 0 )
#define XCHAL_ERRATUM_572 1
#else
#define XCHAL_ERRATUM_572 0
#endif
#endif /*XTENSA_CONFIG_CORE_H*/