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feat(i2s): support asynchronous read write via callback
Split the TX DMA buffer `auto_clear` into `auto_clear_after_cb` and `auto_clear_before_cb`, so that allow user to update the DMA buffer directly in the `on_sent` callback
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@@ -24,7 +24,8 @@ extern "C" {
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.role = i2s_role, \
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.dma_desc_num = 6, \
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.dma_frame_num = 240, \
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.auto_clear = false, \
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.auto_clear_after_cb = false, \
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.auto_clear_before_cb = false, \
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.intr_priority = 0, \
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}
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@@ -63,7 +64,15 @@ typedef struct {
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uint32_t dma_frame_num; /*!< I2S frame number in one DMA buffer. One frame means one-time sample data in all slots,
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* it should be the multiple of `3` when the data bit width is 24.
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*/
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bool auto_clear; /*!< Set to auto clear DMA TX buffer, I2S will always send zero automatically if no data to send */
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union {
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bool auto_clear; /*!< Alias of `auto_clear_after_cb` to be compatible with previous version */
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bool auto_clear_after_cb; /*!< Set to auto clear DMA TX buffer after `on_sent` callback, I2S will always send zero automatically if no data to send.
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* So that user can assign the data to the DMA buffers directly in the callback, and the data won't be cleared after quitted the callback.
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*/
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};
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bool auto_clear_before_cb; /*!< Set to auto clear DMA TX buffer before `on_sent` callback, I2S will always send zero automatically if no data to send
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* So that user can access data in the callback that just finished to send.
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*/
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int intr_priority; /*!< I2S interrupt priority, range [0, 7], if set to 0, the driver will try to allocate an interrupt with a relative low priority (1,2,3) */
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} i2s_chan_config_t;
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