feat(esp_system): Adds Kconfigs to place code in IRAM

components/esp_system/port/arch/riscv/debug_helpers.c

@@ -11,7 +11,7 @@
 #include "freertos/task.h"
 #include "esp_private/freertos_debug.h"
 #include "esp_err.h"
-#include "esp_attr.h"
+#include "esp_private/esp_system_attr.h"
 #include "esp_private/esp_cpu_internal.h"
 #include <string.h>
 
@@ -36,7 +36,7 @@ extern void panic_print_registers(const void *frame, int core);
     * exit this handler as fast as possible, then we will simply print
     * the interruptee's registers.
     */
-esp_err_t IRAM_ATTR esp_backtrace_print(int depth)
+esp_err_t ESP_SYSTEM_IRAM_ATTR esp_backtrace_print(int depth)
 {
     (void)depth;
 

components/esp_system/port/arch/riscv/esp_ipc_isr_port.c

@@ -12,7 +12,7 @@
 #include "riscv/interrupt.h"
 #include "esp_rom_sys.h"
 #include "esp_cpu.h"
-#include "esp_attr.h"
+#include "esp_private/esp_system_attr.h"
 #include "sdkconfig.h"
 
 void esp_ipc_isr_port_init(const int cpuid)
@@ -36,7 +36,7 @@ void esp_ipc_isr_port_init(const int cpuid)
     esp_intr_enable_source(ETS_IPC_ISR_INUM);
 }
 
-IRAM_ATTR void esp_ipc_isr_port_int_trigger(const int cpuid)
+ESP_SYSTEM_IRAM_ATTR void esp_ipc_isr_port_int_trigger(const int cpuid)
 {
     if (cpuid == 0) {
         // it runs an interrupt on cpu0

components/esp_system/port/arch/riscv/esp_ipc_isr_routines.c

@@ -5,9 +5,9 @@
  */
 
 #include "stdint.h"
-#include "esp_attr.h"
+#include "esp_private/esp_system_attr.h"
 
-void IRAM_ATTR esp_ipc_isr_waiting_for_finish_cmd(void* ipc_isr_finish_cmd)
+void ESP_SYSTEM_IRAM_ATTR esp_ipc_isr_waiting_for_finish_cmd(void* ipc_isr_finish_cmd)
 {
     while (*(volatile uint32_t *)ipc_isr_finish_cmd == 0) { };
 }

components/esp_system/port/arch/xtensa/debug_helpers.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,7 +9,7 @@
 #include <sys/param.h>
 #include "soc/soc_memory_layout.h"
 #include "esp_types.h"
-#include "esp_attr.h"
+#include "esp_private/esp_system_attr.h"
 #include "esp_err.h"
 #include "esp_check.h"
 #include "esp_ipc.h"
@@ -24,7 +24,7 @@
 
 const char *DEBUG_HELPER_TAG = "DBG HLPR";
 
-bool IRAM_ATTR esp_backtrace_get_next_frame(esp_backtrace_frame_t *frame)
+bool ESP_SYSTEM_IRAM_ATTR esp_backtrace_get_next_frame(esp_backtrace_frame_t *frame)
 {
     //Use frame(i-1)'s BS area located below frame(i)'s sp to get frame(i-1)'s sp and frame(i-2)'s pc
     void *base_save = (void *)frame->sp;     //Base save area consists of 4 words under SP
@@ -36,7 +36,7 @@ bool IRAM_ATTR esp_backtrace_get_next_frame(esp_backtrace_frame_t *frame)
     return (esp_stack_ptr_is_sane(frame->sp) && esp_ptr_executable((void*)esp_cpu_process_stack_pc(frame->pc)));
 }
 
-static void IRAM_ATTR print_entry(uint32_t pc, uint32_t sp, bool panic)
+static void ESP_SYSTEM_IRAM_ATTR print_entry(uint32_t pc, uint32_t sp, bool panic)
 {
     if (panic) {
         panic_print_str(" 0x");
@@ -48,7 +48,7 @@ static void IRAM_ATTR print_entry(uint32_t pc, uint32_t sp, bool panic)
     }
 }
 
-static void IRAM_ATTR print_str(const char* str, bool panic)
+static void ESP_SYSTEM_IRAM_ATTR print_str(const char* str, bool panic)
 {
     if (panic) {
         panic_print_str(str);
@@ -57,7 +57,7 @@ static void IRAM_ATTR print_str(const char* str, bool panic)
     }
 }
 
-esp_err_t IRAM_ATTR esp_backtrace_print_from_frame(int depth, const esp_backtrace_frame_t* frame, bool panic)
+esp_err_t ESP_SYSTEM_IRAM_ATTR esp_backtrace_print_from_frame(int depth, const esp_backtrace_frame_t* frame, bool panic)
 {
     //Check arguments
     if (depth <= 0) {
@@ -97,7 +97,7 @@ esp_err_t IRAM_ATTR esp_backtrace_print_from_frame(int depth, const esp_backtrac
     return ret;
 }
 
-esp_err_t IRAM_ATTR esp_backtrace_print(int depth)
+esp_err_t ESP_SYSTEM_IRAM_ATTR esp_backtrace_print(int depth)
 {
     //Initialize stk_frame with first frame of stack
     esp_backtrace_frame_t start = { 0 };
@@ -149,7 +149,7 @@ static void backtrace_other_cores_ipc_func(void *arg)
 }
 #endif // !CONFIG_FREERTOS_UNICORE
 
-esp_err_t IRAM_ATTR esp_backtrace_print_all_tasks(int depth)
+esp_err_t ESP_SYSTEM_IRAM_ATTR esp_backtrace_print_all_tasks(int depth)
 {
     esp_err_t ret = ESP_OK;
     TaskSnapshot_t *task_snapshots;

components/esp_system/port/arch/xtensa/esp_ipc_isr_port.c

@@ -12,7 +12,7 @@
 #endif
 #include "esp_rom_sys.h"
 #include "esp_intr_alloc.h"
-#include "esp_attr.h"
+#include "esp_private/esp_system_attr.h"
 #include "sdkconfig.h"
 
 void esp_ipc_isr_port_init(const int cpuid)
@@ -23,7 +23,7 @@ void esp_ipc_isr_port_init(const int cpuid)
     ESP_INTR_ENABLE(ETS_IPC_ISR_INUM);
 }
 
-IRAM_ATTR void esp_ipc_isr_port_int_trigger(const int cpuid)
+ESP_SYSTEM_IRAM_ATTR void esp_ipc_isr_port_int_trigger(const int cpuid)
 {
     if (cpuid == 0) {
         // it runs an interrupt on cpu0

components/esp_system/port/arch/xtensa/esp_ipc_isr_routines.S

@@ -8,13 +8,16 @@
 #include <xtensa/corebits.h>
 #include <xtensa/config/system.h>
 #include <xtensa/hal.h>
+#include "sdkconfig.h"
 
 /* esp_ipc_isr_waiting_for_finish_cmd(void* finish_cmd)
  *
  * It should be called by the CALLX0 command from the handler of High-priority interrupt.
  * Only these registers [a2, a3, a4] can be used here.
  */
+#if CONFIG_ESP_SYSTEM_IN_IRAM
     .section    .iram1, "ax"
+#endif
     .align      4
     .global     esp_ipc_isr_waiting_for_finish_cmd
     .type       esp_ipc_isr_waiting_for_finish_cmd, @function