espressif/esp-idf
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39,842 Commits 22 Branches 170 Tags
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54 Commits

Author SHA1 Message Date
Konstantin Kondrashov
d23c7690f2 esp32c3: Add UTs for reset_reason 2021-01-18 07:12:21 +08:00
Omar Chebib
c218f669ba panic on RISC-V: Take into account Merge Request comments 2020-12-31 15:46:17 +08:00
Omar Chebib
b6a450f824 panic: Add support for SoC-level panic 
SoC level exceptions such as watchdog timer and cache errors are now supported.
Such exceptions now triggers a panic, giving more information about how
and when it happened.
 2020-12-31 15:46:17 +08:00
Renz Bagaporo
4cc6b5571b esp_system: support riscv panic 2020-11-13 07:49:11 +11:00