Commit Graph

17 Commits

Author SHA1 Message Date
SalimTerryLi
874a720286 soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci
2021-08-30 13:50:58 +08:00
Cao Sen Miao
26c808610c uart: update ll layer with new register 2021-07-29 18:01:48 +08:00
Michael (XIAO Xufeng)
5569dedd7f Merge branch 'bugfix/i2c_example_esp32s3' into 'master'
i2c: bringup on ESP32-S3

Closes IDF-3232 and IDF-3292

See merge request espressif/esp-idf!13985
2021-07-29 07:01:38 +00:00
Jiang Jiang Jian
97507ebe49 Merge branch 'feature/support_esp32s3_lightsleep' into 'master'
support esp32s3 normal lightsleep

See merge request espressif/esp-idf!14369
2021-07-28 15:09:37 +00:00
Marius Vikhammer
a29a6ceef0 uart: update register headers and examples for S3 2021-07-22 12:05:49 +08:00
Omar Chebib
b8c6c5334f i2c: modify examples to work out of the box on ESP32S3
On ESP32S3, the default I2C pins of the examples are already used by USB.
This commit changes the default pins.
2021-07-21 11:04:16 +08:00
Li Shuai
512800891e light sleep: add uart new final state machine support for esp32s3 2021-07-20 11:27:14 +08:00
Andrey Starodubtsev
8488055711 Fix typo in include/hal/uart_ll.h
s/final state machine/finite-state machine/g

Signed-off-by: bizhuangyang <bizhuangyang@espressif.com>

Merges https://github.com/espressif/esp-idf/pull/7076
2021-06-02 15:37:30 +08:00
aleks
193f1f9b4e driver: fix uart handler in iram calls inline uart_ll_is_tx_idle 2021-03-31 14:39:59 +00:00
Michael (XIAO Xufeng)
fc61e60948 uart: fixed incorrect baudrate on C3 and S3 when target is too slow
The integer part of the divider is only 12-bit now. We used prescaler to get low frequency instead.
2021-03-09 20:09:42 +08:00
Li Shuai
a43de3a44b fix set UART_FORCE_XOFF can't stop new Tx request issue 2021-01-19 14:51:22 +08:00
Armando
f80bcb733a uart: modify s3 ll functions of reading/writing fifo 2020-11-30 15:23:15 +11:00
Armando
05a4a8d864 uart: seperate sclk and baudrate setting 2020-11-24 19:12:52 +08:00
Armando
fb8b905539 uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00