espressif/esp-idf
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2,624 Commits 22 Branches 170 Tags
f59bf740575c4a06f120def71f160fa17fbe8c96
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3 Commits

Author SHA1 Message Date
Tian Hao
26a3cb93c7 component/soc : move dport access header files to soc 
1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
 2017-05-09 18:06:00 +08:00
Tian Hao
f7e8856520 component/esp32 : fix dualcore bug 
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
 2017-05-08 21:53:43 +08:00
Jeroen Domburg
0b79d07d34 add detection of invalid cache access 
- fix level 4 interrupt vectors to produce correct backtrace
- initialize invalid cache access interrupt on startup
- handle invalid cache access in panic handler
 2017-04-13 15:27:38 +08:00