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			62 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			62 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // Copyright 2020 Espressif Systems (Shanghai) PTE LTD
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| //
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| // Licensed under the Apache License, Version 2.0 (the "License");
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| // you may not use this file except in compliance with the License.
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| // You may obtain a copy of the License at
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| 
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| //     http://www.apache.org/licenses/LICENSE-2.0
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| //
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| // Unless required by applicable law or agreed to in writing, software
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| // distributed under the License is distributed on an "AS IS" BASIS,
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| // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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| // See the License for the specific language governing permissions and
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| // limitations under the License.
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| #include "sdkconfig.h"
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| #include "hal/interrupt_controller_hal.h"
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| #include "soc/soc_caps.h"
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| #include "soc/soc.h"
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| 
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| // TODO ESP32-C3 IDF-2126 check this table is correct, some interrupts may be unnecessarily reserved or not reserved
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| // or marked as the wrong type
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| 
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| //This is basically a software-readable version of the interrupt usage table in include/soc/soc.h
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| const int_desc_t interrupt_descriptor_table[32] = {
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|     { 1, INTTP_LEVEL, {INTDESC_RESVD } }, //0
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|     { 1, INTTP_LEVEL, {INTDESC_SPECIAL } }, //1
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|     { 1, INTTP_LEVEL, {INTDESC_NORMAL } }, //2
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|     { 1, INTTP_LEVEL, {INTDESC_NORMAL } }, //3
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|     { 1, INTTP_LEVEL, {INTDESC_NORMAL } }, //4
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|     { 1, INTTP_LEVEL, {INTDESC_SPECIAL } }, //5
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|     { 1, INTTP_NA,    {INTDESC_NORMAL } }, //6
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|     { 1, INTTP_NA,    {INTDESC_NORMAL } }, //7
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|     { 1, INTTP_LEVEL, {INTDESC_SPECIAL } }, //8
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|     { 1, INTTP_LEVEL, {INTDESC_SPECIAL } }, //9
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|     { 1, INTTP_EDGE,  {INTDESC_NORMAL } },  //10
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|     { 3, INTTP_NA,    {INTDESC_NORMAL } }, //11
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|     { 1, INTTP_LEVEL, {INTDESC_SPECIAL } }, //12
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|     { 1, INTTP_LEVEL, {INTDESC_NORMAL } }, //13
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|     { 7, INTTP_LEVEL, {INTDESC_NORMAL } }, //14
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|     { 3, INTTP_NA,    {INTDESC_NORMAL } }, //15
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|     { 5, INTTP_NA,    {INTDESC_NORMAL } }, //16
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|     { 1, INTTP_LEVEL, {INTDESC_NORMAL } }, //17
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|     { 1, INTTP_LEVEL, {INTDESC_NORMAL } }, //18
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|     { 2, INTTP_LEVEL, {INTDESC_NORMAL } }, //19
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|     { 2, INTTP_LEVEL, {INTDESC_NORMAL } }, //20
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|     { 2, INTTP_LEVEL, {INTDESC_NORMAL } }, //21
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|     { 3, INTTP_EDGE,  {INTDESC_NORMAL } }, //22
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|     { 3, INTTP_LEVEL, {INTDESC_NORMAL } }, //23
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|     { 4, INTTP_LEVEL, {INTDESC_NORMAL } }, //24
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|     { 4, INTTP_LEVEL, {INTDESC_NORMAL } }, //25
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|     { 5, INTTP_LEVEL, {INTDESC_NORMAL } }, //26
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|     { 3, INTTP_LEVEL, {INTDESC_NORMAL } }, //27
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|     { 4, INTTP_EDGE,  {INTDESC_NORMAL } }, //28
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|     { 3, INTTP_NA,    {INTDESC_NORMAL } }, //29
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|     { 4, INTTP_EDGE,  {INTDESC_NORMAL } }, //30
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|     { 5, INTTP_LEVEL, {INTDESC_NORMAL } }, //31
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| };
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| 
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| const int_desc_t *interrupt_controller_hal_desc_table(void)
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| {
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|     return interrupt_descriptor_table;
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| }
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