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1bd2145d6b87b51bee295f2f16f44f1313314f37
esp-idf/components/esp_system/port/soc/esp32
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Jiang Jiang Jian e3a5a85e2f Merge branch 'feature/gcov_esp32c3_v4.4' into 'release/v4.4'
debug_stubs and gcov: Refactor and add support for RISCV (v4.4)

See merge request espressif/esp-idf!17068
2022-02-16 03:26:49 +00:00
..
cache_err_int.c
esp32: move brownout and cache err int setup
2021-03-31 19:13:03 +08:00
cache_err_int.h
esp32: move brownout and cache err int setup
2021-03-31 19:13:03 +08:00
clk.c
esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset
2022-01-27 09:51:00 +00:00
CMakeLists.txt
debug_stubs: Refactor and add support for RISCV
2022-02-08 22:24:54 +03:00
component.mk
esp_system: support riscv panic
2020-11-13 07:49:11 +11:00
highint_hdl.S
Xtensa: Branch and jump intructions referencing a relative label have been replaced
2021-10-19 12:21:12 +08:00
intr.c
esp_system: support riscv panic
2020-11-13 07:49:11 +11:00
reset_reason.c
soc: add reset reasons in soc component
2021-07-13 10:45:38 +08:00
system_internal.c
esp_system: Fix RTC_WDT protection in esp_restart_noos
2022-01-10 21:57:29 +08:00
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