esp-idf/components/freertos/port/riscv at 1bd2145d6b87b51bee295f2f16f44f1313314f37 - esp-idf - brunner.ninja Code

espressif/esp-idf

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Alexey Gerenkov 9017ff235b riscv: Use semihosting to set breakpoint and watchpoint when running under debugger

2022-05-13 12:54:21 +03:00

..

include/freertos

freertos: Add portTRY_ENTRY_CRITICAL() and deprecate legacy spinlock fucntions

2021-11-22 18:42:10 +08:00

port.c

riscv: Use semihosting to set breakpoint and watchpoint when running under debugger

2022-05-13 12:54:21 +03:00

portasm.S

core: fix cases where riscv SP were not 16 byte aligned

2021-02-19 11:26:21 +08:00