Song Ruo Jing 28df79aee8 feat(clk): Add basic clock support for esp32h4

2025-07-10 16:35:53 +08:00

..

adc_channel.h

adc: make adc_channel.h macros work with ng driver

2023-01-09 14:25:24 +08:00

bb_reg.h

esp8684: rename target to esp32c2

2022-01-19 11:08:57 +08:00

boot_mode.h

esp8684: rename target to esp32c2

2022-01-19 11:08:57 +08:00

clk_tree_defs.h

feat(clk): Add basic clock support for esp32h4

2025-07-10 16:35:53 +08:00

clkout_channel.h

refactor(soc): reformat code with astyle

2024-11-22 11:09:38 +08:00

dport_access.h

refactor(soc): sort esp32c2 soc headers

2024-10-12 09:43:41 +08:00

dport_reg.h

dport: Move DPORT workaround to G0

2022-05-31 13:44:18 +08:00

efuse_defs.h

efuse: Update efuses for esp32 esp32c2 esp32c3 esp32s2 esp32s3

2023-04-04 22:32:32 +08:00

ext_mem_defs.h

refactor(soc): reformat code with astyle

2024-11-22 11:09:38 +08:00

fe_reg.h

esp8684: rename target to esp32c2

2022-01-19 11:08:57 +08:00

gdma_channel.h

feat(esp_gdma): add hal interface for common operations

2023-07-10 13:45:57 +08:00

gpio_num.h

refactor(gpio): per-target gpio number definition

2023-07-03 13:33:11 +08:00

gpio_pins.h

refactor(soc): reformat code with astyle

2024-11-22 11:09:38 +08:00

gpio_sig_map.h

esp8684: rename target to esp32c2

2022-01-19 11:08:57 +08:00

hwcrypto_reg.h

esp32c2: xts-aes register prefix discrepency

2023-05-25 11:27:18 +05:30

interrupt_reg.h

refactor(soc): sort esp32c2 soc headers

2024-10-12 09:43:41 +08:00

interrupts.h

fix(peripherals): Correct typo in periph_inttrput_t

2025-05-15 18:40:57 +08:00

Kconfig.soc_caps.in

fix(cache): fixed SOC_CACHE_FREEZE_SUPPORTED not defined on c3/c2 issue

2025-06-16 13:13:22 +08:00

mmu.h

change(soc): added SOC_ prefix to mmu defs

2023-09-05 15:47:26 +08:00

nrx_reg.h

esp8684: rename target to esp32c2

2022-01-19 11:08:57 +08:00

periph_defs.h

refactor(interrupt):put the interrupts definitions in soc/interrupts.h

2023-07-17 19:31:56 +08:00

regi2c_bbpll.h

Refactor: move regi2c_*.h header files from esp_hw_support to soc component

2022-06-30 09:40:44 +00:00

regi2c_bias.h

Refactor: move regi2c_*.h header files from esp_hw_support to soc component

2022-06-30 09:40:44 +00:00

regi2c_brownout.h

G0: RISC-V targets have now an independent G0 layer

2022-06-14 15:00:53 +08:00

regi2c_defs.h

refactor(regi2c): remove regi2c_defs.h from some targets

2025-05-19 21:46:40 +08:00

regi2c_dig_reg.h

Refactor: move regi2c_*.h header files from esp_hw_support to soc component

2022-06-30 09:40:44 +00:00

regi2c_lp_bias.h

Refactor: move regi2c_*.h header files from esp_hw_support to soc component

2022-06-30 09:40:44 +00:00

regi2c_saradc.h

G0: RISC-V targets have now an independent G0 layer

2022-06-14 15:00:53 +08:00

reset_reasons.h

refactor(soc): reformat code with astyle

2024-11-22 11:09:38 +08:00

soc_caps.h

fix(cache): fixed SOC_CACHE_FREEZE_SUPPORTED not defined on c3/c2 issue

2025-06-16 13:13:22 +08:00

soc_pins.h

esp8684: rename target to esp32c2

2022-01-19 11:08:57 +08:00

soc.h

feat(clk): Add basic clock support for esp32h4

2025-07-10 16:35:53 +08:00

spi_pins.h

fix(mspi): collect mspi iomux pin macro from iomux_reg.h to spi_pins.h

2024-09-03 13:55:00 +08:00

system_intr.h

feat(driver_spi): add h21 spi drivers supports

2025-04-03 11:27:29 +08:00

uart_channel.h

uart: Provide support for esp32c2 and esp32h2

2022-03-02 11:29:13 +08:00

uart_pins.h

esp8684: rename target to esp32c2

2022-01-19 11:08:57 +08:00

wdev_reg.h

fix(soc): Add the unavailable TRM mentioned RNG_DATA_REG register for C2 and C3

2025-01-24 10:50:05 +05:30