mirror of
https://github.com/espressif/esp-idf.git
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200 lines
7.4 KiB
C
200 lines
7.4 KiB
C
/*
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* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "hal/spi_ll.h"
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#include "hal/dac_ll.h"
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#include "hal/adc_ll.h"
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#include "soc/lldesc.h"
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#include "esp_private/dac_dma.h"
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#include "esp_private/periph_ctrl.h"
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#include "driver/spi_common_internal.h"
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#include "esp_check.h"
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#define DAC_DMA_PERIPH_SPI_HOST SPI3_HOST
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typedef struct {
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void *periph_dev; /* DMA peripheral device address */
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uint32_t dma_chan;
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intr_handle_t intr_handle; /* Interrupt handle */
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} dac_dma_periph_spi_t;
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static dac_dma_periph_spi_t *s_ddp = NULL; // Static DAC DMA peripheral structure pointer
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static const char *TAG = "DAC_DMA";
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extern portMUX_TYPE dac_spinlock; /* Global DAC spinlock */
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/**
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* @brief Calculate and set DAC data frequency
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* @note DAC clcok shares clock devider with ADC, the clock source is APB or APLL on ESP32-S2
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* freq_hz = (source_clk / (clk_div + (b / a) + 1)) / interval
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* interval range: 1~4095, to avoid decimal as possible, all calculations will base on interval = 4000
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* @param freq_hz DAC byte frequency
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* @return
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* - ESP_OK config success
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* - ESP_ERR_INVALID_ARG invalid frequency
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*/
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// TODO: check clock again, the dma data seems abnormal
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static esp_err_t dac_dma_periph_set_clock(uint32_t freq_hz){
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ESP_RETURN_ON_FALSE(freq_hz >= 80, ESP_ERR_INVALID_ARG, TAG, "the DAC frequency should be greater than 80 Hz");
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// TODO: replace 80000000 with APB or APLL clock frequency
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// when interval = 4000, max_freq = 20k min_freq = 80
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uint32_t freq_khz = freq_hz / 1000;
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/* If freq_khz < 20k, interval = 4000 is enough, so mutiple = 1,
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* otherwise interval need to zoom out to increase the max_freq,
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* And in order to avoid decimal as possible, multiple better to be 2^n */
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uint32_t multiple = freq_khz < 20 ? 1 : 1 << (32 - __builtin_clz(freq_khz / 20)); // Multiple need to be 2^n to avoid decimal
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uint32_t interval = 4000 / multiple; // Zoom in the max/min supported freq by zooming out interval
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ESP_RETURN_ON_FALSE(interval > 0, ESP_ERR_INVALID_ARG, TAG, "the DAC frequency is too big");
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uint32_t clk_div = (80000000 / interval) / freq_hz;
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uint32_t mod = (80000000 / interval) % freq_hz;
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uint32_t a = 0;
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uint32_t b = 1;
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if (mod == 0) {
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goto finish;
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}
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uint32_t min_diff = mod + 1;
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for (uint32_t tmp_b = 1; tmp_b < 64; tmp_b++) {
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uint32_t tmp_a = (uint32_t)(((mod * b) / (float)freq_hz) + 0.5);
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uint32_t diff = (uint32_t)abs((int)(mod * tmp_b) - (int)(freq_hz * tmp_a));
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if (diff == 0) {
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a = tmp_a;
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b = tmp_b;
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goto finish;
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}
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if (diff < min_diff) {
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min_diff = diff;
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a = tmp_a;
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b = tmp_b;
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}
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}
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finish:
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portENTER_CRITICAL(&dac_spinlock);
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dac_ll_digi_clk_inv(true);
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dac_ll_digi_set_trigger_interval(interval); // secondary clock division
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adc_ll_digi_controller_clk_div(clk_div, b, a);
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adc_ll_digi_clk_sel(false);
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portEXIT_CRITICAL(&dac_spinlock);
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return ESP_OK;
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}
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esp_err_t dac_dma_periph_init(int chan_num, uint32_t freq_hz, bool is_alternate)
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{
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esp_err_t ret = ESP_OK;
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/* Acquire DMA peripheral */
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ESP_RETURN_ON_FALSE(spicommon_periph_claim(DAC_DMA_PERIPH_SPI_HOST, "dac_dma"), ESP_ERR_NOT_FOUND, TAG, "Failed to acquire DAC DMA peripheral");
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// TODO: reference count, maybe only required on s2
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periph_module_enable(PERIPH_SARADC_MODULE);
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/* Allocate DAC DMA peripheral object */
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s_ddp = (dac_dma_periph_spi_t *)calloc(1, sizeof(dac_dma_periph_spi_t));
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ESP_GOTO_ON_FALSE(s_ddp, ESP_ERR_NO_MEM, err, TAG, "No memory for DAC DMA object");
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s_ddp->periph_dev = (void *)SPI_LL_GET_HW(DAC_DMA_PERIPH_SPI_HOST);
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// TODO: clock may related to convert mode (mono/stereo)
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ESP_GOTO_ON_ERROR(dac_dma_periph_set_clock(freq_hz), err, TAG, "Failed to set clock of DMA peripheral");
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portENTER_CRITICAL(&dac_spinlock);
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dac_ll_digi_set_convert_mode(is_alternate);
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portEXIT_CRITICAL(&dac_spinlock);
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return ret;
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err:
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dac_dma_periph_deinit();
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return ret;
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}
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esp_err_t dac_dma_periph_deinit(void)
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{
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ESP_RETURN_ON_FALSE(spicommon_periph_free(DAC_DMA_PERIPH_SPI_HOST), ESP_FAIL, TAG, "Failed to release DAC DMA peripheral");
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// TODO: reference count, maybe only required on s2
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periph_module_disable(PERIPH_SARADC_MODULE);
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if (s_ddp) {
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if (s_ddp->intr_handle) {
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dac_dma_periph_deregister_intr();
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}
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free(s_ddp);
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s_ddp = NULL;
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}
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return ESP_OK;
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}
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esp_err_t dac_dma_periph_register_intr(intr_handler_t intr_handler_func, void *user_ctx)
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{
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ESP_RETURN_ON_FALSE(s_ddp, ESP_ERR_INVALID_STATE, TAG, "DAC DMA peripheral has not initialized yet");
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ESP_RETURN_ON_ERROR(spicommon_dma_chan_alloc(DAC_DMA_PERIPH_SPI_HOST, SPI_DMA_CH_AUTO, &s_ddp->dma_chan, &s_ddp->dma_chan),
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TAG, "Failed to allocate dma peripheral channel");
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esp_err_t ret = ESP_OK;
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/* Regigster interrupt */
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ESP_GOTO_ON_ERROR(esp_intr_alloc(spicommon_irqdma_source_for_host(DAC_DMA_PERIPH_SPI_HOST),
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0, intr_handler_func, user_ctx, &(s_ddp->intr_handle)), err, TAG, "Failed to register DAC DMA interrupt");
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portENTER_CRITICAL(&dac_spinlock);
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spi_ll_enable_intr(s_ddp->periph_dev, SPI_LL_INTR_OUT_EOF);
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portEXIT_CRITICAL(&dac_spinlock);
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return ret;
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err:
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spicommon_dma_chan_free(DAC_DMA_PERIPH_SPI_HOST);
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return ret;
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}
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esp_err_t dac_dma_periph_deregister_intr(void)
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{
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ESP_RETURN_ON_FALSE(s_ddp, ESP_ERR_INVALID_STATE, TAG, "DAC DMA peripheral has not initialized yet");
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ESP_RETURN_ON_ERROR(spicommon_dma_chan_free(DAC_DMA_PERIPH_SPI_HOST), TAG, "Failed to free dma peripheral channel");
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if (s_ddp->intr_handle) {
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portENTER_CRITICAL(&dac_spinlock);
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spi_ll_disable_intr(s_ddp->periph_dev, SPI_LL_INTR_OUT_EOF);
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portEXIT_CRITICAL(&dac_spinlock);
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esp_intr_free(s_ddp->intr_handle);
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s_ddp->intr_handle = NULL;
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}
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return ESP_OK;
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}
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void dac_dma_periph_enable(void)
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{
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portENTER_CRITICAL(&dac_spinlock);
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spi_dma_ll_tx_reset(s_ddp->periph_dev, s_ddp->dma_chan);
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spi_ll_dma_tx_fifo_reset(s_ddp->periph_dev);
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dac_ll_digi_trigger_output(true);
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portEXIT_CRITICAL(&dac_spinlock);
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/* Enable interrupt */
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esp_intr_enable(s_ddp->intr_handle);
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}
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void dac_dma_periph_disable(void)
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{
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portENTER_CRITICAL(&dac_spinlock);
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spi_dma_ll_tx_reset(s_ddp->periph_dev, s_ddp->dma_chan);
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spi_ll_dma_tx_fifo_reset(s_ddp->periph_dev);
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spi_dma_ll_tx_stop(s_ddp->periph_dev, s_ddp->dma_chan);
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dac_ll_digi_trigger_output(false);
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portEXIT_CRITICAL(&dac_spinlock);
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/* Disable interrupt */
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esp_intr_disable(s_ddp->intr_handle);
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}
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bool IRAM_ATTR dac_dma_periph_intr_is_triggered(void)
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{
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uint32_t is_triggered = spi_ll_get_intr(s_ddp->periph_dev, SPI_LL_INTR_OUT_EOF);
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spi_ll_clear_intr(s_ddp->periph_dev, SPI_LL_INTR_OUT_EOF);
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return is_triggered;
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}
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uint32_t IRAM_ATTR dac_dma_periph_intr_get_eof_desc(void)
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{
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return spi_dma_ll_get_out_eof_desc_addr(s_ddp->periph_dev, s_ddp->dma_chan);
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}
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void dac_dma_periph_dma_trans_start(uint32_t desc_addr)
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{
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portENTER_CRITICAL(&dac_spinlock);
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spi_dma_ll_tx_reset(s_ddp->periph_dev, s_ddp->dma_chan);
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spi_ll_dma_tx_fifo_reset(s_ddp->periph_dev);
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spi_dma_ll_tx_start(s_ddp->periph_dev, s_ddp->dma_chan, (lldesc_t *)desc_addr);
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portEXIT_CRITICAL(&dac_spinlock);
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}
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