mirror of
https://github.com/espressif/esp-idf.git
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380 lines
10 KiB
C
380 lines
10 KiB
C
/**
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Group: Configuration Registers */
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/** Type of cpu_peri_clk_en register
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* register description
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*/
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typedef union {
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struct {
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uint32_t reserved_0:6;
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/** clk_en_assist_debug : R/W; bitpos: [6]; default: 0;
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* Need add description
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*/
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uint32_t clk_en_assist_debug:1;
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/** clk_en_dedicated_gpio : R/W; bitpos: [7]; default: 0;
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* Need add description
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*/
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uint32_t clk_en_dedicated_gpio:1;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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} system_cpu_peri_clk_en_reg_t;
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/** Type of cpu_peri_rst_en register
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* register description
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*/
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typedef union {
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struct {
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uint32_t reserved_0:6;
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/** rst_en_assist_debug : R/W; bitpos: [6]; default: 1;
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* Need add description
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*/
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uint32_t rst_en_assist_debug:1;
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/** rst_en_dedicated_gpio : R/W; bitpos: [7]; default: 1;
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* Need add description
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*/
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uint32_t rst_en_dedicated_gpio:1;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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} system_cpu_peri_rst_en_reg_t;
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/** Type of cpu_per_conf register
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* register description
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*/
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typedef union {
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struct {
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uint32_t reserved_0:3;
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/** cpu_wait_mode_force_on : R/W; bitpos: [3]; default: 1;
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* Need add description
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*/
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uint32_t cpu_wait_mode_force_on:1;
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/** cpu_waiti_delay_num : R/W; bitpos: [7:4]; default: 0;
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* Need add description
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*/
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uint32_t cpu_waiti_delay_num:4;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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} system_cpu_per_conf_reg_t;
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/** Type of mem_pd_mask register
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* register description
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*/
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typedef union {
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struct {
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/** lslp_mem_pd_mask : R/W; bitpos: [0]; default: 1;
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* Need add description
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*/
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uint32_t lslp_mem_pd_mask:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} system_mem_pd_mask_reg_t;
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/** Type of cpu_intr_from_cpu_0 register
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* register description
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*/
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typedef union {
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struct {
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/** cpu_intr_from_cpu_0 : R/W; bitpos: [0]; default: 0;
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* Need add description
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*/
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uint32_t cpu_intr_from_cpu_0:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} system_cpu_intr_from_cpu_0_reg_t;
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/** Type of cpu_intr_from_cpu_1 register
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* register description
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*/
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typedef union {
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struct {
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/** cpu_intr_from_cpu_1 : R/W; bitpos: [0]; default: 0;
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* Need add description
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*/
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uint32_t cpu_intr_from_cpu_1:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} system_cpu_intr_from_cpu_1_reg_t;
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/** Type of cpu_intr_from_cpu_2 register
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* register description
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*/
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typedef union {
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struct {
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/** cpu_intr_from_cpu_2 : R/W; bitpos: [0]; default: 0;
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* Need add description
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*/
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uint32_t cpu_intr_from_cpu_2:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} system_cpu_intr_from_cpu_2_reg_t;
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/** Type of cpu_intr_from_cpu_3 register
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* register description
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*/
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typedef union {
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struct {
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/** cpu_intr_from_cpu_3 : R/W; bitpos: [0]; default: 0;
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* Need add description
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*/
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uint32_t cpu_intr_from_cpu_3:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} system_cpu_intr_from_cpu_3_reg_t;
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/** Type of rsa_pd_ctrl register
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* register description
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*/
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typedef union {
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struct {
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/** rsa_mem_pd : R/W; bitpos: [0]; default: 1;
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* Need add description
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*/
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uint32_t rsa_mem_pd:1;
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/** rsa_mem_force_pu : R/W; bitpos: [1]; default: 0;
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* Need add description
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*/
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uint32_t rsa_mem_force_pu:1;
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/** rsa_mem_force_pd : R/W; bitpos: [2]; default: 0;
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* Need add description
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*/
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uint32_t rsa_mem_force_pd:1;
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uint32_t reserved_3:29;
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};
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uint32_t val;
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} system_rsa_pd_ctrl_reg_t;
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/** Type of edma_ctrl register
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* register description
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*/
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typedef union {
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struct {
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/** edma_clk_on : R/W; bitpos: [0]; default: 1;
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* Need add description
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*/
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uint32_t edma_clk_on:1;
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/** edma_reset : R/W; bitpos: [1]; default: 0;
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* Need add description
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*/
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uint32_t edma_reset:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} system_edma_ctrl_reg_t;
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/** Type of cache_control register
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* register description
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*/
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typedef union {
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struct {
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/** icache_clk_on : R/W; bitpos: [0]; default: 1;
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* Need add description
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*/
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uint32_t icache_clk_on:1;
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/** icache_reset : R/W; bitpos: [1]; default: 0;
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* Need add description
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*/
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uint32_t icache_reset:1;
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/** dcache_clk_on : R/W; bitpos: [2]; default: 1;
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* Need add description
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*/
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uint32_t dcache_clk_on:1;
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/** dcache_reset : R/W; bitpos: [3]; default: 0;
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* Need add description
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*/
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uint32_t dcache_reset:1;
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uint32_t reserved_4:28;
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};
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uint32_t val;
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} system_cache_control_reg_t;
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/** Type of external_device_encrypt_decrypt_control register
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* register description
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*/
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typedef union {
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struct {
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/** enable_spi_manual_encrypt : R/W; bitpos: [0]; default: 0;
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* Need add description
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*/
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uint32_t enable_spi_manual_encrypt:1;
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/** enable_download_db_encrypt : R/W; bitpos: [1]; default: 0;
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* Need add description
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*/
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uint32_t enable_download_db_encrypt:1;
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/** enable_download_g0cb_decrypt : R/W; bitpos: [2]; default: 0;
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* Need add description
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*/
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uint32_t enable_download_g0cb_decrypt:1;
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/** enable_download_manual_encrypt : R/W; bitpos: [3]; default: 0;
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* Need add description
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*/
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uint32_t enable_download_manual_encrypt:1;
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uint32_t reserved_4:28;
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};
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uint32_t val;
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} system_external_device_encrypt_decrypt_control_reg_t;
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/** Type of rtc_fastmem_config register
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* register description
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*/
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typedef union {
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struct {
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uint32_t reserved_0:8;
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/** rtc_mem_crc_start : R/W; bitpos: [8]; default: 0;
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* Need add description
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*/
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uint32_t rtc_mem_crc_start:1;
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/** rtc_mem_crc_addr : R/W; bitpos: [19:9]; default: 0;
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* Need add description
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*/
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uint32_t rtc_mem_crc_addr:11;
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/** rtc_mem_crc_len : R/W; bitpos: [30:20]; default: 2047;
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* Need add description
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*/
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uint32_t rtc_mem_crc_len:11;
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/** rtc_mem_crc_finish : RO; bitpos: [31]; default: 0;
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* Need add description
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*/
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uint32_t rtc_mem_crc_finish:1;
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};
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uint32_t val;
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} system_rtc_fastmem_config_reg_t;
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/** Type of rtc_fastmem_crc register
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* register description
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*/
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typedef union {
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struct {
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/** rtc_mem_crc_res : RO; bitpos: [31:0]; default: 0;
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* Need add description
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*/
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uint32_t rtc_mem_crc_res:32;
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};
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uint32_t val;
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} system_rtc_fastmem_crc_reg_t;
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/** Type of redundant_eco_ctrl register
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* register description
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*/
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typedef union {
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struct {
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/** redundant_eco_drive : R/W; bitpos: [0]; default: 0;
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* Need add description
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*/
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uint32_t redundant_eco_drive:1;
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/** redundant_eco_result : RO; bitpos: [1]; default: 0;
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* Need add description
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*/
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uint32_t redundant_eco_result:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} system_redundant_eco_ctrl_reg_t;
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/** Type of clock_gate register
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* register description
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*/
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typedef union {
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struct {
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/** clk_en : R/W; bitpos: [0]; default: 1;
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* Need add description
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*/
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uint32_t clk_en:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} system_clock_gate_reg_t;
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/** Type of mem_pvt register
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* register description
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*/
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typedef union {
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struct {
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/** mem_path_len : R/W; bitpos: [3:0]; default: 3;
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* Need add description
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*/
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uint32_t mem_path_len:4;
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/** mem_err_cnt_clr : WO; bitpos: [4]; default: 0;
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* Need add description
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*/
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uint32_t mem_err_cnt_clr:1;
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/** mem_pvt_monitor_en : R/W; bitpos: [5]; default: 0;
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* Need add description
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*/
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uint32_t mem_pvt_monitor_en:1;
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/** mem_timing_err_cnt : RO; bitpos: [21:6]; default: 0;
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* Need add description
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*/
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uint32_t mem_timing_err_cnt:16;
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/** mem_vt_sel : R/W; bitpos: [23:22]; default: 0;
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* Need add description
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*/
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uint32_t mem_vt_sel:2;
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uint32_t reserved_24:8;
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};
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uint32_t val;
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} system_mem_pvt_reg_t;
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/** Type of system_reg_date register
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* register description
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*/
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typedef union {
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struct {
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/** system_reg_date : R/W; bitpos: [27:0]; default: 34615872;
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* Need add description
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*/
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uint32_t system_reg_date:28;
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uint32_t reserved_28:4;
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};
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uint32_t val;
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} system_system_reg_date_reg_t;
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typedef struct {
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volatile system_cpu_peri_clk_en_reg_t cpu_peri_clk_en;
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volatile system_cpu_peri_rst_en_reg_t cpu_peri_rst_en;
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volatile system_cpu_per_conf_reg_t cpu_per_conf;
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volatile system_mem_pd_mask_reg_t mem_pd_mask;
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volatile system_cpu_intr_from_cpu_0_reg_t cpu_intr_from_cpu_0;
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volatile system_cpu_intr_from_cpu_1_reg_t cpu_intr_from_cpu_1;
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volatile system_cpu_intr_from_cpu_2_reg_t cpu_intr_from_cpu_2;
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volatile system_cpu_intr_from_cpu_3_reg_t cpu_intr_from_cpu_3;
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volatile system_rsa_pd_ctrl_reg_t rsa_pd_ctrl;
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volatile system_edma_ctrl_reg_t edma_ctrl;
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volatile system_cache_control_reg_t cache_control;
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volatile system_external_device_encrypt_decrypt_control_reg_t external_device_encrypt_decrypt_control;
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volatile system_rtc_fastmem_config_reg_t rtc_fastmem_config;
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volatile system_rtc_fastmem_crc_reg_t rtc_fastmem_crc;
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volatile system_redundant_eco_ctrl_reg_t redundant_eco_ctrl;
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volatile system_clock_gate_reg_t clock_gate;
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volatile system_mem_pvt_reg_t mem_pvt;
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uint32_t reserved_044[1006];
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volatile system_system_reg_date_reg_t system_reg_date;
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} system_dev_t;
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extern system_dev_t SYSTEM;
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#ifndef __cplusplus
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_Static_assert(sizeof(system_dev_t) == 0x1000, "Invalid size of system_dev_t structure");
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#endif
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#ifdef __cplusplus
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}
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#endif
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