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b8d6985dcad8706bf7b7b4cfa0f455212fdb7ccc
esp-idf/components/soc/esp32c3/include/soc
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Jiang Jiang Jian f5ae8b0533 Merge branch 'feature/ledc_use_rtc8m_or_xtal_lightsleep' into 'master' 
support RTC8M and XTAL power domain in light sleep mode

Closes IDF-3419

See merge request espressif/esp-idf!15152
2021-09-27 04:02:29 +00:00
..
adc_channel.h
adc: update adc header files on c3
2021-03-26 12:04:46 +08:00
apb_ctrl_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
apb_ctrl_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
apb_saradc_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
apb_saradc_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
assist_debug_reg.h
fix reg name character error
2021-09-15 21:51:20 +08:00
bb_reg.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
boot_mode.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
cache_memory.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
clkout_channel.h
driver: Add esp32c3 drivers (except ADC/DAC) and update tests
2020-12-23 09:53:24 +11:00
dport_access.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
efuse_reg.h
efuse: remove DIS_RTC_RAM_BOOT efuse bit
2021-09-18 14:58:43 +08:00
efuse_struct.h
efuse: remove DIS_RTC_RAM_BOOT efuse bit
2021-09-18 14:58:43 +08:00
extmem_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
fe_reg.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
gdma_channel.h
gdma: dynamic alloc DMA channels
2021-01-13 10:52:27 +08:00
gdma_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
gdma_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
gpio_pins.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
gpio_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
gpio_sd_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
gpio_sd_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
gpio_sig_map.h
fast_gpio: driver support on esp32c3
2021-09-06 19:39:09 +08:00
gpio_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
hwcrypto_reg.h
hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3
2021-09-06 11:06:50 +05:30
i2c_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
i2c_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
i2s_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
i2s_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
interrupt_core0_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
interrupt_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
io_mux_reg.h
uart: uart_set_pin function will now use IOMUX whenever possible
2021-08-04 12:48:30 +08:00
ledc_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
ledc_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
mmu.h
soc: Update esp32c3 soc headers
2020-12-24 10:47:34 +11:00
nrx_reg.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
periph_defs.h
esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt
2021-08-03 14:35:29 +08:00
reset_reasons.h
update reset reason for c3/s3/h2
2021-08-13 17:45:53 +08:00
rmt_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
rmt_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
rtc_cntl_reg.h
fix c3 hardware bug before ECO3 and optimizate bbpll config:
2021-03-31 13:08:56 +00:00
rtc_cntl_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
rtc_i2c_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
rtc_i2c_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
rtc.h
esp_hw_support: keep external 40 MHz xtal related analog circuit power on during sleep
2021-09-16 14:46:21 +08:00
sensitive_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
sensitive_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
soc_caps.h
Merge branch 'feature/support_adc_calibration_s3' into 'master'
2021-09-14 08:51:03 +00:00
soc_pins.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
soc_ulp.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
soc.h
soc: remove outdated description of interrupts on RISCV CPUs
2021-08-30 17:38:16 +08:00
spi_mem_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
spi_mem_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
spi_pins.h
spi: remove HSPI macro on esp32c3 and esp32s3
2021-04-06 13:42:49 +08:00
spi_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
spi_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
syscon_reg.h
soc: Update esp32c3 soc headers
2020-12-24 10:47:34 +11:00
syscon_struct.h
rename APB_CTRL ro SYS_CON
2021-09-16 20:57:57 +08:00
system_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
system_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
systimer_reg.h
systimer: update soc data
2021-04-22 21:07:35 +08:00
systimer_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
timer_group_reg.h
timer_group: fix wrongly generated reg header that introduced in 443845fd54
2021-08-30 13:51:25 +08:00
timer_group_struct.h
timer_group: update reg headers for c3&s2&h2 and fix direct 8/16bit reg access
2021-08-19 18:56:32 +08:00
twai_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
uart_channel.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
uart_pins.h
uart: uart_set_pin function will now use IOMUX whenever possible
2021-08-04 12:48:30 +08:00
uart_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
uart_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
uhci_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
uhci_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
usb_serial_jtag_reg.h
usb_serial_jtag: Add blocking driver to support vfs.
2021-07-05 11:22:38 +08:00
usb_serial_jtag_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
wdev_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00