mirror of
https://github.com/espressif/esp-idf.git
synced 2025-11-04 09:01:40 +01:00
399d2d2605
Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... . Cleaned up header files from unnecessary headers (releated to soc/... headers).
327 lines
11 KiB
C
327 lines
11 KiB
C
#include <stdio.h>
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#include <stdlib.h>
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#include "esp_types.h"
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#include "esp32/clk.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/xtensa_timer.h"
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#include "soc/cpu.h"
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#include "unity.h"
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#include "test_utils.h"
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#include "esp32/rom/uart.h"
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#include "soc/uart_periph.h"
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#include "soc/dport_reg.h"
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#include "soc/rtc.h"
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#define MHZ (1000000)
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static volatile bool exit_flag;
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static bool dport_test_result;
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static bool apb_test_result;
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static void accessDPORT(void *pvParameters)
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{
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xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
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uint32_t dport_date = DPORT_REG_READ(DPORT_DATE_REG);
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dport_test_result = true;
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// although exit flag is set in another task, checking (exit_flag == false) is safe
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while (exit_flag == false) {
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if (dport_date != DPORT_REG_READ(DPORT_DATE_REG)) {
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dport_test_result = false;
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break;
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}
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}
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xSemaphoreGive(*sema);
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vTaskDelete(NULL);
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}
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static void accessAPB(void *pvParameters)
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{
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xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
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uint32_t uart_date = REG_READ(UART_DATE_REG(0));
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apb_test_result = true;
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// although exit flag is set in another task, checking (exit_flag == false) is safe
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while (exit_flag == false) {
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if (uart_date != REG_READ(UART_DATE_REG(0))) {
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apb_test_result = false;
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break;
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}
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}
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xSemaphoreGive(*sema);
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vTaskDelete(NULL);
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}
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void run_tasks(const char *task1_description, void (* task1_func)(void *), const char *task2_description, void (* task2_func)(void *), uint32_t delay_ms)
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{
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int i;
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TaskHandle_t th[2];
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xSemaphoreHandle exit_sema[2];
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for (i=0; i<2; i++) {
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if((task1_func != NULL && i == 0) || (task2_func != NULL && i == 1)){
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exit_sema[i] = xSemaphoreCreateBinary();
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}
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}
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exit_flag = false;
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#ifndef CONFIG_FREERTOS_UNICORE
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printf("assign task accessing DPORT to core 0 and task accessing APB to core 1\n");
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if(task1_func != NULL) xTaskCreatePinnedToCore(task1_func, task1_description, 2048, &exit_sema[0], UNITY_FREERTOS_PRIORITY - 1, &th[0], 0);
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if(task2_func != NULL) xTaskCreatePinnedToCore(task2_func, task2_description, 2048, &exit_sema[1], UNITY_FREERTOS_PRIORITY - 1, &th[1], 1);
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#else
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printf("assign task accessing DPORT and accessing APB\n");
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if(task1_func != NULL) xTaskCreate(task1_func, task1_description, 2048, &exit_sema[0], UNITY_FREERTOS_PRIORITY - 1, &th[0]);
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if(task2_func != NULL) xTaskCreate(task2_func, task2_description, 2048, &exit_sema[1], UNITY_FREERTOS_PRIORITY - 1, &th[1]);
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#endif
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printf("start wait for %d seconds [Test %s and %s]\n", delay_ms/1000, task1_description, task2_description);
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vTaskDelay(delay_ms / portTICK_PERIOD_MS);
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// set exit flag to let thread exit
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exit_flag = true;
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for (i=0; i<2; i++) {
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if ((task1_func != NULL && i == 0) || (task2_func != NULL && i == 1)) {
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xSemaphoreTake(exit_sema[i], portMAX_DELAY);
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vSemaphoreDelete(exit_sema[i]);
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}
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}
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TEST_ASSERT(dport_test_result == true && apb_test_result == true);
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}
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TEST_CASE("access DPORT and APB at same time", "[esp32]")
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{
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dport_test_result = false;
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apb_test_result = false;
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printf("CPU_FREQ = %d MHz\n", esp_clk_cpu_freq());
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run_tasks("accessDPORT", accessDPORT, "accessAPB", accessAPB, 10000);
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}
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void run_tasks_with_change_freq_cpu(int cpu_freq_mhz)
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{
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const int uart_num = CONFIG_ESP_CONSOLE_UART_NUM;
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const int uart_baud = CONFIG_ESP_CONSOLE_UART_BAUDRATE;
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dport_test_result = false;
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apb_test_result = false;
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rtc_cpu_freq_config_t old_config;
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rtc_clk_cpu_freq_get_config(&old_config);
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printf("CPU_FREQ = %d MHz\n", old_config.freq_mhz);
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if (cpu_freq_mhz != old_config.freq_mhz) {
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rtc_cpu_freq_config_t new_config;
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bool res = rtc_clk_cpu_freq_mhz_to_config(cpu_freq_mhz, &new_config);
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assert(res && "invalid frequency value");
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uart_tx_wait_idle(uart_num);
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rtc_clk_cpu_freq_set_config(&new_config);
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uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud);
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/* adjust RTOS ticks */
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_xt_tick_divisor = cpu_freq_mhz * 1000000 / XT_TICK_PER_SEC;
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vTaskDelay(2);
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printf("CPU_FREQ switched to %d MHz\n", cpu_freq_mhz);
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}
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run_tasks("accessDPORT", accessDPORT, "accessAPB", accessAPB, 10000);
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// return old freq.
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uart_tx_wait_idle(uart_num);
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rtc_clk_cpu_freq_set_config(&old_config);
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uart_div_modify(uart_num, (rtc_clk_apb_freq_get() << 4) / uart_baud);
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_xt_tick_divisor = old_config.freq_mhz * 1000000 / XT_TICK_PER_SEC;
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}
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TEST_CASE("access DPORT and APB at same time (Freq CPU and APB = 80 MHz)", "[esp32] [ignore]")
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{
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run_tasks_with_change_freq_cpu(80);
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}
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TEST_CASE("access DPORT and APB at same time (Freq CPU and APB = 40 MHz (XTAL))", "[esp32]")
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{
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run_tasks_with_change_freq_cpu((int) rtc_clk_xtal_freq_get());
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}
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static uint32_t stall_other_cpu_counter;
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static uint32_t pre_reading_apb_counter;
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static uint32_t apb_counter;
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static void accessDPORT_stall_other_cpu(void *pvParameters)
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{
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xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
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uint32_t dport_date = DPORT_REG_READ(DPORT_DATE_REG);
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uint32_t dport_date_cur;
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dport_test_result = true;
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stall_other_cpu_counter = 0;
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// although exit flag is set in another task, checking (exit_flag == false) is safe
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while (exit_flag == false) {
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++stall_other_cpu_counter;
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DPORT_STALL_OTHER_CPU_START();
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dport_date_cur = _DPORT_REG_READ(DPORT_DATE_REG);
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DPORT_STALL_OTHER_CPU_END();
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if (dport_date != dport_date_cur) {
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apb_test_result = false;
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break;
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}
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}
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xSemaphoreGive(*sema);
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vTaskDelete(NULL);
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}
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static void accessAPB_measure_performance(void *pvParameters)
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{
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xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
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uint32_t uart_date = REG_READ(UART_DATE_REG(0));
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apb_test_result = true;
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apb_counter = 0;
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// although exit flag is set in another task, checking (exit_flag == false) is safe
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while (exit_flag == false) {
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++apb_counter;
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if (uart_date != REG_READ(UART_DATE_REG(0))) {
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apb_test_result = false;
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break;
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}
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}
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xSemaphoreGive(*sema);
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vTaskDelete(NULL);
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}
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static void accessDPORT_pre_reading_apb(void *pvParameters)
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{
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xSemaphoreHandle *sema = (xSemaphoreHandle *) pvParameters;
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uint32_t dport_date = DPORT_REG_READ(DPORT_DATE_REG);
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uint32_t dport_date_cur;
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dport_test_result = true;
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pre_reading_apb_counter = 0;
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// although exit flag is set in another task, checking (exit_flag == false) is safe
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while (exit_flag == false) {
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++pre_reading_apb_counter;
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dport_date_cur = DPORT_REG_READ(DPORT_DATE_REG);
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if (dport_date != dport_date_cur) {
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apb_test_result = false;
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break;
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}
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}
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xSemaphoreGive(*sema);
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vTaskDelete(NULL);
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}
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TEST_CASE("test for DPORT access performance", "[esp32]")
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{
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dport_test_result = true;
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apb_test_result = true;
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typedef struct {
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uint32_t dport;
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uint32_t apb;
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uint32_t summ;
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} test_performance_t;
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test_performance_t t[5] = {0};
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uint32_t delay_ms = 5000;
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run_tasks("-", NULL, "accessAPB", accessAPB_measure_performance, delay_ms);
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t[0].apb = apb_counter;
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t[0].dport = 0;
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t[0].summ = t[0].apb + t[0].dport;
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run_tasks("accessDPORT_stall_other_cpu", accessDPORT_stall_other_cpu, "-", NULL, delay_ms);
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t[1].apb = 0;
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t[1].dport = stall_other_cpu_counter;
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t[1].summ = t[1].apb + t[1].dport;
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run_tasks("accessDPORT_pre_reading_apb", accessDPORT_pre_reading_apb, "-", NULL, delay_ms);
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t[2].apb = 0;
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t[2].dport = pre_reading_apb_counter;
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t[2].summ = t[2].apb + t[2].dport;
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run_tasks("accessDPORT_stall_other_cpu", accessDPORT_stall_other_cpu, "accessAPB", accessAPB_measure_performance, delay_ms);
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t[3].apb = apb_counter;
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t[3].dport = stall_other_cpu_counter;
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t[3].summ = t[3].apb + t[3].dport;
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run_tasks("accessDPORT_pre_reading_apb", accessDPORT_pre_reading_apb, "accessAPB", accessAPB_measure_performance, delay_ms);
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t[4].apb = apb_counter;
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t[4].dport = pre_reading_apb_counter;
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t[4].summ = t[4].apb + t[4].dport;
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printf("\nPerformance table: \n"
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"The number of simultaneous read operations of the APB and DPORT registers\n"
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"by different methods for %d seconds.\n", delay_ms/1000);
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printf("+-----------------------+----------+----------+----------+\n");
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printf("| Method read DPORT | DPORT | APB | SUMM |\n");
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printf("+-----------------------+----------+----------+----------+\n");
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printf("|1.Only accessAPB |%10d|%10d|%10d|\n", t[0].dport, t[0].apb, t[0].summ);
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printf("|2.Only STALL_OTHER_CPU |%10d|%10d|%10d|\n", t[1].dport, t[1].apb, t[1].summ);
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printf("|3.Only PRE_READ_APB_REG|%10d|%10d|%10d|\n", t[2].dport, t[2].apb, t[2].summ);
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printf("+-----------------------+----------+----------+----------+\n");
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printf("|4.STALL_OTHER_CPU |%10d|%10d|%10d|\n", t[3].dport, t[3].apb, t[3].summ);
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printf("|5.PRE_READ_APB_REG |%10d|%10d|%10d|\n", t[4].dport, t[4].apb, t[4].summ);
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printf("+-----------------------+----------+----------+----------+\n");
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printf("| ratio=PRE_READ/STALL |%10f|%10f|%10f|\n", (float)t[4].dport/t[3].dport, (float)t[4].apb/t[3].apb, (float)t[4].summ/t[3].summ);
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printf("+-----------------------+----------+----------+----------+\n");
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}
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#define REPEAT_OPS 10000
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static uint32_t start, end;
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#define BENCHMARK_START() do { \
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RSR(CCOUNT, start); \
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} while(0)
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#define BENCHMARK_END(OPERATION) do { \
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RSR(CCOUNT, end); \
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printf("%s took %d cycles/op (%d cycles for %d ops)\n", \
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OPERATION, (end - start)/REPEAT_OPS, \
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(end - start), REPEAT_OPS); \
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} while(0)
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TEST_CASE("BENCHMARK for DPORT access performance", "[freertos]")
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{
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BENCHMARK_START();
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for (int i = 0; i < REPEAT_OPS; i++) {
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DPORT_STALL_OTHER_CPU_START();
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_DPORT_REG_READ(DPORT_DATE_REG);
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DPORT_STALL_OTHER_CPU_END();
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}
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BENCHMARK_END("[old]DPORT access STALL OTHER CPU");
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BENCHMARK_START();
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for (int i = 0; i < REPEAT_OPS; i++) {
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DPORT_REG_READ(DPORT_DATE_REG);
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}
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BENCHMARK_END("[new]DPORT access PRE-READ APB REG");
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BENCHMARK_START();
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for (int i = 0; i < REPEAT_OPS; i++) {
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DPORT_SEQUENCE_REG_READ(DPORT_DATE_REG);
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}
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BENCHMARK_END("[seq]DPORT access PRE-READ APB REG");
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BENCHMARK_START();
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for (int i = 0; i < REPEAT_OPS; i++) {
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REG_READ(UART_DATE_REG(0));
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}
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BENCHMARK_END("REG_READ");
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BENCHMARK_START();
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for (int i = 0; i < REPEAT_OPS; i++) {
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_DPORT_REG_READ(DPORT_DATE_REG);
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}
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BENCHMARK_END("_DPORT_REG_READ");
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}
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