mirror of
https://github.com/espressif/esp-idf.git
synced 2025-11-04 00:51:42 +01:00
874a720286
update all struct headers to be more "standardized":
- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199
added helper macros to force peripheral registers being accessed in 32 bitwidth
added a check script into ci
223 lines
9.0 KiB
C
223 lines
9.0 KiB
C
// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _SOC_LEDC_STRUCT_H_
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#define _SOC_LEDC_STRUCT_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef volatile struct ledc_dev_s {
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struct {
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struct {
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union {
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struct {
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uint32_t timer_sel: 2; /*There are four high speed timers the two bits are used to select one of them for high speed channel. 2'b00: seletc hstimer0. 2'b01: select hstimer1. 2'b10: select hstimer2. 2'b11: select hstimer3.*/
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uint32_t sig_out_en: 1; /*This is the output enable control bit for high speed channel*/
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uint32_t idle_lv: 1; /*This bit is used to control the output value when high speed channel is off.*/
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uint32_t low_speed_update: 1; /*This bit is only useful for low speed timer channels, reserved for high speed timers*/
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uint32_t ovf_num: 10;
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uint32_t ovf_cnt_en: 1;
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uint32_t ovf_cnt_rst: 1;
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uint32_t ovf_cnt_rst_st: 1;
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uint32_t reserved18: 14;
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};
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uint32_t val;
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} conf0;
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union {
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struct {
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uint32_t hpoint: 14;
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uint32_t reserved14: 18;
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};
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uint32_t val;
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} hpoint;
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union {
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struct {
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uint32_t duty: 19;
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uint32_t reserved19:13;
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};
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uint32_t val;
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} duty;
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union {
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struct {
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uint32_t duty_scale: 10;
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uint32_t duty_cycle: 10;
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uint32_t duty_num: 10;
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uint32_t duty_inc: 1;
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uint32_t duty_start: 1;
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};
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uint32_t val;
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} conf1;
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union {
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struct {
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uint32_t duty_read: 19;
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uint32_t reserved19:13;
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};
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uint32_t val;
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} duty_rd;
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} channel[8];
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} channel_group[1]; /* single channel group, low speed mode only */
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struct {
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struct {
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union {
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struct {
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uint32_t duty_resolution: 4;
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uint32_t clock_divider: 18;
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uint32_t pause: 1;
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uint32_t rst: 1;
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uint32_t tick_sel: 1;
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uint32_t low_speed_update: 1;
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uint32_t reserved26: 6;
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};
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uint32_t val;
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} conf;
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union {
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struct {
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uint32_t timer_cnt: 14;
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uint32_t reserved14: 18;
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};
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uint32_t val;
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} value;
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} timer[4];
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} timer_group[1]; /* single channel group, low speed mode only */
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union {
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struct {
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uint32_t lstimer0_ovf: 1;
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uint32_t lstimer1_ovf: 1;
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uint32_t lstimer2_ovf: 1;
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uint32_t lstimer3_ovf: 1;
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uint32_t duty_chng_end_lsch0: 1;
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uint32_t duty_chng_end_lsch1: 1;
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uint32_t duty_chng_end_lsch2: 1;
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uint32_t duty_chng_end_lsch3: 1;
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uint32_t duty_chng_end_lsch4: 1;
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uint32_t duty_chng_end_lsch5: 1;
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uint32_t duty_chng_end_lsch6: 1;
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uint32_t duty_chng_end_lsch7: 1;
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uint32_t ovf_cnt_lsch0: 1;
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uint32_t ovf_cnt_lsch1: 1;
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uint32_t ovf_cnt_lsch2: 1;
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uint32_t ovf_cnt_lsch3: 1;
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uint32_t ovf_cnt_lsch4: 1;
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uint32_t ovf_cnt_lsch5: 1;
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uint32_t ovf_cnt_lsch6: 1;
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uint32_t ovf_cnt_lsch7: 1;
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uint32_t reserved20: 12;
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};
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uint32_t val;
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} int_raw;
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union {
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struct {
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uint32_t lstimer0_ovf: 1;
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uint32_t lstimer1_ovf: 1;
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uint32_t lstimer2_ovf: 1;
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uint32_t lstimer3_ovf: 1;
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uint32_t duty_chng_end_lsch0: 1;
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uint32_t duty_chng_end_lsch1: 1;
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uint32_t duty_chng_end_lsch2: 1;
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uint32_t duty_chng_end_lsch3: 1;
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uint32_t duty_chng_end_lsch4: 1;
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uint32_t duty_chng_end_lsch5: 1;
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uint32_t duty_chng_end_lsch6: 1;
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uint32_t duty_chng_end_lsch7: 1;
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uint32_t ovf_cnt_lsch0: 1;
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uint32_t ovf_cnt_lsch1: 1;
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uint32_t ovf_cnt_lsch2: 1;
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uint32_t ovf_cnt_lsch3: 1;
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uint32_t ovf_cnt_lsch4: 1;
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uint32_t ovf_cnt_lsch5: 1;
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uint32_t ovf_cnt_lsch6: 1;
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uint32_t ovf_cnt_lsch7: 1;
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uint32_t reserved20: 12;
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};
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uint32_t val;
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} int_st;
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union {
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struct {
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uint32_t lstimer0_ovf: 1;
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uint32_t lstimer1_ovf: 1;
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uint32_t lstimer2_ovf: 1;
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uint32_t lstimer3_ovf: 1;
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uint32_t duty_chng_end_lsch0: 1;
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uint32_t duty_chng_end_lsch1: 1;
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uint32_t duty_chng_end_lsch2: 1;
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uint32_t duty_chng_end_lsch3: 1;
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uint32_t duty_chng_end_lsch4: 1;
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uint32_t duty_chng_end_lsch5: 1;
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uint32_t duty_chng_end_lsch6: 1;
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uint32_t duty_chng_end_lsch7: 1;
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uint32_t ovf_cnt_lsch0: 1;
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uint32_t ovf_cnt_lsch1: 1;
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uint32_t ovf_cnt_lsch2: 1;
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uint32_t ovf_cnt_lsch3: 1;
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uint32_t ovf_cnt_lsch4: 1;
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uint32_t ovf_cnt_lsch5: 1;
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uint32_t ovf_cnt_lsch6: 1;
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uint32_t ovf_cnt_lsch7: 1;
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uint32_t reserved20: 12;
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};
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uint32_t val;
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} int_ena;
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union {
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struct {
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uint32_t lstimer0_ovf: 1;
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uint32_t lstimer1_ovf: 1;
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uint32_t lstimer2_ovf: 1;
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uint32_t lstimer3_ovf: 1;
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uint32_t duty_chng_end_lsch0: 1;
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uint32_t duty_chng_end_lsch1: 1;
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uint32_t duty_chng_end_lsch2: 1;
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uint32_t duty_chng_end_lsch3: 1;
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uint32_t duty_chng_end_lsch4: 1;
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uint32_t duty_chng_end_lsch5: 1;
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uint32_t duty_chng_end_lsch6: 1;
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uint32_t duty_chng_end_lsch7: 1;
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uint32_t ovf_cnt_lsch0: 1;
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uint32_t ovf_cnt_lsch1: 1;
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uint32_t ovf_cnt_lsch2: 1;
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uint32_t ovf_cnt_lsch3: 1;
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uint32_t ovf_cnt_lsch4: 1;
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uint32_t ovf_cnt_lsch5: 1;
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uint32_t ovf_cnt_lsch6: 1;
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uint32_t ovf_cnt_lsch7: 1;
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uint32_t reserved20: 12;
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};
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uint32_t val;
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} int_clr;
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union {
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struct {
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uint32_t apb_clk_sel: 2; // 0:invalid; 1:80MHz APB clock; 2:8MHz RTC clock; 3:XTAL clock
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uint32_t reserved2: 29;
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uint32_t clk_en: 1; /*This bit is clock gating control signal. when software configure LED_PWM internal registers it controls the register clock.*/
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};
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uint32_t val;
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} conf;
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uint32_t reserved_d4;
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uint32_t reserved_d8;
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uint32_t reserved_dc;
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uint32_t reserved_e0;
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uint32_t reserved_e4;
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uint32_t reserved_e8;
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uint32_t reserved_ec;
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uint32_t reserved_f0;
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uint32_t reserved_f4;
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uint32_t reserved_f8;
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uint32_t date; /**/
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} ledc_dev_t;
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extern ledc_dev_t LEDC;
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SOC_LEDC_STRUCT_H_ */
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