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f8b5ed5d6cfa69a52ebb9d1ebcf8c005b899264d
esp-idf/components/soc/esp32c3/include/soc
History
Jakob Hasse f8b5ed5d6c refactor (soc, esp_rom)!: removed target-specific ROM dependencies
2022-07-05 13:57:58 +08:00
..
adc_channel.h
adc: unify adc_ll_num_t and adc_unit_t
2022-03-18 11:36:50 +08:00
apb_ctrl_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
apb_ctrl_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
apb_saradc_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
apb_saradc_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
assist_debug_reg.h
fix reg name character error
2021-09-15 21:51:20 +08:00
bb_reg.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
boot_mode.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
clk_tree_defs.h
i2s: update documents for driver-NG
2022-06-15 10:30:04 +08:00
clkout_channel.h
driver: Add esp32c3 drivers (except ADC/DAC) and update tests
2020-12-23 09:53:24 +11:00
dport_access.h
dport: Move DPORT workaround to G0
2022-05-31 13:44:18 +08:00
efuse_reg.h
soc: Fix description of efuse fail bits
2022-05-31 11:21:24 +00:00
efuse_struct.h
soc: Fix description of efuse fail bits
2022-05-31 11:21:24 +00:00
ext_mem_defs.h
ext_mem: make memory region check strict
2022-06-28 14:17:44 +08:00
extmem_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
fe_reg.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
gdma_channel.h
gdma: support IRAM interrupt
2021-11-08 16:14:51 +08:00
gdma_reg.h
gdma: support IRAM interrupt
2021-11-08 16:14:51 +08:00
gdma_struct.h
gdma: support IRAM interrupt
2021-11-08 16:14:51 +08:00
gpio_pins.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
gpio_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
gpio_sd_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
gpio_sd_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
gpio_sig_map.h
fast_gpio: driver support on esp32c3
2021-09-06 19:39:09 +08:00
gpio_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
hwcrypto_reg.h
hmac: Added Downstream JTAG enable mode for esp32c3 and esp32s3
2021-09-06 11:06:50 +05:30
i2c_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
i2c_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
i2s_reg.h
i2s: update copyright
2022-02-21 21:28:48 +08:00
i2s_struct.h
i2s: update copyright
2022-02-21 21:28:48 +08:00
interrupt_core0_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
interrupt_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
io_mux_reg.h
gpio: Clean up unit tests and enable ci ut on some previously disabled test cases
2022-03-30 15:11:08 +08:00
Kconfig.soc_caps.in
refactor (soc, esp_rom)!: removed target-specific ROM dependencies
2022-07-05 13:57:58 +08:00
ledc_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
ledc_struct.h
LEDC: improved support for ESP32-C3 and refactored divisor calculation
2021-11-11 12:21:15 +08:00
memprot_defs.h
refactor (soc, esp_rom)!: removed target-specific ROM dependencies
2022-07-05 13:57:58 +08:00
mmu.h
soc: remove unused MMU related macros
2022-05-20 16:46:28 +08:00
nrx_reg.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
periph_defs.h
hw_support: move rtc_ctrl from driver to hw_support
2022-04-29 14:28:09 +08:00
reg_base.h
soc: move peripheral base address into reg_base.h
2022-01-06 21:43:12 +08:00
regi2c_bbpll.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_bias.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_brownout.h
G0: RISC-V targets have now an independent G0 layer
2022-06-14 15:00:53 +08:00
regi2c_defs.h
clk_tree: prework of introducing clk subsystem control
2022-04-11 12:09:06 +08:00
regi2c_dig_reg.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_lp_bias.h
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
2022-06-30 09:40:44 +00:00
regi2c_saradc.h
G0: RISC-V targets have now an independent G0 layer
2022-06-14 15:00:53 +08:00
reset_reasons.h
update reset reason for c3/s3/h2
2021-08-13 17:45:53 +08:00
rmt_reg.h
rmt: document and improve LL driver
2022-03-09 10:58:12 +08:00
rmt_struct.h
rmt: move RMT item definition from soc to driver
2022-01-06 21:43:12 +08:00
rtc_cntl_reg.h
rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
2022-05-14 22:35:41 +08:00
rtc_cntl_struct.h
clk_tree: prework of introducing clk subsystem control
2022-04-11 12:09:06 +08:00
rtc_i2c_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
rtc_i2c_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
rtc.h
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
sensitive_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
sensitive_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
soc_caps.h
refactor (soc, esp_rom)!: removed target-specific ROM dependencies
2022-07-05 13:57:58 +08:00
soc_pins.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
soc_ulp.h
soc: Move esp32c3 soc_memory_layout.c to soc component
2020-12-23 11:49:16 +11:00
soc.h
soc: make register access macros compatible with C++20
2022-06-17 18:09:22 +02:00
spi_mem_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
spi_mem_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
spi_pins.h
spi: remove HSPI macro on esp32c3 and esp32s3
2021-04-06 13:42:49 +08:00
spi_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
spi_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
syscon_reg.h
soc: Update esp32c3 soc headers
2020-12-24 10:47:34 +11:00
syscon_struct.h
rename APB_CTRL ro SYS_CON
2021-09-16 20:57:57 +08:00
system_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
system_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
systimer_reg.h
systimer: update soc data
2021-04-22 21:07:35 +08:00
systimer_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
timer_group_reg.h
timer_group: fix wrongly generated reg header that introduced in 443845fd54
2021-08-30 13:51:25 +08:00
timer_group_struct.h
gptimer: clean up hal and ll for driver-ng
2021-10-20 18:40:08 +08:00
twai_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
uart_channel.h
uart: fixed incorrect channel number on ESP32S2, S3 and C3
2022-03-01 18:21:27 +08:00
uart_pins.h
uart: uart_set_pin function will now use IOMUX whenever possible
2021-08-04 12:48:30 +08:00
uart_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
uart_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
uhci_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00
uhci_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
usb_serial_jtag_reg.h
usb_serial_jtag: Add blocking driver to support vfs.
2021-07-05 11:22:38 +08:00
usb_serial_jtag_struct.h
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
2021-08-30 13:50:58 +08:00
wdev_reg.h
soc: Add initial ESP32-C3 support
2020-11-30 11:12:56 +11:00