espressif/esp-protocols
1
0
Fork 1
mirror of https://github.com/espressif/esp-protocols.git synced 2025-07-24 07:47:30 +02:00
Code Issues Packages Projects Releases Wiki Activity

Rename Kconfig options (examples)

Browse Source 
* Original commit: espressif/esp-idf@151f757912
This commit is contained in:
Roland Dobai
2019-05-09 16:43:06 +02:00
committed by suren-gabrielyan-espressif
parent 05ddd5f0e4
commit 9a0803ad7e
6 changed files with 36 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

44
examples/common_components/protocol_examples_common/Kconfig.projbuild
View File

@ -31,25 +31,25 @@ menu "Example Connection Configuration"
Can be left blank if the network has no security set.
choice PHY_MODEL
choice EXAMPLE_PHY_MODEL
prompt "Ethernet PHY"
depends on EXAMPLE_CONNECT_ETHERNET
default CONFIG_PHY_TLK110
default EXAMPLE_PHY_TLK110
help
Select the PHY driver to use for the example.
config PHY_IP101
config EXAMPLE_PHY_IP101
bool "IP101"
help
IP101 is a single port 10/100 MII/RMII/TP/Fiber Fast Ethernet Transceiver.
Goto http://www.icplus.com.tw/pp-IP101G.html for more information about it.
config PHY_TLK110
config EXAMPLE_PHY_TLK110
bool "TI TLK110 PHY"
help
Select this to use the TI TLK110 PHY
config PHY_LAN8720
config EXAMPLE_PHY_LAN8720
bool "Microchip LAN8720 PHY"
help
Select this to use the Microchip LAN8720 PHY
@ -57,7 +57,7 @@ menu "Example Connection Configuration"
endchoice
config PHY_ADDRESS
config EXAMPLE_PHY_ADDRESS
int "PHY Address (0-31)"
depends on EXAMPLE_CONNECT_ETHERNET
default 31
@ -68,32 +68,32 @@ menu "Example Connection Configuration"
LAN8720 default 1 or 0
choice PHY_CLOCK_MODE
choice EXAMPLE_PHY_CLOCK_MODE
prompt "EMAC clock mode"
depends on EXAMPLE_CONNECT_ETHERNET
default PHY_CLOCK_GPIO0_IN
default EXAMPLE_PHY_CLOCK_GPIO0_IN
help
Select external (input on GPIO0) or internal (output on GPIO16 or GPIO17) clock
config PHY_CLOCK_GPIO0_IN
config EXAMPLE_PHY_CLOCK_GPIO0_IN
bool "GPIO0 input"
depends on EXAMPLE_CONNECT_ETHERNET
help
Input of 50MHz PHY clock on GPIO0.
config PHY_CLOCK_GPIO0_OUT
config EXAMPLE_PHY_CLOCK_GPIO0_OUT
bool "GPIO0 Output"
help
Output the internal 50MHz RMII clock on GPIO0.
config PHY_CLOCK_GPIO16_OUT
config EXAMPLE_PHY_CLOCK_GPIO16_OUT
bool "GPIO16 output"
depends on EXAMPLE_CONNECT_ETHERNET
help
Output the internal 50MHz APLL clock on GPIO16.
config PHY_CLOCK_GPIO17_OUT
config EXAMPLE_PHY_CLOCK_GPIO17_OUT
bool "GPIO17 output (inverted)"
depends on EXAMPLE_CONNECT_ETHERNET
help
@ -101,16 +101,16 @@ menu "Example Connection Configuration"
endchoice
config PHY_CLOCK_MODE
config EXAMPLE_PHY_CLOCK_MODE
int
depends on EXAMPLE_CONNECT_ETHERNET
default 0 if PHY_CLOCK_GPIO0_IN
default 1 if PHY_CLOCK_GPIO0_OUT
default 2 if PHY_CLOCK_GPIO16_OUT
default 3 if PHY_CLOCK_GPIO17_OUT
default 0 if EXAMPLE_PHY_CLOCK_GPIO0_IN
default 1 if EXAMPLE_PHY_CLOCK_GPIO0_OUT
default 2 if EXAMPLE_PHY_CLOCK_GPIO16_OUT
default 3 if EXAMPLE_PHY_CLOCK_GPIO17_OUT
config PHY_USE_POWER_PIN
config EXAMPLE_PHY_USE_POWER_PIN
bool "Use PHY Power (enable/disable) pin"
depends on EXAMPLE_CONNECT_ETHERNET
default y
@ -118,16 +118,16 @@ menu "Example Connection Configuration"
Use a GPIO "power pin" to power the PHY on/off during operation.
Consult the example README for more details
config PHY_POWER_PIN
config EXAMPLE_PHY_POWER_PIN
int "PHY Power GPIO"
depends on EXAMPLE_CONNECT_ETHERNET
default 17
range 0 33
depends on PHY_USE_POWER_PIN
depends on EXAMPLE_PHY_USE_POWER_PIN
help
GPIO number to use for powering on/off the PHY.
config PHY_SMI_MDC_PIN
config EXAMPLE_PHY_SMI_MDC_PIN
int "SMI MDC Pin"
depends on EXAMPLE_CONNECT_ETHERNET
default 23
@ -135,7 +135,7 @@ menu "Example Connection Configuration"
help
GPIO number to use for SMI clock output MDC to PHY.
config PHY_SMI_MDIO_PIN
config EXAMPLE_PHY_SMI_MDIO_PIN
int "SMI MDIO Pin"
depends on EXAMPLE_CONNECT_ETHERNET
default 18