Allow to customize uart source_clk

This is for example needed when using an external crystal to select
UART_SCLK_XTAL, which fixes uart comm issue when using PM with light
sleep enabled.
This commit is contained in:
Bruno Binet
2022-06-22 15:37:06 +02:00
parent 51a50db0fd
commit d723fb7a5a
4 changed files with 7 additions and 3 deletions

View File

@ -38,7 +38,7 @@ uart_resource::uart_resource(const esp_modem_uart_term_config *config, QueueHand
uart_config.stop_bits = config->stop_bits;
uart_config.flow_ctrl = (config->flow_control == ESP_MODEM_FLOW_CONTROL_HW) ? UART_HW_FLOWCTRL_CTS_RTS
: UART_HW_FLOWCTRL_DISABLE;
uart_config.source_clk = UART_SCLK_APB;
uart_config.source_clk = config->source_clk;
throw_if_esp_fail(uart_param_config(config->port_num, &uart_config), "config uart parameter failed");