175 lines
6.7 KiB
C++
175 lines
6.7 KiB
C++
#pragma once
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#include "nescorelib_global.h"
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// Qt includes
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#include <QtGlobal>
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#include <QString>
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#include <QVector>
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// system includes
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#include <array>
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// local includes
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#include "rom.h"
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#include "enums/prgarea.h"
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#include "enums/chrarea.h"
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// forward declarations
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class QDataStream;
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class NesEmulator;
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class NESCORELIB_EXPORT Board
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{
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Q_DISABLE_COPY(Board)
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public:
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explicit Board(NesEmulator &emu, const Rom &rom);
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virtual ~Board();
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virtual QString name() const;
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virtual quint8 mapper() const;
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virtual void hardReset();
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virtual void softReset();
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virtual quint8 _readEx(quint16 address);
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virtual quint8 readEx(quint16 address);
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virtual void writeEx(quint16 address, quint8 value);
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virtual quint8 _readSrm(quint16 address);
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virtual quint8 readSrm(quint16 address);
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virtual void writeSrm(quint16 address, quint8 value);
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virtual quint8 _readPrg(quint16 address);
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virtual quint8 readPrg(quint16 address);
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virtual void writePrg(quint16 address, quint8 value);
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virtual quint8 _readChr(quint16 address);
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virtual quint8 readChr(quint16 address);
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virtual void writeChr(quint16 address, quint8 value);
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virtual quint8 _readNmt(quint16 address);
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virtual quint8 readNmt(quint16 address);
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virtual void writeNmt(quint16 address, quint8 value);
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virtual void onPpuAddressUpdate(quint16 address);
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virtual void onCpuClock();
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virtual void onPpuClock();
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virtual void onPpuA12RaisingEdge();
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virtual void onPpuScanlineTick();
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virtual void onApuClockDuration();
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virtual void onApuClockEnvelope();
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virtual void onApuClockSingle();
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virtual void onApuClock();
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virtual double apuGetSample() const;
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virtual void apuApplyChannelsSettings();
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virtual void readState(QDataStream &dataStream);
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virtual void writeState(QDataStream &dataStream) const;
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virtual bool enableExternalSound() const;
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protected:
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virtual int prgRam8KbDefaultBlkCount() const;
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virtual int chrRom1KbDefaultBlkCount() const;
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virtual bool ppuA12ToggleTimerEnabled() const;
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virtual bool ppuA12TogglesOnRaisingEdge() const;
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void switch4kPrg(int index, PRGArea area);
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void switch8kPrg(int index, PRGArea area);
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void switch16kPrg(int index, PRGArea area);
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void switch32kPrg(int index, PRGArea area);
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void toggle4kPrgRam(bool ram, PRGArea area);
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void toggle8kPrgRam(bool ram, PRGArea area);
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void toggle16kPrgRam(bool ram, PRGArea area);
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void toggle32kPrgRam(bool ram, PRGArea area);
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void togglePrgRamEnable(bool enable);
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void togglePrgRamWritableEnable(bool enable);
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void toggle4kPrgRamEnabled(bool enable, int index);
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void toggle4kPrgRamWritable(bool enable, int index);
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void toggle4kPrgRamBattery(bool enable, int index);
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void switch1kChr(int index, CHRArea area);
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void switch2kChr(int index, CHRArea area);
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void switch4kChr(int index, CHRArea area);
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void switch8kChr(int index);
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void toggle1kChrRam(bool ram, CHRArea area);
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void toggle2kChrRam(bool ram, CHRArea area);
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void toggle4kChrRam(bool ram, CHRArea area);
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void toggle8kChrRam(bool ram);
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void toggle1kChrRamEnabled(bool enable, int index);
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void toggle1kChrRamWritable(bool enable, int index);
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void toggleChrRamWritableEnable(bool enable);
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void toggle1kChrRamBattery(bool enable, int index);
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void switch1kNmt(int index, quint8 area);
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void switch1kNmt(Mirroring mirroring);
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int prgRom4KbCount() const { return m_rom.prg.size(); }
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int prgRom4KbMask() const { return prgRom4KbCount() - 1; }
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int prgRom8KbCount() const { return prgRom4KbCount() / 2; }
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int prgRom8KbMask() const { return prgRom8KbCount() - 1; }
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int prgRom16KbCount() const { return prgRom4KbCount() / 4; }
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int prgRom16KbMask() const { return prgRom16KbCount() - 1; }
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int prgRom32KbCount() const { return prgRom4KbCount() / 8; }
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int prgRom32KbMask() const { return prgRom32KbCount() - 1; }
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int prgRam4KbCount() const { return m_prgRam.size(); }
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int prgRam4KbMask() const { return prgRam4KbCount() - 1; }
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int prgRam8KbCount() const { return prgRam4KbCount() / 2; }
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int prgRam8KbMask() const { return prgRam8KbCount() - 1; }
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int prgRam16KbCount() const { return prgRam4KbCount() / 4; }
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int prgRam16KbMask() const { return prgRam16KbCount() - 1; }
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int prgRam32KbCount() const { return prgRam4KbCount() / 8; }
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int prgRam32KbMask() const { return prgRam32KbCount() - 1; }
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int chrRom1KbCount() const { return m_rom.chr.size(); }
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int chrRom1KbMask() const { return chrRom1KbCount() - 1; }
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int chrRom2KbCount() const { return chrRom1KbCount() / 2; }
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int chrRom2KbMask() const { return chrRom2KbCount() - 1; }
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int chrRom4KbCount() const { return chrRom1KbCount() / 4; }
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int chrRom4KbMask() const { return chrRom4KbCount() - 1; }
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int chrRom8KbCount() const { return chrRom1KbCount() / 8; }
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int chrRom8KbMask() const { return chrRom8KbCount() - 1; }
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int chrRam1KbCount() const { return m_chrRam.size(); }
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int chrRam1KbMask() const { return chrRam1KbCount() - 1; }
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int chrRam2KbCount() const { return chrRam1KbCount() / 2; }
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int chrRam2KbMask() const { return chrRam2KbCount() - 1; }
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int chrRam4KbCount() const { return chrRam1KbCount() / 4; }
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int chrRam4KbMask() const { return chrRam4KbCount() - 1; }
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int chrRam8KbCount() const { return chrRam1KbCount() / 8; }
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int chrRam8KbMask() const { return chrRam8KbCount() - 1; }
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template<std::size_t L>
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struct RamPage {
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std::array<quint8, L> ram {}; // The prg RAM blocks, 4KB (0x1000) each.
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bool enabled {}; // Indicates if a block is enabled (disabled ram blocks cannot be accessed, either read nor write)
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bool writeable {}; // Indicates if a block is writable (false means writes are not accepted even if this block is RAM)
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bool battery {}; // Indicates if a block is battery (RAM block battery will be saved to file on emu shutdown)
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};
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struct AreaBlk {
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bool ram {}; // Indicates if a blk is RAM (true) or ROM (false)
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int index {}; // The index of RAM/ROM block in the area
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};
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struct NmtRam {
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std::array<quint8, 0x400> ram {};
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int index {}; // The index of NMT RAM block in the area
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};
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QVector<RamPage<0x1000> > m_prgRam {};
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std::array<AreaBlk, 16> m_prgAreaBlk {}; // Starting from 4xxx to Fxxx, each entry here configure a 8kb block area
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QVector<RamPage<0x400> > m_chrRam {};
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std::array<AreaBlk, 8> m_chrAreaBlk {}; // Starting from 0000 to F3FF, each entry here configure a 4kb block area
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std::array<NmtRam, 4> m_nmtRam {};
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int m_oldVramAddress {};
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int m_newVramAddress {};
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int m_ppuCyclesTimer {};
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protected:
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NesEmulator &m_emu;
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const Rom m_rom;
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private:
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bool m_sramSaveRequired {};
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};
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