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Add P4 exclusions for CORE3 (#853)

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* P4 Exclusion

* P4 Exclusion

* P4 Exclusions
This commit is contained in:
Troy
2024-10-13 11:30:53 -04:00
committed by GitHub
parent a31d97c293
commit 2edd93ddbe
2 changed files with 5 additions and 5 deletions
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4
src/internal/methods/ESP/ESP32/Core_2_x/Esp32_i2s.c
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@@ -22,8 +22,8 @@
#include <stdio.h>
#include "stdlib.h"
// ESP32 C3, S3, C6, and H2 I2S is not supported yet due to significant changes to interface
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2)
// ESP32 C3, S3, C6, H2, and P4 I2S is not supported yet due to significant changes to interface
#if !defined(CONFIG_IDF_TARGET_ESP32C3) && !defined(CONFIG_IDF_TARGET_ESP32S3) && !defined(CONFIG_IDF_TARGET_ESP32C6) && !defined(CONFIG_IDF_TARGET_ESP32H2) && !defined(CONFIG_IDF_TARGET_ESP32P4)
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"

4
src/internal/methods/ESP/NeoEspBitBangMethod.cpp
View File

@@ -36,7 +36,7 @@ static inline uint32_t getCycleCount(void)
{
uint32_t ccount;
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2)
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
__asm__ __volatile__("csrr %0,0x7e2":"=r" (ccount));
//ccount = esp_cpu_get_ccount();
#else
@@ -114,7 +114,7 @@ bool IRAM_ATTR neoEspBitBangWriteSpacingPixels(const uint8_t* pixels,
volatile uint32_t* setRegister;
volatile uint32_t* clearRegister;
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2)
#if defined(CONFIG_IDF_TARGET_ESP32C3) || defined(CONFIG_IDF_TARGET_ESP32C6) || defined(CONFIG_IDF_TARGET_ESP32H2) || defined(CONFIG_IDF_TARGET_ESP32P4)
if (pin < 32)
{
setRegister = &GPIO.out_w1ts.val;