diff --git a/src/internal/Esp32_i2s.c b/src/internal/Esp32_i2s.c index 6e29213..7ce7e63 100644 --- a/src/internal/Esp32_i2s.c +++ b/src/internal/Esp32_i2s.c @@ -27,7 +27,6 @@ #include "freertos/queue.h" #include "esp_intr.h" -#include "rom/ets_sys.h" #include "soc/gpio_reg.h" #include "soc/gpio_sig_map.h" #include "soc/io_mux_reg.h" @@ -87,16 +86,23 @@ typedef struct { static uint8_t i2s_silence_buf[I2S_DMA_SILENCE_LEN]; -static i2s_bus_t I2S[2] = { +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (I2S_NUM_MAX == 2) +static i2s_bus_t I2S[I2S_NUM_MAX] = { {&I2S0, -1, -1, -1, -1, 0, NULL, NULL, i2s_silence_buf, I2S_DMA_SILENCE_LEN, NULL, I2S_DMA_QUEUE_SIZE, 0, 0}, {&I2S1, -1, -1, -1, -1, 0, NULL, NULL, i2s_silence_buf, I2S_DMA_SILENCE_LEN, NULL, I2S_DMA_QUEUE_SIZE, 0, 0} }; +#else +static i2s_bus_t I2S[I2S_NUM_MAX] = { + {&I2S0, -1, -1, -1, -1, 0, NULL, NULL, i2s_silence_buf, I2S_DMA_SILENCE_LEN, NULL, I2S_DMA_QUEUE_SIZE, 0, 0} +}; +#endif void IRAM_ATTR i2sDmaISR(void* arg); bool i2sInitDmaItems(uint8_t bus_num); bool i2sInitDmaItems(uint8_t bus_num) { - if (bus_num > 1) { + if (bus_num >= I2S_NUM_MAX) { return false; } if (I2S[bus_num].tx_queue) {// already set @@ -153,7 +159,7 @@ bool i2sInitDmaItems(uint8_t bus_num) { } void i2sSetSilenceBuf(uint8_t bus_num, uint8_t* data, size_t len) { - if (bus_num > 1 || !data || !len) { + if (bus_num >= I2S_NUM_MAX || !data || !len) { return; } I2S[bus_num].silence_buf = data; @@ -161,7 +167,7 @@ void i2sSetSilenceBuf(uint8_t bus_num, uint8_t* data, size_t len) { } esp_err_t i2sSetClock(uint8_t bus_num, uint8_t div_num, uint8_t div_b, uint8_t div_a, uint8_t bck, uint8_t bits) { - if (bus_num > 1 || div_a > 63 || div_b > 63 || bck > 63) { + if (bus_num >= I2S_NUM_MAX || div_a > 63 || div_b > 63 || bck > 63) { return ESP_FAIL; } i2s_dev_t* i2s = I2S[bus_num].bus; @@ -177,7 +183,7 @@ esp_err_t i2sSetClock(uint8_t bus_num, uint8_t div_num, uint8_t div_b, uint8_t d } void i2sSetTxDataMode(uint8_t bus_num, i2s_tx_chan_mod_t chan_mod, i2s_tx_fifo_mod_t fifo_mod) { - if (bus_num > 1) { + if (bus_num >= I2S_NUM_MAX) { return; } @@ -186,7 +192,7 @@ void i2sSetTxDataMode(uint8_t bus_num, i2s_tx_chan_mod_t chan_mod, i2s_tx_fifo_m } void i2sSetDac(uint8_t bus_num, bool right, bool left) { - if (bus_num > 1) { + if (bus_num >= I2S_NUM_MAX) { return; } @@ -217,7 +223,7 @@ void i2sSetDac(uint8_t bus_num, bool right, bool left) { } void i2sSetPins(uint8_t bus_num, int8_t out, int8_t ws, int8_t bck, int8_t in, bool invert) { - if (bus_num > 1) { + if (bus_num >= I2S_NUM_MAX) { return; } @@ -232,7 +238,20 @@ void i2sSetPins(uint8_t bus_num, int8_t out, int8_t ws, int8_t bck, int8_t in, b } I2S[bus_num].ws = ws; pinMode(ws, OUTPUT); - gpio_matrix_out(ws, bus_num?I2S1O_WS_OUT_IDX:I2S0O_WS_OUT_IDX, invert, false); + + uint32_t i2sSignal; +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (I2S_NUM_MAX == 2) + if (bus_num == 1) { + i2sSignal = I2S1O_WS_OUT_IDX; + } + else +#else + { + i2sSignal = I2S0O_WS_OUT_IDX; + } +#endif + gpio_matrix_out(ws, i2sSignal, invert, false); } } else if (I2S[bus_num].ws >= 0) { gpio_matrix_out(I2S[bus_num].ws, 0x100, invert, false); @@ -246,7 +265,20 @@ void i2sSetPins(uint8_t bus_num, int8_t out, int8_t ws, int8_t bck, int8_t in, b } I2S[bus_num].bck = bck; pinMode(bck, OUTPUT); - gpio_matrix_out(bck, bus_num?I2S1O_BCK_OUT_IDX:I2S0O_BCK_OUT_IDX, invert, false); + + int i2sSignal; +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (I2S_NUM_MAX == 2) + if (bus_num == 1) { + i2sSignal = I2S1O_BCK_OUT_IDX; + } + else +#else + { + i2sSignal = I2S0O_BCK_OUT_IDX; + } +#endif + gpio_matrix_out(bck, i2sSignal, invert, false); } } else if (I2S[bus_num].bck >= 0) { gpio_matrix_out(I2S[bus_num].bck, 0x100, invert, false); @@ -260,7 +292,20 @@ void i2sSetPins(uint8_t bus_num, int8_t out, int8_t ws, int8_t bck, int8_t in, b } I2S[bus_num].out = out; pinMode(out, OUTPUT); - gpio_matrix_out(out, bus_num?I2S1O_DATA_OUT23_IDX:I2S0O_DATA_OUT23_IDX, invert, false); + + int i2sSignal; +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (I2S_NUM_MAX == 2) + if (bus_num == 1) { + i2sSignal = I2S1O_DATA_OUT23_IDX; + } + else +#else + { + i2sSignal = I2S0O_DATA_OUT23_IDX; + } +#endif + gpio_matrix_out(out, i2sSignal, invert, false); } } else if (I2S[bus_num].out >= 0) { gpio_matrix_out(I2S[bus_num].out, 0x100, invert, false); @@ -270,14 +315,14 @@ void i2sSetPins(uint8_t bus_num, int8_t out, int8_t ws, int8_t bck, int8_t in, b } bool i2sWriteDone(uint8_t bus_num) { - if (bus_num > 1) { + if (bus_num >= I2S_NUM_MAX) { return false; } return (I2S[bus_num].dma_items[I2S[bus_num].dma_count - 1].data == I2S[bus_num].silence_buf); } void i2sInit(uint8_t bus_num, uint32_t bits_per_sample, uint32_t sample_rate, i2s_tx_chan_mod_t chan_mod, i2s_tx_fifo_mod_t fifo_mod, size_t dma_count, size_t dma_len) { - if (bus_num > 1) { + if (bus_num >= I2S_NUM_MAX) { return; } @@ -288,9 +333,13 @@ void i2sInit(uint8_t bus_num, uint32_t bits_per_sample, uint32_t sample_rate, i2 return; } +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (I2S_NUM_MAX == 2) if (bus_num) { periph_module_enable(PERIPH_I2S1_MODULE); - } else { + } else +#endif + { periph_module_enable(PERIPH_I2S0_MODULE); } @@ -366,7 +415,21 @@ void i2sInit(uint8_t bus_num, uint32_t bits_per_sample, uint32_t sample_rate, i2 i2sSetSampleRate(bus_num, sample_rate, bits_per_sample); // enable intr in cpu // - esp_intr_alloc(bus_num?ETS_I2S1_INTR_SOURCE:ETS_I2S0_INTR_SOURCE, ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1, &i2sDmaISR, &I2S[bus_num], &I2S[bus_num].isr_handle); + int i2sIntSource; + +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (I2S_NUM_MAX == 2) + if (bus_num == 1) { + i2sIntSource = ETS_I2S1_INTR_SOURCE; + } + else +#else + { + i2sIntSource = ETS_I2S0_INTR_SOURCE; + } +#endif + + esp_intr_alloc(i2sIntSource, ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_LEVEL1, &i2sDmaISR, &I2S[bus_num], &I2S[bus_num].isr_handle); // enable send intr i2s->int_ena.out_eof = 1; i2s->int_ena.out_dscr_err = 1; @@ -381,7 +444,7 @@ void i2sInit(uint8_t bus_num, uint32_t bits_per_sample, uint32_t sample_rate, i2 } esp_err_t i2sSetSampleRate(uint8_t bus_num, uint32_t rate, uint8_t bits) { - if (bus_num > 1) { + if (bus_num >= I2S_NUM_MAX) { return ESP_FAIL; } @@ -451,7 +514,7 @@ void IRAM_ATTR i2sDmaISR(void* arg) } size_t i2sWrite(uint8_t bus_num, uint8_t* data, size_t len, bool copy, bool free_when_sent) { - if (bus_num > 1 || !I2S[bus_num].tx_queue) { + if (bus_num >= I2S_NUM_MAX || !I2S[bus_num].tx_queue) { return 0; } size_t index = 0; diff --git a/src/internal/NeoEsp32I2sMethod.h b/src/internal/NeoEsp32I2sMethod.h index 3bd08b9..6bcc2a4 100644 --- a/src/internal/NeoEsp32I2sMethod.h +++ b/src/internal/NeoEsp32I2sMethod.h @@ -219,12 +219,6 @@ typedef NeoEsp32I2sMethodBase NeoEsp32I2s0400KbpsMethod; typedef NeoEsp32I2sMethodBase NeoEsp32I2s0Apa106Method; -typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Ws2812xMethod; -typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Sk6812Method; -typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Tm1814Method; -typedef NeoEsp32I2sMethodBase NeoEsp32I2s1800KbpsMethod; -typedef NeoEsp32I2sMethodBase NeoEsp32I2s1400KbpsMethod; -typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Apa106Method; typedef NeoEsp32I2sMethodBase NeoEsp32I2s0Ws2812xInvertedMethod; typedef NeoEsp32I2sMethodBase NeoEsp32I2s0Sk6812InvertedMethod; @@ -233,6 +227,16 @@ typedef NeoEsp32I2sMethodBase NeoEsp32I2s0400KbpsInvertedMethod; typedef NeoEsp32I2sMethodBase NeoEsp32I2s0Apa106InvertedMethod; +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (I2S_NUM_MAX == 2) + +typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Ws2812xMethod; +typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Sk6812Method; +typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Tm1814Method; +typedef NeoEsp32I2sMethodBase NeoEsp32I2s1800KbpsMethod; +typedef NeoEsp32I2sMethodBase NeoEsp32I2s1400KbpsMethod; +typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Apa106Method; + typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Ws2812xInvertedMethod; typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Sk6812InvertedMethod; typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Tm1814InvertedMethod; @@ -240,6 +244,8 @@ typedef NeoEsp32I2sMethodBase NeoEsp32I2s1400KbpsInvertedMethod; typedef NeoEsp32I2sMethodBase NeoEsp32I2s1Apa106InvertedMethod; +#endif + /* due to a core issue where requests to send aren't consistent, I2s is no longer the default // I2s Bus 1 method is the default method for Esp32 typedef NeoEsp32I2s1Ws2812xMethod NeoWs2813Method; diff --git a/src/internal/NeoEsp32RmtMethod.h b/src/internal/NeoEsp32RmtMethod.h index c047a83..4675c21 100644 --- a/src/internal/NeoEsp32RmtMethod.h +++ b/src/internal/NeoEsp32RmtMethod.h @@ -444,6 +444,9 @@ typedef NeoEsp32RmtMethodBase NeoEs typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3800KbpsMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3400KbpsMethod; +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (RMT_CHANNEL_MAX == 8) + typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2811Method; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2812xMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Sk6812Method; @@ -476,6 +479,8 @@ typedef NeoEsp32RmtMethodBase NeoEs typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7800KbpsMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7400KbpsMethod; +#endif + // inverted typedef NeoEsp32RmtMethodBase NeoEsp32Rmt0Ws2811InvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt0Ws2812xInvertedMethod; @@ -509,6 +514,9 @@ typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3800KbpsInvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt3400KbpsInvertedMethod; +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (RMT_CHANNEL_MAX == 8) + typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2811InvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Ws2812xInvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt4Sk6812InvertedMethod; @@ -541,6 +549,10 @@ typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7800KbpsInvertedMethod; typedef NeoEsp32RmtMethodBase NeoEsp32Rmt7400KbpsInvertedMethod; +#endif + +#if !defined(CONFIG_IDF_TARGET_ESP32S2) +// (RMT_CHANNEL_MAX == 8) // due to a core issue where requests to send aren't consistent with I2s, RMT ch6 is temporarily the default // RMT channel 6 method is the default method for Esp32 typedef NeoEsp32Rmt6Ws2812xMethod NeoWs2813Method; @@ -566,6 +578,34 @@ typedef NeoEsp32Rmt6Apa106InvertedMethod NeoApa106InvertedMethod; typedef NeoEsp32Rmt6Ws2812xInvertedMethod Neo800KbpsInvertedMethod; typedef NeoEsp32Rmt6400KbpsInvertedMethod Neo400KbpsInvertedMethod; +#else +// due to a core issue where requests to send aren't consistent with I2s, RMT ch3 is temporarily the default +// RMT channel 3 method is the default method for Esp32S2 +typedef NeoEsp32Rmt3Ws2812xMethod NeoWs2813Method; +typedef NeoEsp32Rmt3Ws2812xMethod NeoWs2812xMethod; +typedef NeoEsp32Rmt3800KbpsMethod NeoWs2812Method; +typedef NeoEsp32Rmt3Ws2812xMethod NeoWs2811Method; +typedef NeoEsp32Rmt3Sk6812Method NeoSk6812Method; +typedef NeoEsp32Rmt3Tm1814Method NeoTm1814Method; +typedef NeoEsp32Rmt3Sk6812Method NeoLc8812Method; +typedef NeoEsp32Rmt3Apa106Method NeoApa106Method; + +typedef NeoEsp32Rmt3Ws2812xMethod Neo800KbpsMethod; +typedef NeoEsp32Rmt3400KbpsMethod Neo400KbpsMethod; + +typedef NeoEsp32Rmt3Ws2812xInvertedMethod NeoWs2813InvertedMethod; +typedef NeoEsp32Rmt3Ws2812xInvertedMethod NeoWs2812xInvertedMethod; +typedef NeoEsp32Rmt3Ws2812xInvertedMethod NeoWs2811InvertedMethod; +typedef NeoEsp32Rmt3800KbpsInvertedMethod NeoWs2812InvertedMethod; +typedef NeoEsp32Rmt3Sk6812InvertedMethod NeoSk6812InvertedMethod; +typedef NeoEsp32Rmt3Tm1814InvertedMethod NeoTm1814InvertedMethod; +typedef NeoEsp32Rmt3Sk6812InvertedMethod NeoLc8812InvertedMethod; +typedef NeoEsp32Rmt3Apa106InvertedMethod NeoApa106InvertedMethod; + +typedef NeoEsp32Rmt3Ws2812xInvertedMethod Neo800KbpsInvertedMethod; +typedef NeoEsp32Rmt3400KbpsInvertedMethod Neo400KbpsInvertedMethod; + +#endif #endif diff --git a/src/internal/NeoEspBitBangMethod.h b/src/internal/NeoEspBitBangMethod.h index de5dd48..84fbb46 100644 --- a/src/internal/NeoEspBitBangMethod.h +++ b/src/internal/NeoEspBitBangMethod.h @@ -76,7 +76,7 @@ class NeoEspPinset public: const static uint8_t IdleLevel = LOW; - inline const static void setPin(const uint32_t pinRegister) + inline static void setPin(const uint32_t pinRegister) { #if defined(ARDUINO_ARCH_ESP32) GPIO.out_w1ts = pinRegister; @@ -85,7 +85,7 @@ public: #endif } - inline const static void resetPin(const uint32_t pinRegister) + inline static void resetPin(const uint32_t pinRegister) { #if defined(ARDUINO_ARCH_ESP32) GPIO.out_w1tc = pinRegister; @@ -100,7 +100,7 @@ class NeoEspPinsetInverted public: const static uint8_t IdleLevel = HIGH; - inline const static void setPin(const uint32_t pinRegister) + inline static void setPin(const uint32_t pinRegister) { #if defined(ARDUINO_ARCH_ESP32) GPIO.out_w1tc = pinRegister; @@ -109,7 +109,7 @@ public: #endif } - inline const static void resetPin(const uint32_t pinRegister) + inline static void resetPin(const uint32_t pinRegister) { #if defined(ARDUINO_ARCH_ESP32) GPIO.out_w1ts = pinRegister; @@ -122,7 +122,7 @@ public: template class NeoEspBitBangBase { public: - __attribute__((noinline)) static const void ICACHE_RAM_ATTR send_pixels(uint8_t* pixels, uint8_t* end, uint8_t pin) + __attribute__((noinline)) static void ICACHE_RAM_ATTR send_pixels(uint8_t* pixels, uint8_t* end, uint8_t pin) { const uint32_t pinRegister = _BV(pin); uint8_t mask = 0x80;