Add ability to set the RP2040 parallel interface speed

// For RP2040 processor and 8 or 16 bit parallel displays:
// The parallel interface write cycle period is derived from a division of the CPU clock
// speed so scales with the processor clock. This means that the divider ratio may need
// to be increased when overclocking. I may also need to be adjusted dependant on the
// display controller type (ILI94341, HX8357C etc). If RP2040_PIO_CLK_DIV is not defined
// the library will set default values which may not suit your display.
// The display controller data sheet will specify the minimum write cycle period. The
// controllers often work reliably for shorter periods, however if the period is too short
// the display may not initialise or graphics will become corrupted.
// PIO write cycle frequency = (CPU clock/(4 * RP2040_PIO_CLK_DIV))
//#define RP2040_PIO_CLK_DIV 1 // 32ns write cycle at 125MHz CPU clock
#define RP2040_PIO_CLK_DIV 2 // 64ns write cycle at 125MHz CPU clock
//#define RP2040_PIO_CLK_DIV 3 // 96ns write cycle at 125MHz CPU clock

Processors/TFT_eSPI_RP2040.h

@@ -82,9 +82,18 @@
 
   // Different controllers have different minimum write cycle periods, so the PIO clock is changed accordingly
   // The PIO clock is a division of the CPU clock so scales when the processor is overclocked
-  // PIO write frequency = (CPU clock/(4 * DIV_UNITS))
-  #if defined (TFT_PARALLEL_8_BIT) || defined (TFT_PARALLEL_16_BIT) || defined (RP2040_PIO_SPI)
-    #if defined (TFT_PARALLEL_16_BIT)
+  // PIO write frequency = (CPU clock/(4 * RP2040_PIO_CLK_DIV))
+  // The write cycle periods below assume a 125MHz CPU clock speed
+  #if defined (TFT_PARALLEL_8_BIT) || defined (TFT_PARALLEL_16_BIT)
+    #if defined (RP2040_PIO_CLK_DIV)
+      #if (RP2040_PIO_CLK_DIV > 0)
+        #define DIV_UNITS RP2040_PIO_CLK_DIV
+        #define DIV_FRACT 0
+      #else
+        #define DIV_UNITS 3
+        #define DIV_FRACT 0
+      #endif
+    #elif defined (TFT_PARALLEL_16_BIT)
       // Different display drivers have different minimum write cycle times
       #if defined (HX8357C_DRIVER) || defined (SSD1963_DRIVER)
         #define DIV_UNITS 1 // 32ns write cycle time SSD1963, HX8357C (maybe HX8357D?)
@@ -94,14 +103,9 @@
         #define DIV_UNITS 3 // 96ns write cycle time
       #endif
       #define DIV_FRACT 0
-    #else // 8 bit parallel mode
-      #ifdef ILI9481_DRIVER
-        #define DIV_UNITS 1
-        #define DIV_FRACT 160 // Note: Fractional values done with clock period dithering
-      #else
-        #define DIV_UNITS 1
-        #define DIV_FRACT 0
-      #endif
+    #else // 8 bit parallel mode default 64ns write cycle time
+      #define DIV_UNITS 2
+      #define DIV_FRACT 0 // Note: Fractional values done with clock period dithering
     #endif
   #endif