Add SPI overlap support Issue #26
Note, must use latest ESP board package with support for the overlap mode
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@@ -164,10 +164,17 @@ void TFT_eSPI::init(void)
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#ifdef TFT_WR
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wrpinmask = (uint32_t) digitalPinToBitMask(TFT_WR);
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#endif
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#ifdef TFT_SPI_OVERLAP
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// Overlap mode SD0=MISO, SD1=MOSI, CLK=SCLK must use D3 as CS
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// pins(int8_t sck, int8_t miso, int8_t mosi, int8_t ss);
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//SPI.pins( 6, 7, 8, 0);
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SPI.pins(6, 7, 8, 0);
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#endif
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SPI.begin(); // This will set MISO to input
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SPI.begin(); // This will set HMISO to input
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#else
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#ifdef TFT_MOSI
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#if defined (TFT_MOSI) && !defined (TFT_SPI_OVERLAP)
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SPI.begin(TFT_SCLK, TFT_MISO, TFT_MOSI, -1);
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#else
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SPI.begin();
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@@ -183,8 +190,7 @@ void TFT_eSPI::init(void)
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SPI.setBitOrder(MSBFIRST);
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SPI.setDataMode(SPI_MODE0);
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SPI.setFrequency(SPI_FREQUENCY);
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//SPI.setHwCs(1); // Use hardware SS toggling on GPIO15 (D8) - not supported - benefit is only ~0.8% performance boost
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#ifdef ESP32 // Unlock the SPI hal mutex and set the lock management flags
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SPI.beginTransaction(SPISettings(SPI_FREQUENCY, MSBFIRST, SPI_MODE0));
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inTransaction = true; // Flag to stop intermediate spi_end calls
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@@ -197,6 +203,8 @@ void TFT_eSPI::init(void)
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#ifdef TFT_CS
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digitalWrite(TFT_CS, HIGH); // Chip select high (inactive)
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pinMode(TFT_CS, OUTPUT);
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#else
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SPI.setHwCs(1); // Use hardware SS toggling
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#endif
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// Set to output once again in case D6 (MISO) is used for DC
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