Update IDF to a0468b2 (#2108)

* Update IDF to a0468b2

* add missing ld file

* Fix PIO builds and change coex policy
This commit is contained in:
Me No Dev
2018-11-26 23:22:11 +01:00
committed by GitHub
parent c3ec91f968
commit 04963009ee
988 changed files with 114643 additions and 65141 deletions

View File

@ -1,3 +1,7 @@
/* Automatically generated file; DO NOT EDIT */
/* Espressif IoT Development Framework Linker Script */
/* Generated from: /Users/ficeto/Desktop/ESP32/ESP32/esp-idf-public/components/esp32/ld/esp32.common.ld.in */
/* Default entry point: */
ENTRY(call_start_cpu0);
@ -9,22 +13,54 @@ SECTIONS
.rtc.text :
{
. = ALIGN(4);
*(.rtc.literal .rtc.text)
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
} > rtc_iram_seg
/* RTC slow memory holds RTC wake stub
*( .rtc.literal .rtc.text)
*rtc_wake_stub*.*(.literal .text .literal.* .text.*)
_rtc_text_end = ABSOLUTE(.);
} > rtc_iram_seg
/*
This section is required to skip rtc.text area because rtc_iram_seg and
rtc_data_seg are reflect the same address space on different buses.
*/
.rtc.dummy :
{
_rtc_dummy_start = ABSOLUTE(.);
_rtc_fast_start = ABSOLUTE(.);
. = SIZEOF(.rtc.text);
_rtc_dummy_end = ABSOLUTE(.);
} > rtc_data_seg
/* This section located in RTC FAST Memory area.
It holds data marked with RTC_FAST_ATTR attribute.
See the file "esp_attr.h" for more information.
*/
.rtc.force_fast :
{
. = ALIGN(4);
_rtc_force_fast_start = ABSOLUTE(.);
*(.rtc.force_fast .rtc.force_fast.*)
. = ALIGN(4) ;
_rtc_force_fast_end = ABSOLUTE(.);
} > rtc_data_seg
/* RTC data section holds RTC wake stub
data/rodata, including from any source file
named rtc_wake_stub*.c
named rtc_wake_stub*.c and the data marked with
RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
The memory location of the data is dependent on
CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
*/
.rtc.data :
{
_rtc_data_start = ABSOLUTE(.);
*(.rtc.data)
*(.rtc.rodata)
*( .rtc.data .rtc.rodata)
*rtc_wake_stub*.*(.data .rodata .data.* .rodata.* .bss .bss.*)
_rtc_data_end = ABSOLUTE(.);
} > rtc_slow_seg
} > rtc_data_location
/* RTC bss, from any source file named rtc_wake_stub*.c */
.rtc.bss (NOLOAD) :
@ -32,14 +68,18 @@ SECTIONS
_rtc_bss_start = ABSOLUTE(.);
*rtc_wake_stub*.*(.bss .bss.*)
*rtc_wake_stub*.*(COMMON)
*(.rtc.bss)
*( .rtc.bss)
_rtc_bss_end = ABSOLUTE(.);
} > rtc_slow_seg
} > rtc_data_location
/* This section holds data that should not be initialized at power up
and will be retained during deep sleep. The section located in
RTC SLOW Memory area. User data marked with RTC_NOINIT_ATTR will be placed
into this section. See the file "esp_attr.h" for more information.
and will be retained during deep sleep.
User data marked with RTC_NOINIT_ATTR will be placed
into this section. See the file "esp_attr.h" for more information.
The memory location of the data is dependent on
CONFIG_ESP32_RTCDATA_IN_FAST_MEM option.
*/
.rtc_noinit (NOLOAD):
{
@ -48,8 +88,36 @@ SECTIONS
*(.rtc_noinit .rtc_noinit.*)
. = ALIGN(4) ;
_rtc_noinit_end = ABSOLUTE(.);
} > rtc_data_location
/* This section located in RTC SLOW Memory area.
It holds data marked with RTC_SLOW_ATTR attribute.
See the file "esp_attr.h" for more information.
*/
.rtc.force_slow :
{
. = ALIGN(4);
_rtc_force_slow_start = ABSOLUTE(.);
*(.rtc.force_slow .rtc.force_slow.*)
. = ALIGN(4) ;
_rtc_force_slow_end = ABSOLUTE(.);
} > rtc_slow_seg
/* Get size of rtc slow data based on rtc_data_location alias */
_rtc_slow_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
? (_rtc_force_slow_end - _rtc_data_start)
: (_rtc_force_slow_end - _rtc_force_slow_start);
_rtc_fast_length = (ORIGIN(rtc_slow_seg) == ORIGIN(rtc_data_location))
? (_rtc_force_fast_end - _rtc_fast_start)
: (_rtc_noinit_end - _rtc_fast_start);
ASSERT((_rtc_slow_length <= LENGTH(rtc_slow_seg)),
"RTC_SLOW segment data does not fit.")
ASSERT((_rtc_fast_length <= LENGTH(rtc_data_seg)),
"RTC_FAST segment data does not fit.")
/* Send .iram0 code to iram */
.iram0.vectors :
{
@ -87,32 +155,45 @@ SECTIONS
*(.init.literal)
*(.init)
_init_end = ABSOLUTE(.);
} > iram0_0_seg
} > iram0_0_seg
.iram0.text :
{
/* Code marked as runnning out of IRAM */
_iram_text_start = ABSOLUTE(.);
*(.iram1 .iram1.*)
*libfreertos.a:(.literal .text .literal.* .text.*)
*libheap.a:multi_heap.*(.literal .text .literal.* .text.*)
*libheap.a:multi_heap_poisoning.*(.literal .text .literal.* .text.*)
*libesp32.a:panic.*(.literal .text .literal.* .text.*)
*libesp32.a:core_dump.*(.literal .text .literal.* .text.*)
*libapp_trace.a:(.literal .text .literal.* .text.*)
*libxtensa-debug-module.a:eri.*(.literal .text .literal.* .text.*)
*librtc.a:(.literal .text .literal.* .text.*)
*libsoc.a:rtc_*.*(.literal .text .literal.* .text.*)
*libsoc.a:cpu_util.*(.literal .text .literal.* .text.*)
*libhal.a:(.literal .text .literal.* .text.*)
*libgcc.a:lib2funcs.*(.literal .text .literal.* .text.*)
*libspi_flash.a:spi_flash_rom_patch.*(.literal .text .literal.* .text.*)
*libgcov.a:(.literal .text .literal.* .text.*)
*( .iram1 .iram1.*)
*libspi_flash.a:spi_flash_rom_patch.*( .literal .literal.* .text .text.*)
*libesp_ringbuf.a:( .literal .literal.* .text .text.*)
*libhal.a:( .literal .literal.* .text .text.*)
*libapp_trace.a:( .literal .literal.* .text .text.*)
*libesp32.a:panic.*( .literal .literal.* .text .text.*)
*libesp32.a:core_dump.*( .literal .literal.* .text .text.*)
*librtc.a:( .literal .literal.* .text .text.*)
*libgcc.a:lib2funcs.*( .literal .literal.* .text .text.*)
*libsoc.a:cpu_util.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_clk.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_init.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_periph.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_clk_init.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_wdt.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_sleep.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_pm.*( .literal .literal.* .text .text.*)
*libsoc.a:rtc_time.*( .literal .literal.* .text .text.*)
*libfreertos.a:( .literal .literal.* .text .text.*)
*libgcov.a:( .literal .literal.* .text .text.*)
*libxtensa-debug-module.a:eri.*( .literal .literal.* .text .text.*)
*libheap.a:multi_heap_poisoning.*( .literal .literal.* .text .text.*)
*libheap.a:multi_heap.*( .literal .literal.* .text .text.*)
INCLUDE esp32.spiram.rom-functions-iram.ld
_iram_text_end = ABSOLUTE(.);
_iram_end = ABSOLUTE(.);
} > iram0_0_seg
ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
"IRAM0 segment data does not fit.")
.dram0.data :
{
_data_start = ABSOLUTE(.);
@ -124,8 +205,6 @@ SECTIONS
*libbtdm_app.a:(.data .data.*)
. = ALIGN (4);
_btdm_data_end = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
@ -135,14 +214,16 @@ SECTIONS
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
*(.dram1 .dram1.*)
*libesp32.a:panic.*(.rodata .rodata.*)
*libphy.a:(.rodata .rodata.*)
*libsoc.a:rtc_clk.*(.rodata .rodata.*)
*libapp_trace.a:(.rodata .rodata.*)
*libgcov.a:(.rodata .rodata.*)
*libheap.a:multi_heap.*(.rodata .rodata.*)
*libheap.a:multi_heap_poisoning.*(.rodata .rodata.*)
*( .data .data.* .dram1 .dram1.*)
*libapp_trace.a:( .rodata .rodata.*)
*libesp32.a:panic.*( .rodata .rodata.*)
*libphy.a:( .rodata .rodata.*)
*libsoc.a:rtc_clk.*( .rodata .rodata.*)
*libgcov.a:( .rodata .rodata.*)
*libheap.a:multi_heap_poisoning.*( .rodata .rodata.*)
*libheap.a:multi_heap.*( .rodata .rodata.*)
INCLUDE esp32.spiram.rom-functions-dram.ld
_data_end = ABSOLUTE(.);
. = ALIGN(4);
@ -167,6 +248,7 @@ SECTIONS
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.ext_ram.bss*)
_bt_bss_start = ABSOLUTE(.);
*libbt.a:(.bss .bss.* COMMON)
. = ALIGN (4);
@ -175,6 +257,9 @@ SECTIONS
*libbtdm_app.a:(.bss .bss.* COMMON)
. = ALIGN (4);
_btdm_bss_end = ABSOLUTE(.);
*( .bss .bss.* COMMON)
*(.dynsbss)
*(.sbss)
*(.sbss.*)
@ -184,22 +269,24 @@ SECTIONS
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss)
*(.bss.*)
*(.share.mem)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
/* The heap starts right after end of this section */
_heap_start = ABSOLUTE(.);
} > dram0_0_seg
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
.flash.rodata :
{
_rodata_start = ABSOLUTE(.);
*(.rodata)
*(.rodata.*)
*(EXCLUDE_FILE(*libapp_trace.a *libesp32.a:panic.* *libphy.a *libsoc.a:rtc_clk.* *libgcov.a *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .rodata EXCLUDE_FILE(*libapp_trace.a *libesp32.a:panic.* *libphy.a *libsoc.a:rtc_clk.* *libgcov.a *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .rodata.*)
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
*(.gnu.linkonce.r.*)
*(.rodata1)
@ -257,7 +344,10 @@ SECTIONS
{
_stext = .;
_text_start = ABSOLUTE(.);
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .literal EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .literal.* EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .text EXCLUDE_FILE(*libspi_flash.a:spi_flash_rom_patch.* *libesp_ringbuf.a *libhal.a *libapp_trace.a *libesp32.a:core_dump.* *libesp32.a:panic.* *librtc.a *libgcc.a:lib2funcs.* *libsoc.a:rtc_time.* *libsoc.a:rtc_pm.* *libsoc.a:rtc_sleep.* *libsoc.a:rtc_wdt.* *libsoc.a:rtc_clk_init.* *libsoc.a:rtc_periph.* *libsoc.a:rtc_init.* *libsoc.a:rtc_clk.* *libsoc.a:cpu_util.* *libfreertos.a *libgcov.a *libxtensa-debug-module.a:eri.* *libheap.a:multi_heap.* *libheap.a:multi_heap_poisoning.*) .text.*)
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
*(.fini.literal)
*(.fini)

View File

@ -0,0 +1,17 @@
/* This section is only included if CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
is set, to link some sections to BSS in PSRAM */
SECTIONS
{
/* external memory bss, from any global variable with EXT_RAM_ATTR attribute*/
.ext_ram.bss (NOLOAD) :
{
_ext_ram_bss_start = ABSOLUTE(.);
*(.ext_ram.bss*)
*libnet80211.a:(.dynsbss .sbss .sbss.* .gnu.linkonce.sb.* .scommon .sbss2.* .gnu.linkonce.sb2.* .dynbss .bss .bss.* .share.mem .gnu.linkonce.b.* COMMON)
*libpp.a:(.dynsbss .sbss .sbss.* .gnu.linkonce.sb.* .scommon .sbss2.* .gnu.linkonce.sb2.* .dynbss .bss .bss.* .share.mem .gnu.linkonce.b.* COMMON)
*liblwip.a:(.dynsbss .sbss .sbss.* .gnu.linkonce.sb.* .scommon .sbss2.* .gnu.linkonce.sb2.* .dynbss .bss .bss.* .share.mem .gnu.linkonce.b.* COMMON)
*libbt.a:(EXCLUDE_FILE (libbtdm_app.a) .dynsbss .sbss .sbss.* .gnu.linkonce.sb.* .scommon .sbss2.* .gnu.linkonce.sb2.* .dynbss .bss .bss.* .share.mem .gnu.linkonce.b.* COMMON)
_ext_ram_bss_end = ABSOLUTE(.);
} > extern_ram_seg
}

View File

@ -61,6 +61,9 @@ MEMORY
/* RTC fast memory (executable). Persists over deep sleep.
*/
rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000
/* RTC fast memory (same block as above), viewed from data bus */
rtc_data_seg(RW) : org = 0x3ff80000, len = 0x2000
/* RTC slow memory (data accessible). Persists over deep sleep.
@ -68,7 +71,22 @@ MEMORY
*/
rtc_slow_seg(RW) : org = 0x50000000 + CONFIG_ULP_COPROC_RESERVE_MEM,
len = 0x1000 - CONFIG_ULP_COPROC_RESERVE_MEM
/* external memory ,including data and text */
extern_ram_seg(RWX) : org = 0x3F800000,
len = 0x400000
}
/* Heap ends at top of dram0_0_seg */
_heap_end = 0x40000000 - CONFIG_TRACEMEM_RESERVE_DRAM;
_data_seg_org = ORIGIN(rtc_data_seg);
/* The lines below define location alias for .rtc.data section based on Kconfig option.
When the option is not defined then use slow memory segment
else the data will be placed in fast memory segment */
#ifndef CONFIG_ESP32_RTCDATA_IN_FAST_MEM
REGION_ALIAS("rtc_data_location", rtc_slow_seg );
#else
REGION_ALIAS("rtc_data_location", rtc_data_seg );
#endif

View File

@ -3,19 +3,13 @@ ESP32 ROM address table
Generated for ROM with MD5sum:
ab8282ae908fe9e7a63fb2a4ac2df013 ../../rom_image/prorom.elf
*/
PROVIDE ( abort = 0x4000bba4 );
PROVIDE ( Add2SelfBigHex256 = 0x40015b7c );
PROVIDE ( AddBigHex256 = 0x40015b28 );
PROVIDE ( AddBigHexModP256 = 0x40015c98 );
PROVIDE ( AddP256 = 0x40015c74 );
PROVIDE ( AddPdiv2_256 = 0x40015ce0 );
PROVIDE ( aes_128_cbc_decrypt = 0x4005cc7c );
PROVIDE ( aes_128_cbc_encrypt = 0x4005cc18 );
PROVIDE ( aes_unwrap = 0x4005ccf0 );
PROVIDE ( app_gpio_arg = 0x3ffe003c );
PROVIDE ( app_gpio_handler = 0x3ffe0040 );
PROVIDE ( base64_decode = 0x4005ced8 );
PROVIDE ( base64_encode = 0x4005cdbc );
PROVIDE ( BasePoint_x_256 = 0x3ff97488 );
PROVIDE ( BasePoint_y_256 = 0x3ff97468 );
PROVIDE ( bigHexInversion256 = 0x400168f0 );
@ -63,6 +57,7 @@ PROVIDE ( _bss_start_btdm = 0x3ffb8000);
PROVIDE ( _bss_end_btdm = 0x3ffbff70);
PROVIDE ( _daylight = 0x3ffae0a4 );
PROVIDE ( dbg_default_handler = 0x3ff97218 );
PROVIDE ( dbg_default_state = 0x3ff97220 );
PROVIDE ( dbg_state = 0x3ffb8d5d );
PROVIDE ( DebugE256PublicKey_x = 0x3ff97428 );
PROVIDE ( DebugE256PublicKey_y = 0x3ff97408 );
@ -97,12 +92,8 @@ PROVIDE ( ets_startup_callback = 0x3ffe0404 );
PROVIDE ( exc_cause_table = 0x3ff991d0 );
PROVIDE ( _exit_r = 0x4000bd28 );
PROVIDE ( free = 0x4000beb8 );
PROVIDE ( _free_r = 0x4000bbcc );
PROVIDE ( _fstat_r = 0x4000bccc );
PROVIDE ( __gcc_bcmp = 0x40064a70 );
PROVIDE ( _getpid_r = 0x4000bcfc );
PROVIDE ( __getreent = 0x4000be8c );
PROVIDE ( _gettimeofday_r = 0x4000bc58 );
PROVIDE ( GF_Jacobian_Point_Addition256 = 0x400163a4 );
PROVIDE ( GF_Jacobian_Point_Double256 = 0x40016260 );
PROVIDE ( GF_Point_Jacobian_To_Affine256 = 0x40016b0c );
@ -126,16 +117,9 @@ PROVIDE ( hci_evt_dbg_desc_tab = 0x3ff9750c );
PROVIDE ( hci_evt_desc_tab = 0x3ff9751c );
PROVIDE ( hci_evt_le_desc_tab = 0x3ff974b4 );
PROVIDE ( hci_fc_env = 0x3ffb9340 );
PROVIDE ( hmac_md5 = 0x4005d264 );
PROVIDE ( hmac_md5_vector = 0x4005d17c );
PROVIDE ( hmac_sha1 = 0x40060acc );
PROVIDE ( hmac_sha1_vector = 0x400609e4 );
PROVIDE ( hmac_sha256 = 0x40060d58 );
PROVIDE ( hmac_sha256_vector = 0x40060c84 );
PROVIDE ( jd_decomp = 0x400613e8 );
PROVIDE ( jd_prepare = 0x40060fa8 );
PROVIDE ( ke_env = 0x3ffb93cc );
PROVIDE ( _kill_r = 0x4000bd10 );
PROVIDE ( lb_default_handler = 0x3ff982b8 );
PROVIDE ( lb_default_state_tab_p_get = 0x4001c198 );
PROVIDE ( lb_env = 0x3ffb9424 );
@ -198,23 +182,10 @@ PROVIDE ( lm_n_page_tab = 0x3ff990e8 );
PROVIDE ( lmp_desc_tab = 0x3ff96e6c );
PROVIDE ( lmp_ext_desc_tab = 0x3ff96d9c );
PROVIDE ( lm_state = 0x3ffb9a1c );
PROVIDE ( _lock_acquire_recursive = 0x4000be28 );
PROVIDE ( _lock_close = 0x4000bdec );
PROVIDE ( _lock_close_recursive = 0x4000be00 );
PROVIDE ( _lock_init = 0x4000bdc4 );
PROVIDE ( _lock_init_recursive = 0x4000bdd8 );
PROVIDE ( _lock_release_recursive = 0x4000be78 );
PROVIDE ( _lock_try_acquire = 0x4000be3c );
PROVIDE ( _lock_try_acquire_recursive = 0x4000be50 );
PROVIDE ( _lseek_r = 0x4000bd8c );
PROVIDE ( malloc = 0x4000bea0 );
PROVIDE ( _malloc_r = 0x4000bbb4 );
PROVIDE ( maxSecretKey_256 = 0x3ff97448 );
PROVIDE ( __mb_cur_max = 0x3ff96530 );
PROVIDE ( MD5Final = 0x4005db1c );
PROVIDE ( MD5Init = 0x4005da7c );
PROVIDE ( MD5Update = 0x4005da9c );
PROVIDE ( md5_vector = 0x4005db80 );
PROVIDE ( mmu_init = 0x400095a4 );
PROVIDE ( __month_lengths = 0x3ff9609c );
PROVIDE ( MultiplyBigHexByUint32_256 = 0x40016214 );
@ -227,7 +198,6 @@ PROVIDE ( mz_free = 0x4005eed4 );
PROVIDE ( notEqual256 = 0x40015b04 );
PROVIDE ( one_bits = 0x3ff971f8 );
PROVIDE ( _open_r = 0x4000bd54 );
PROVIDE ( pbkdf2_sha1 = 0x40060ba4 );
PROVIDE ( phy_get_romfuncs = 0x40004100 );
PROVIDE ( _Pri_4_HandlerAddress = 0x3ffe0648 );
PROVIDE ( _Pri_5_HandlerAddress = 0x3ffe064c );
@ -245,7 +215,6 @@ PROVIDE ( r_bt_util_buf_sync_rx_alloc = 0x40010468 );
PROVIDE ( r_bt_util_buf_sync_rx_free = 0x4001049c );
PROVIDE ( r_bt_util_buf_sync_tx_alloc = 0x400103ec );
PROVIDE ( r_bt_util_buf_sync_tx_free = 0x40010428 );
PROVIDE ( rc4_skip = 0x40060928 );
PROVIDE ( r_co_bdaddr_compare = 0x40014324 );
PROVIDE ( r_co_bytes_to_string = 0x400142e4 );
PROVIDE ( r_co_list_check_size_available = 0x400142c4 );
@ -292,7 +261,6 @@ PROVIDE ( r_ea_interval_remove = 0x40015590 );
PROVIDE ( ea_conflict_check = 0x40014e9c );
PROVIDE ( ea_prog_timer = 0x40014f88 );
PROVIDE ( realloc = 0x4000becc );
PROVIDE ( _realloc_r = 0x4000bbe0 );
PROVIDE ( r_ea_offset_req = 0x40015748 );
PROVIDE ( r_ea_sleep_check = 0x40015928 );
PROVIDE ( r_ea_sw_isr = 0x40015724 );
@ -703,9 +671,11 @@ PROVIDE ( ld_acl_tx = 0x4002ffdc );
PROVIDE ( ld_acl_rx_sync = 0x4002fbec );
PROVIDE ( ld_acl_rx_sync2 = 0x4002fd8c );
PROVIDE ( ld_acl_rx_no_sync = 0x4002fe78 );
PROVIDE ( ld_acl_clk_isr = 0x40030cf8 );
PROVIDE ( ld_sco_modify = 0x40031778 );
PROVIDE ( lm_cmd_cmp_send = 0x40051838 );
PROVIDE ( ld_sco_frm_cbk = 0x400349dc );
PROVIDE ( ld_acl_sniff_frm_cbk = 0x4003482c );
PROVIDE ( r_ld_acl_active_hop_types_get = 0x40036e10 );
PROVIDE ( r_ld_acl_afh_confirm = 0x40036d40 );
PROVIDE ( r_ld_acl_afh_prepare = 0x40036c84 );
@ -1315,14 +1285,9 @@ PROVIDE ( rwip_priority = 0x3ff99159 );
PROVIDE ( rwip_rf = 0x3ffbdb28 );
PROVIDE ( rwip_rf_p_get = 0x400558f4 );
PROVIDE ( r_XorKey = 0x400112c0 );
PROVIDE ( _sbrk_r = 0x4000bce4 );
PROVIDE ( __sf_fake_stderr = 0x3ff96458 );
PROVIDE ( __sf_fake_stdin = 0x3ff96498 );
PROVIDE ( __sf_fake_stdout = 0x3ff96478 );
PROVIDE ( sha1_prf = 0x40060ae8 );
PROVIDE ( sha1_vector = 0x40060b64 );
PROVIDE ( sha256_prf = 0x40060d70 );
PROVIDE ( sha256_vector = 0x40060e08 );
PROVIDE ( sha_blk_bits = 0x3ff99290 );
PROVIDE ( sha_blk_bits_bytes = 0x3ff99288 );
PROVIDE ( sha_blk_hash_bytes = 0x3ff9928c );
@ -1378,7 +1343,6 @@ PROVIDE ( tdefl_get_prev_return_status = 0x400608d0 );
PROVIDE ( tdefl_init = 0x40060810 );
PROVIDE ( tdefl_write_image_to_png_file_in_memory = 0x4006091c );
PROVIDE ( tdefl_write_image_to_png_file_in_memory_ex = 0x40060910 );
PROVIDE ( _times_r = 0x4000bc40 );
PROVIDE ( _timezone = 0x3ffae0a0 );
PROVIDE ( tinfl_decompress = 0x4005ef30 );
PROVIDE ( tinfl_decompress_mem_to_callback = 0x40060090 );
@ -1413,8 +1377,8 @@ PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
PROVIDE ( esp_rom_spiflash_config_clk = 0x40062bc8 );
PROVIDE ( g_rom_spiflash_chip = 0x3ffae270 );
/*
These functions are xtos-related (or call xtos-related functions) and do not play well
/*
These functions are xtos-related (or call xtos-related functions) and do not play well
with multicore FreeRTOS. Where needed, we provide alternatives that are multicore
compatible. These functions also use a chunk of static RAM, by not using them we can
allocate that RAM for general use.
@ -1511,7 +1475,6 @@ PROVIDE ( uart_tx_flush = 0x40009258 );
PROVIDE ( uart_tx_one_char = 0x40009200 );
PROVIDE ( uart_tx_one_char2 = 0x4000922c );
PROVIDE ( uart_tx_switch = 0x40009028 );
PROVIDE ( uart_tx_wait_idle = 0x40009278 );
/*
@ -1578,8 +1541,6 @@ PROVIDE ( ets_efuse_read_op = 0x40008600 );
PROVIDE ( ets_intr_lock = 0x400067b0 );
PROVIDE ( ets_intr_unlock = 0x400067c4 );
PROVIDE ( ets_isr_attach = 0x400067ec );
PROVIDE ( ets_isr_mask = 0x400067fc );
PROVIDE ( ets_isr_unmask = 0x40006808 );
PROVIDE ( ets_waiti0 = 0x400067d8 );
PROVIDE ( intr_matrix_set = 0x4000681c );
PROVIDE ( check_pos = 0x400068b8 );
@ -1619,13 +1580,6 @@ PROVIDE ( ets_delay_us = 0x40008534 );
PROVIDE ( ets_get_cpu_frequency = 0x4000855c );
PROVIDE ( ets_get_detected_xtal_freq = 0x40008588 );
PROVIDE ( ets_get_xtal_scale = 0x4000856c );
PROVIDE ( ets_timer_arm = 0x40008368 );
PROVIDE ( ets_timer_arm_us = 0x400083ac );
PROVIDE ( ets_timer_disarm = 0x400083ec );
PROVIDE ( ets_timer_done = 0x40008428 );
PROVIDE ( ets_timer_handler_isr = 0x40008454 );
PROVIDE ( ets_timer_init = 0x400084e8 );
PROVIDE ( ets_timer_setfn = 0x40008350 );
PROVIDE ( ets_update_cpu_frequency_rom = 0x40008550 ); /* Updates g_ticks_per_us on the current CPU only; not on the other core */
/* Following are static data, but can be used, not generated by script <<<<< btdm data */

View File

@ -0,0 +1,60 @@
/*
ROM Functions defined in this file are not used in ESP-IDF as is,
and different definitions for functions with the same names are provided.
This file is not used when linking ESP-IDF and is intended for reference only
*/
PROVIDE ( abort = 0x4000bba4 );
PROVIDE ( aes_128_cbc_decrypt = 0x4005cc7c );
PROVIDE ( aes_128_cbc_encrypt = 0x4005cc18 );
PROVIDE ( aes_unwrap = 0x4005ccf0 );
PROVIDE ( base64_decode = 0x4005ced8 );
PROVIDE ( base64_encode = 0x4005cdbc );
PROVIDE ( ets_isr_mask = 0x400067fc );
PROVIDE ( ets_isr_unmask = 0x40006808 );
PROVIDE ( ets_timer_arm = 0x40008368 );
PROVIDE ( ets_timer_arm_us = 0x400083ac );
PROVIDE ( ets_timer_disarm = 0x400083ec );
PROVIDE ( ets_timer_done = 0x40008428 );
PROVIDE ( ets_timer_init = 0x400084e8 );
PROVIDE ( ets_timer_handler_isr = 0x40008454 );
PROVIDE ( ets_timer_setfn = 0x40008350 );
PROVIDE ( _free_r = 0x4000bbcc );
PROVIDE ( _getpid_r = 0x4000bcfc );
PROVIDE ( __getreent = 0x4000be8c );
PROVIDE ( _gettimeofday_r = 0x4000bc58 );
PROVIDE ( hmac_md5 = 0x4005d264 );
PROVIDE ( hmac_md5_vector = 0x4005d17c );
PROVIDE ( hmac_sha1 = 0x40060acc );
PROVIDE ( hmac_sha1_vector = 0x400609e4 );
PROVIDE ( hmac_sha256 = 0x40060d58 );
PROVIDE ( hmac_sha256_vector = 0x40060c84 );
PROVIDE ( _kill_r = 0x4000bd10 );
PROVIDE ( _lock_acquire = 0x4000be14 );
PROVIDE ( _lock_acquire_recursive = 0x4000be28 );
PROVIDE ( _lock_close = 0x4000bdec );
PROVIDE ( _lock_close_recursive = 0x4000be00 );
PROVIDE ( _lock_init = 0x4000bdc4 );
PROVIDE ( _lock_init_recursive = 0x4000bdd8 );
PROVIDE ( _lock_release = 0x4000be64 );
PROVIDE ( _lock_release_recursive = 0x4000be78 );
PROVIDE ( _lock_try_acquire = 0x4000be3c );
PROVIDE ( _lock_try_acquire_recursive = 0x4000be50 );
PROVIDE ( _malloc_r = 0x4000bbb4 );
PROVIDE ( MD5Final = 0x4005db1c );
PROVIDE ( MD5Init = 0x4005da7c );
PROVIDE ( MD5Update = 0x4005da9c );
PROVIDE ( md5_vector = 0x4005db80 );
PROVIDE ( pbkdf2_sha1 = 0x40060ba4 );
PROVIDE ( rc4_skip = 0x40060928 );
PROVIDE ( _raise_r = 0x4000bc70 );
PROVIDE ( _realloc_r = 0x4000bbe0 );
PROVIDE ( _sbrk_r = 0x4000bce4 );
PROVIDE ( sha1_prf = 0x40060ae8 );
PROVIDE ( sha1_vector = 0x40060b64 );
PROVIDE ( sha256_prf = 0x40060d70 );
PROVIDE ( sha256_vector = 0x40060e08 );
PROVIDE ( _system_r = 0x4000bc10 );
PROVIDE ( _times_r = 0x4000bc40 );
PROVIDE ( uart_tx_wait_idle = 0x40009278 );

View File

@ -64,8 +64,6 @@ PROVIDE ( __locale_mb_cur_max = 0x40059548 );
PROVIDE ( __locale_msgcharset = 0x40059550 );
PROVIDE ( localtime = 0x400595dc );
PROVIDE ( localtime_r = 0x400595fc );
PROVIDE ( _lock_acquire = 0x4000be14 );
PROVIDE ( _lock_release = 0x4000be64 );
PROVIDE ( longjmp = 0x400562cc );
PROVIDE ( memccpy = 0x4000c220 );
PROVIDE ( memchr = 0x4000c244 );
@ -77,7 +75,6 @@ PROVIDE ( memset = 0x4000c44c );
PROVIDE ( mktime = 0x4005a5e8 );
PROVIDE ( open = 0x4000178c );
PROVIDE ( qsort = 0x40056424 );
PROVIDE ( _raise_r = 0x4000bc70 );
PROVIDE ( rand = 0x40001058 );
PROVIDE ( rand_r = 0x400010d4 );
PROVIDE ( read = 0x400017dc );
@ -145,7 +142,6 @@ PROVIDE ( __swbuf = 0x40058cb4 );
PROVIDE ( __swbuf_r = 0x40058bec );
PROVIDE ( __swrite = 0x40001150 );
PROVIDE ( __swsetup_r = 0x40058cc8 );
PROVIDE ( _system_r = 0x4000bc10 );
PROVIDE ( time = 0x40001844 );
PROVIDE ( __time_load_locale = 0x4000183c );
PROVIDE ( times = 0x40001808 );

View File

@ -53,12 +53,22 @@ MEMORY
/* RTC fast memory (executable). Persists over deep sleep.
*/
rtc_iram_seg(RWX) : org = 0x400C0000, len = 0x2000
/* RTC fast memory (same block as above), viewed from data bus */
rtc_data_seg(RW) : org = 0x3ff80000, len = 0x2000
/* RTC slow memory (data accessible). Persists over deep sleep.
Start of RTC slow memory is reserved for ULP co-processor code + data, if enabled.
*/
rtc_slow_seg(RW) : org = 0x50000000 + 512,
len = 0x1000 - 512
/* external memory ,including data and text */
extern_ram_seg(RWX) : org = 0x3F800000,
len = 0x400000
}
/* Heap ends at top of dram0_0_seg */
_heap_end = 0x40000000 - 0x0;
_data_seg_org = ORIGIN(rtc_data_seg);
/* The lines below define location alias for .rtc.data section based on Kconfig option.
When the option is not defined then use slow memory segment
else the data will be placed in fast memory segment */
REGION_ALIAS("rtc_data_location", rtc_slow_seg );