forked from espressif/arduino-esp32
Initial Commit
This commit is contained in:
@ -0,0 +1,331 @@
|
||||
/*
|
||||
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
***************************************************************************
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
***************************************************************************
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available on the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that is more than just the market leader, it *
|
||||
* is the industry's de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly while simultaneously helping *
|
||||
* to support the FreeRTOS project by purchasing a FreeRTOS *
|
||||
* tutorial book, reference manual, or both: *
|
||||
* http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
|
||||
the FAQ page "My application does not run, what could be wrong?". Have you
|
||||
defined configASSERT()?
|
||||
|
||||
http://www.FreeRTOS.org/support - In return for receiving this top quality
|
||||
embedded software for free we request you assist our global community by
|
||||
participating in the support forum.
|
||||
|
||||
http://www.FreeRTOS.org/training - Investing in training allows your team to
|
||||
be as productive as possible as early as possible. Now you can receive
|
||||
FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
|
||||
Ltd, and the world's leading authority on the world's leading RTOS.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
|
||||
Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
|
||||
Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and commercial middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
#include "sdkconfig.h"
|
||||
|
||||
/* enable use of optimized task selection by the scheduler */
|
||||
#ifdef CONFIG_FREERTOS_OPTIMIZED_SCHEDULER
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
|
||||
#endif
|
||||
|
||||
/* ESP31 and ESP32 are dualcore processors. */
|
||||
#ifndef CONFIG_FREERTOS_UNICORE
|
||||
#define portNUM_PROCESSORS 2
|
||||
#else
|
||||
#define portNUM_PROCESSORS 1
|
||||
#endif
|
||||
|
||||
#define XT_USE_THREAD_SAFE_CLIB 0
|
||||
#define configASSERT_2 0
|
||||
#define portUSING_MPU_WRAPPERS 0
|
||||
#define configUSE_MUTEX 1
|
||||
#undef XT_USE_SWPRI
|
||||
|
||||
#if CONFIG_FREERTOS_CORETIMER_0
|
||||
#define XT_TIMER_INDEX 0
|
||||
#elif CONFIG_FREERTOS_CORETIMER_1
|
||||
#define XT_TIMER_INDEX 1
|
||||
#endif
|
||||
|
||||
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS
|
||||
#define configTHREAD_LOCAL_STORAGE_DELETE_CALLBACKS 1
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
/**
|
||||
* This function is defined to provide a deprecation warning whenever
|
||||
* XT_CLOCK_FREQ macro is used.
|
||||
* Update the code to use esp_clk_cpu_freq function instead.
|
||||
* @return current CPU clock frequency, in Hz
|
||||
*/
|
||||
int xt_clock_freq(void) __attribute__((deprecated));
|
||||
|
||||
#define XT_CLOCK_FREQ (xt_clock_freq())
|
||||
|
||||
#endif // __ASSEMBLER__
|
||||
|
||||
|
||||
/* Required for configuration-dependent settings */
|
||||
#include <freertos/xtensa_config.h>
|
||||
|
||||
/* configASSERT behaviour */
|
||||
#ifndef __ASSEMBLER__
|
||||
#include <stdlib.h> /* for abort() */
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
#include "esp32/rom/ets_sys.h"
|
||||
#elif CONFIG_IDF_TARGET_ESP32S2
|
||||
#include "esp32s2/rom/ets_sys.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_FREERTOS_ASSERT_DISABLE)
|
||||
#define configASSERT(a) /* assertions disabled */
|
||||
#elif defined(CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE)
|
||||
#define configASSERT(a) if (unlikely(!(a))) { \
|
||||
ets_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__, \
|
||||
__FUNCTION__); \
|
||||
}
|
||||
#else /* CONFIG_FREERTOS_ASSERT_FAIL_ABORT */
|
||||
#define configASSERT(a) if (unlikely(!(a))) { \
|
||||
ets_printf("%s:%d (%s)- assert failed!\n", __FILE__, __LINE__, \
|
||||
__FUNCTION__); \
|
||||
abort(); \
|
||||
}
|
||||
#endif
|
||||
|
||||
#if CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
|
||||
#define UNTESTED_FUNCTION() { ets_printf("Untested FreeRTOS function %s\r\n", __FUNCTION__); configASSERT(false); } while(0)
|
||||
#else
|
||||
#define UNTESTED_FUNCTION()
|
||||
#endif
|
||||
|
||||
|
||||
#endif /* def __ASSEMBLER__ */
|
||||
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* Note that the default heap size is deliberately kept small so that
|
||||
* the build is more likely to succeed for configurations with limited
|
||||
* memory.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_IDLE_HOOK 1
|
||||
#define configUSE_TICK_HOOK 1
|
||||
|
||||
#define configTICK_RATE_HZ ( CONFIG_FREERTOS_HZ )
|
||||
|
||||
/* Default clock rate for simulator */
|
||||
//#define configCPU_CLOCK_HZ 80000000
|
||||
|
||||
/* This has impact on speed of search for highest priority */
|
||||
#ifdef SMALL_TEST
|
||||
#define configMAX_PRIORITIES ( 7 )
|
||||
#else
|
||||
#define configMAX_PRIORITIES ( 25 )
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_APPTRACE_ENABLE
|
||||
#define configMINIMAL_STACK_SIZE 768
|
||||
#else
|
||||
/* apptrace module requires at least 2KB of stack per task */
|
||||
#define configMINIMAL_STACK_SIZE 2048
|
||||
#endif
|
||||
|
||||
#ifndef configIDLE_TASK_STACK_SIZE
|
||||
#define configIDLE_TASK_STACK_SIZE CONFIG_FREERTOS_IDLE_TASK_STACKSIZE
|
||||
#endif
|
||||
|
||||
/* The Xtensa port uses a separate interrupt stack. Adjust the stack size */
|
||||
/* to suit the needs of your specific application. */
|
||||
#ifndef configISR_STACK_SIZE
|
||||
#define configISR_STACK_SIZE CONFIG_FREERTOS_ISR_STACKSIZE
|
||||
#endif
|
||||
|
||||
/* Minimal heap size to make sure examples can run on memory limited
|
||||
configs. Adjust this to suit your system. */
|
||||
|
||||
|
||||
//We define the heap to span all of the non-statically-allocated shared RAM. ToDo: Make sure there
|
||||
//is some space left for the app and main cpu when running outside of a thread.
|
||||
#define configAPPLICATION_ALLOCATED_HEAP 1
|
||||
#define configTOTAL_HEAP_SIZE (&_heap_end - &_heap_start)//( ( size_t ) (64 * 1024) )
|
||||
|
||||
#define configMAX_TASK_NAME_LEN ( CONFIG_FREERTOS_MAX_TASK_NAME_LEN )
|
||||
|
||||
#ifdef CONFIG_FREERTOS_USE_TRACE_FACILITY
|
||||
#define configUSE_TRACE_FACILITY 1 /* Used by uxTaskGetSystemState(), and other trace facility functions */
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FREERTOS_USE_STATS_FORMATTING_FUNCTIONS
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 1 /* Used by vTaskList() */
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FREERTOS_VTASKLIST_INCLUDE_COREID
|
||||
#define configTASKLIST_INCLUDE_COREID 1
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS
|
||||
#define configGENERATE_RUN_TIME_STATS 1 /* Used by vTaskGetRunTimeStats() */
|
||||
#endif
|
||||
|
||||
#define configUSE_TRACE_FACILITY_2 0 /* Provided by Xtensa port patch */
|
||||
#define configBENCHMARK 0 /* Provided by Xtensa port patch */
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 0
|
||||
#define configQUEUE_REGISTRY_SIZE CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE
|
||||
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
|
||||
#if CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 0
|
||||
#elif CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 1
|
||||
#elif CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
|
||||
|
||||
/* Set the following definitions to 1 to include the API function, or zero
|
||||
to exclude the API function. */
|
||||
|
||||
#define INCLUDE_vTaskPrioritySet 1
|
||||
#define INCLUDE_uxTaskPriorityGet 1
|
||||
#define INCLUDE_vTaskDelete 1
|
||||
#define INCLUDE_vTaskCleanUpResources 0
|
||||
#define INCLUDE_vTaskSuspend 1
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 1
|
||||
#define INCLUDE_pcTaskGetTaskName 1
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 1
|
||||
#define INCLUDE_pxTaskGetStackStart 1
|
||||
|
||||
#define INCLUDE_xSemaphoreGetMutexHolder 1
|
||||
|
||||
/* The priority at which the tick interrupt runs. This should probably be
|
||||
kept at 1. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY 1
|
||||
|
||||
/* The maximum interrupt priority from which FreeRTOS.org API functions can
|
||||
be called. Only API functions that end in ...FromISR() can be used within
|
||||
interrupts. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY XCHAL_EXCM_LEVEL
|
||||
|
||||
#define configUSE_NEWLIB_REENTRANT 1
|
||||
|
||||
#define configSUPPORT_DYNAMIC_ALLOCATION 1
|
||||
#define configSUPPORT_STATIC_ALLOCATION CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
#if CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP
|
||||
extern void vPortCleanUpTCB ( void *pxTCB );
|
||||
#define portCLEAN_UP_TCB( pxTCB ) vPortCleanUpTCB( pxTCB )
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Test FreeRTOS timers (with timer task) and more. */
|
||||
/* Some files don't compile if this flag is disabled */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
|
||||
#define configTIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
|
||||
#define configTIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
|
||||
|
||||
#define INCLUDE_xTimerPendFunctionCall 1
|
||||
#define INCLUDE_eTaskGetState 1
|
||||
#define configUSE_QUEUE_SETS 1
|
||||
|
||||
#define configUSE_TICKLESS_IDLE CONFIG_FREERTOS_USE_TICKLESS_IDLE
|
||||
#if configUSE_TICKLESS_IDLE
|
||||
#define configEXPECTED_IDLE_TIME_BEFORE_SLEEP CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP
|
||||
#endif //configUSE_TICKLESS_IDLE
|
||||
|
||||
#define configXT_BOARD 1 /* Board mode */
|
||||
#define configXT_SIMULATOR 0
|
||||
|
||||
#if CONFIG_ESP32_ENABLE_COREDUMP
|
||||
#define configENABLE_TASK_SNAPSHOT 1
|
||||
#endif
|
||||
#ifndef configENABLE_TASK_SNAPSHOT
|
||||
#define configENABLE_TASK_SNAPSHOT 1
|
||||
#endif
|
||||
|
||||
#if CONFIG_SYSVIEW_ENABLE
|
||||
#ifndef __ASSEMBLER__
|
||||
#include "SEGGER_SYSVIEW_FreeRTOS.h"
|
||||
#undef INLINE // to avoid redefinition
|
||||
#endif /* def __ASSEMBLER__ */
|
||||
#endif
|
||||
|
||||
#if CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER
|
||||
#define configCHECK_MUTEX_GIVEN_BY_OWNER 1
|
||||
#else
|
||||
#define configCHECK_MUTEX_GIVEN_BY_OWNER 0
|
||||
#endif
|
||||
|
||||
#endif /* FREERTOS_CONFIG_H */
|
||||
|
@ -0,0 +1,46 @@
|
||||
/*******************************************************************************
|
||||
// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining
|
||||
// a copy of this software and associated documentation files (the
|
||||
// "Software"), to deal in the Software without restriction, including
|
||||
// without limitation the rights to use, copy, modify, merge, publish,
|
||||
// distribute, sublicense, and/or sell copies of the Software, and to
|
||||
// permit persons to whom the Software is furnished to do so, subject to
|
||||
// the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included
|
||||
// in all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
--------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*
|
||||
* This utility helps benchmarking interrupt latency and context switches.
|
||||
* In order to enable it, set configBENCHMARK to 1 in FreeRTOSConfig.h.
|
||||
* You will also need to download the FreeRTOS_trace patch that contains
|
||||
* portbenchmark.c and the complete version of portbenchmark.h
|
||||
*/
|
||||
|
||||
#ifndef PORTBENCHMARK_H
|
||||
#define PORTBENCHMARK_H
|
||||
|
||||
#if configBENCHMARK
|
||||
#error "You need to download the FreeRTOS_trace patch that overwrites this file"
|
||||
#endif
|
||||
|
||||
#define portbenchmarkINTERRUPT_DISABLE()
|
||||
#define portbenchmarkINTERRUPT_RESTORE(newstate)
|
||||
#define portbenchmarkIntLatency()
|
||||
#define portbenchmarkIntWait()
|
||||
#define portbenchmarkReset()
|
||||
#define portbenchmarkPrint()
|
||||
|
||||
#endif /* PORTBENCHMARK */
|
@ -0,0 +1,434 @@
|
||||
/*
|
||||
FreeRTOS V8.2.0 - Copyright (C) 2015 Real Time Engineers Ltd.
|
||||
All rights reserved
|
||||
|
||||
VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* FreeRTOS provides completely free yet professionally developed, *
|
||||
* robust, strictly quality controlled, supported, and cross *
|
||||
* platform software that has become a de facto standard. *
|
||||
* *
|
||||
* Help yourself get started quickly and support the FreeRTOS *
|
||||
* project by purchasing a FreeRTOS tutorial book, reference *
|
||||
* manual, or both from: http://www.FreeRTOS.org/Documentation *
|
||||
* *
|
||||
* Thank you! *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
This file is part of the FreeRTOS distribution.
|
||||
|
||||
FreeRTOS is free software; you can redistribute it and/or modify it under
|
||||
the terms of the GNU General Public License (version 2) as published by the
|
||||
Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
|
||||
|
||||
>>! NOTE: The modification to the GPL is included to allow you to !<<
|
||||
>>! distribute a combined work that includes FreeRTOS without being !<<
|
||||
>>! obliged to provide the source code for proprietary components !<<
|
||||
>>! outside of the FreeRTOS kernel. !<<
|
||||
|
||||
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
||||
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
||||
FOR A PARTICULAR PURPOSE. Full license text is available from the following
|
||||
link: http://www.freertos.org/a00114.html
|
||||
|
||||
1 tab == 4 spaces!
|
||||
|
||||
***************************************************************************
|
||||
* *
|
||||
* Having a problem? Start by reading the FAQ "My application does *
|
||||
* not run, what could be wrong?" *
|
||||
* *
|
||||
* http://www.FreeRTOS.org/FAQHelp.html *
|
||||
* *
|
||||
***************************************************************************
|
||||
|
||||
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
||||
license and Real Time Engineers Ltd. contact details.
|
||||
|
||||
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
||||
including FreeRTOS+Trace - an indispensable productivity tool, a DOS
|
||||
compatible FAT file system, and our tiny thread aware UDP/IP stack.
|
||||
|
||||
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
||||
Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
|
||||
licenses offer ticketed support, indemnification and middleware.
|
||||
|
||||
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
||||
engineered and independently SIL3 certified version for use in safety and
|
||||
mission critical applications that require provable dependability.
|
||||
|
||||
1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
#ifndef PORTMACRO_H
|
||||
#define PORTMACRO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include <xtensa/hal.h>
|
||||
#include <xtensa/config/core.h>
|
||||
#include <xtensa/config/system.h> /* required for XSHAL_CLIB */
|
||||
#include <xtensa/xtruntime.h>
|
||||
#include "esp_private/crosscore_int.h"
|
||||
#include "esp_timer.h" /* required for FreeRTOS run time stats */
|
||||
#include "soc/spinlock.h"
|
||||
#include <esp_heap_caps.h>
|
||||
|
||||
#include "sdkconfig.h"
|
||||
|
||||
#ifdef CONFIG_LEGACY_INCLUDE_COMMON_HEADERS
|
||||
#include "soc/soc_memory_layout.h"
|
||||
#endif
|
||||
|
||||
//#include "xtensa_context.h"
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Port specific definitions.
|
||||
*
|
||||
* The settings in this file configure FreeRTOS correctly for the
|
||||
* given hardware and compiler.
|
||||
*
|
||||
* These settings should not be altered.
|
||||
*-----------------------------------------------------------
|
||||
*/
|
||||
|
||||
/* Type definitions. */
|
||||
|
||||
#define portCHAR int8_t
|
||||
#define portFLOAT float
|
||||
#define portDOUBLE double
|
||||
#define portLONG int32_t
|
||||
#define portSHORT int16_t
|
||||
#define portSTACK_TYPE uint8_t
|
||||
#define portBASE_TYPE int
|
||||
|
||||
typedef portSTACK_TYPE StackType_t;
|
||||
typedef portBASE_TYPE BaseType_t;
|
||||
typedef unsigned portBASE_TYPE UBaseType_t;
|
||||
|
||||
#if( configUSE_16_BIT_TICKS == 1 )
|
||||
typedef uint16_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffff
|
||||
#else
|
||||
typedef uint32_t TickType_t;
|
||||
#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
// portbenchmark
|
||||
#include "portbenchmark.h"
|
||||
#include "sdkconfig.h"
|
||||
#include "esp_attr.h"
|
||||
|
||||
static inline uint32_t xPortGetCoreID(void);
|
||||
|
||||
// Critical section management. NW-TODO: replace XTOS_SET_INTLEVEL with more efficient version, if any?
|
||||
// These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level.
|
||||
//
|
||||
// Only applies to one CPU. See notes above & below for reasons not to use these.
|
||||
#define portDISABLE_INTERRUPTS() do { XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); portbenchmarkINTERRUPT_DISABLE(); } while (0)
|
||||
#define portENABLE_INTERRUPTS() do { portbenchmarkINTERRUPT_RESTORE(0); XTOS_SET_INTLEVEL(0); } while (0)
|
||||
|
||||
// Cleaner solution allows nested interrupts disabling and restoring via local registers or stack.
|
||||
// They can be called from interrupts too.
|
||||
// WARNING: Only applies to current CPU. See notes above.
|
||||
static inline unsigned portENTER_CRITICAL_NESTED(void) {
|
||||
unsigned state = XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL);
|
||||
portbenchmarkINTERRUPT_DISABLE();
|
||||
return state;
|
||||
}
|
||||
#define portEXIT_CRITICAL_NESTED(state) do { portbenchmarkINTERRUPT_RESTORE(state); XTOS_RESTORE_JUST_INTLEVEL(state); } while (0)
|
||||
|
||||
/*
|
||||
Modifications to portENTER_CRITICAL.
|
||||
|
||||
For an introduction, see "Critical Sections & Disabling Interrupts" in docs/api-guides/freertos-smp.rst
|
||||
|
||||
The original portENTER_CRITICAL only disabled the ISRs. This is enough for single-CPU operation: by
|
||||
disabling the interrupts, there is no task switch so no other tasks can meddle in the data, and because
|
||||
interrupts are disabled, ISRs can't corrupt data structures either.
|
||||
|
||||
For multiprocessing, things get a bit more hairy. First of all, disabling the interrupts doesn't stop
|
||||
the tasks or ISRs on the other processors meddling with our CPU. For tasks, this is solved by adding
|
||||
a spinlock to the portENTER_CRITICAL macro. A task running on the other CPU accessing the same data will
|
||||
spinlock in the portENTER_CRITICAL code until the first CPU is done.
|
||||
|
||||
For ISRs, we now also need muxes: while portENTER_CRITICAL disabling interrupts will stop ISRs on the same
|
||||
CPU from meddling with the data, it does not stop interrupts on the other cores from interfering with the
|
||||
data. For this, we also use a spinlock in the routines called by the ISR, but these spinlocks
|
||||
do not disable the interrupts (because they already are).
|
||||
|
||||
This all assumes that interrupts are either entirely disabled or enabled. Interrupt priority levels
|
||||
will break this scheme.
|
||||
|
||||
Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vTaskEnterCritical, meaning
|
||||
that either function can be called both from ISR as well as task context. This is not standard FreeRTOS
|
||||
behaviour; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
|
||||
*/
|
||||
|
||||
/* "mux" data structure (spinlock) */
|
||||
typedef struct {
|
||||
spinlock_t spinlock;
|
||||
} portMUX_TYPE;
|
||||
|
||||
#define portMUX_FREE_VAL SPINLOCK_FREE
|
||||
#define portMUX_NO_TIMEOUT SPINLOCK_WAIT_FOREVER /* When passed for 'timeout_cycles', spin forever if necessary */
|
||||
#define portMUX_TRY_LOCK SPINLOCK_NO_WAIT /* Try to acquire the spinlock a single time only */
|
||||
#define portMUX_INITIALIZER_UNLOCKED {.spinlock=SPINLOCK_INITIALIZER}
|
||||
|
||||
#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
|
||||
void vPortAssertIfInISR(void);
|
||||
|
||||
#define portCRITICAL_NESTING_IN_TCB 0
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortCPUInitializeMutex(portMUX_TYPE *mux)
|
||||
{
|
||||
spinlock_initialize(&mux->spinlock);
|
||||
}
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortCPUAcquireMutex(portMUX_TYPE *mux)
|
||||
{
|
||||
spinlock_acquire(&mux->spinlock, portMUX_NO_TIMEOUT);
|
||||
}
|
||||
|
||||
static inline bool __attribute__((always_inline)) vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout)
|
||||
{
|
||||
return (spinlock_acquire(&mux->spinlock, timeout));
|
||||
}
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortCPUReleaseMutex(portMUX_TYPE *mux)
|
||||
{
|
||||
spinlock_release(&mux->spinlock);
|
||||
}
|
||||
|
||||
void vPortEnterCritical(portMUX_TYPE *mux);
|
||||
void vPortExitCritical(portMUX_TYPE *mux);
|
||||
|
||||
/*
|
||||
* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
|
||||
* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
|
||||
*/
|
||||
BaseType_t xPortInIsrContext(void);
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortEnterCriticalCompliance(portMUX_TYPE *mux)
|
||||
{
|
||||
if(!xPortInIsrContext()) {
|
||||
vPortEnterCritical(mux);
|
||||
} else {
|
||||
ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__,
|
||||
__FUNCTION__);
|
||||
abort();
|
||||
}
|
||||
}
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortExitCriticalCompliance(portMUX_TYPE *mux)
|
||||
{
|
||||
if(!xPortInIsrContext()) {
|
||||
vPortExitCritical(mux);
|
||||
} else {
|
||||
ets_printf("%s:%d (%s)- port*_CRITICAL called from ISR context!\n", __FILE__, __LINE__,
|
||||
__FUNCTION__);
|
||||
abort();
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
|
||||
/* Calling port*_CRITICAL from ISR context would cause an assert failure.
|
||||
* If the parent function is called from both ISR and Non-ISR context then call port*_CRITICAL_SAFE
|
||||
*/
|
||||
#define portENTER_CRITICAL(mux) vPortEnterCriticalCompliance(mux)
|
||||
#define portEXIT_CRITICAL(mux) vPortExitCriticalCompliance(mux)
|
||||
#else
|
||||
#define portENTER_CRITICAL(mux) vPortEnterCritical(mux)
|
||||
#define portEXIT_CRITICAL(mux) vPortExitCritical(mux)
|
||||
#endif
|
||||
|
||||
#define portENTER_CRITICAL_ISR(mux) vPortEnterCritical(mux)
|
||||
#define portEXIT_CRITICAL_ISR(mux) vPortExitCritical(mux)
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortEnterCriticalSafe(portMUX_TYPE *mux)
|
||||
{
|
||||
if (xPortInIsrContext()) {
|
||||
portENTER_CRITICAL_ISR(mux);
|
||||
} else {
|
||||
portENTER_CRITICAL(mux);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void __attribute__((always_inline)) vPortExitCriticalSafe(portMUX_TYPE *mux)
|
||||
{
|
||||
if (xPortInIsrContext()) {
|
||||
portEXIT_CRITICAL_ISR(mux);
|
||||
} else {
|
||||
portEXIT_CRITICAL(mux);
|
||||
}
|
||||
}
|
||||
|
||||
#define portENTER_CRITICAL_SAFE(mux) vPortEnterCriticalSafe(mux)
|
||||
#define portEXIT_CRITICAL_SAFE(mux) vPortExitCriticalSafe(mux)
|
||||
/*
|
||||
* Wrapper for the Xtensa compare-and-set instruction. This subroutine will atomically compare
|
||||
* *addr to 'compare'. If *addr == compare, *addr is set to *set. *set is updated with the previous
|
||||
* value of *addr (either 'compare' or some other value.)
|
||||
*
|
||||
* Warning: From the ISA docs: in some (unspecified) cases, the s32c1i instruction may return the
|
||||
* *bitwise inverse* of the old mem if the mem wasn't written. This doesn't seem to happen on the
|
||||
* ESP32 (portMUX assertions would fail).
|
||||
*/
|
||||
static inline void __attribute__((always_inline)) uxPortCompareSet(volatile uint32_t *addr, uint32_t compare, uint32_t *set) {
|
||||
compare_and_set_native(addr, compare, set);
|
||||
}
|
||||
|
||||
// These FreeRTOS versions are similar to the nested versions above
|
||||
#define portSET_INTERRUPT_MASK_FROM_ISR() portENTER_CRITICAL_NESTED()
|
||||
#define portCLEAR_INTERRUPT_MASK_FROM_ISR(state) portEXIT_CRITICAL_NESTED(state)
|
||||
|
||||
//Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force
|
||||
//the stack memory to always be internal.
|
||||
#define portTcbMemoryCaps (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
|
||||
#define portStackMemoryCaps (MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT)
|
||||
|
||||
#define pvPortMallocTcbMem(size) heap_caps_malloc(size, portTcbMemoryCaps)
|
||||
#define pvPortMallocStackMem(size) heap_caps_malloc(size, portStackMemoryCaps)
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specifics. */
|
||||
#define portSTACK_GROWTH ( -1 )
|
||||
#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
|
||||
#define portBYTE_ALIGNMENT 4
|
||||
#define portNOP() XT_NOP()
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Fine resolution time */
|
||||
#define portGET_RUN_TIME_COUNTER_VALUE() xthal_get_ccount()
|
||||
//ccount or esp_timer are initialized elsewhere
|
||||
#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
|
||||
|
||||
#ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
|
||||
/* Coarse resolution time (us) */
|
||||
#define portALT_GET_RUN_TIME_COUNTER_VALUE(x) x = (uint32_t)esp_timer_get_time()
|
||||
#endif
|
||||
|
||||
|
||||
/* Kernel utilities. */
|
||||
void vPortYield( void );
|
||||
void _frxt_setup_switch( void );
|
||||
#define portYIELD() vPortYield()
|
||||
#define portYIELD_FROM_ISR() {traceISR_EXIT_TO_SCHEDULER(); _frxt_setup_switch();}
|
||||
|
||||
|
||||
/* Yielding within an API call (when interrupts are off), means the yield should be delayed
|
||||
until interrupts are re-enabled.
|
||||
|
||||
To do this, we use the "cross-core" interrupt as a trigger to yield on this core when interrupts are re-enabled.This
|
||||
is the same interrupt & code path which is used to trigger a yield between CPUs, although in this case the yield is
|
||||
happening on the same CPU.
|
||||
*/
|
||||
#define portYIELD_WITHIN_API() esp_crosscore_int_send_yield(xPortGetCoreID())
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters )
|
||||
|
||||
// When coprocessors are defined, we to maintain a pointer to coprocessors area.
|
||||
// We currently use a hack: redefine field xMPU_SETTINGS in TCB block as a structure that can hold:
|
||||
// MPU wrappers, coprocessor area pointer, trace code structure, and more if needed.
|
||||
// The field is normally used for memory protection. FreeRTOS should create another general purpose field.
|
||||
typedef struct {
|
||||
#if XCHAL_CP_NUM > 0
|
||||
volatile StackType_t* coproc_area; // Pointer to coprocessor save area; MUST BE FIRST
|
||||
#endif
|
||||
|
||||
#if portUSING_MPU_WRAPPERS
|
||||
// Define here mpu_settings, which is port dependent
|
||||
int mpu_setting; // Just a dummy example here; MPU not ported to Xtensa yet
|
||||
#endif
|
||||
|
||||
#if configUSE_TRACE_FACILITY_2
|
||||
struct {
|
||||
// Cf. porttraceStamp()
|
||||
int taskstamp; /* Stamp from inside task to see where we are */
|
||||
int taskstampcount; /* A counter usually incremented when we restart the task's loop */
|
||||
} porttrace;
|
||||
#endif
|
||||
} xMPU_SETTINGS;
|
||||
|
||||
// Main hack to use MPU_wrappers even when no MPU is defined (warning: mpu_setting should not be accessed; otherwise move this above xMPU_SETTINGS)
|
||||
#if (XCHAL_CP_NUM > 0 || configUSE_TRACE_FACILITY_2) && !portUSING_MPU_WRAPPERS // If MPU wrappers not used, we still need to allocate coproc area
|
||||
#undef portUSING_MPU_WRAPPERS
|
||||
#define portUSING_MPU_WRAPPERS 1 // Enable it to allocate coproc area
|
||||
#define MPU_WRAPPERS_H // Override mpu_wrapper.h to disable unwanted code
|
||||
#define PRIVILEGED_FUNCTION
|
||||
#define PRIVILEGED_DATA
|
||||
#endif
|
||||
|
||||
extern void esp_vApplicationIdleHook( void );
|
||||
extern void esp_vApplicationTickHook( void );
|
||||
|
||||
#ifndef CONFIG_FREERTOS_LEGACY_HOOKS
|
||||
#define vApplicationIdleHook esp_vApplicationIdleHook
|
||||
#define vApplicationTickHook esp_vApplicationTickHook
|
||||
#endif /* !CONFIG_FREERTOS_LEGACY_HOOKS */
|
||||
|
||||
void _xt_coproc_release(volatile void * coproc_sa_base);
|
||||
void vApplicationSleep( TickType_t xExpectedIdleTime );
|
||||
void vPortSetStackWatchpoint( void* pxStackStart );
|
||||
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( idleTime ) vApplicationSleep( idleTime )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Architecture specific optimisations. */
|
||||
#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
|
||||
|
||||
/* Check the configuration. */
|
||||
#if( configMAX_PRIORITIES > 32 )
|
||||
#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 different priorities as tasks that share a priority will time slice.
|
||||
#endif
|
||||
|
||||
/* Store/clear the ready priorities in a bit map. */
|
||||
#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
|
||||
#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( ( uxReadyPriorities ) ) )
|
||||
|
||||
#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
// porttrace
|
||||
#if configUSE_TRACE_FACILITY_2
|
||||
#include "porttrace.h"
|
||||
#endif
|
||||
|
||||
// configASSERT_2 if requested
|
||||
#if configASSERT_2
|
||||
#include <stdio.h>
|
||||
void exit(int);
|
||||
#define configASSERT( x ) if (!(x)) { porttracePrint(-1); printf("\nAssertion failed in %s:%d\n", __FILE__, __LINE__); exit(-1); }
|
||||
#endif
|
||||
|
||||
#endif // __ASSEMBLER__
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
|
@ -0,0 +1,130 @@
|
||||
/*******************************************************************************
|
||||
Copyright (c) 2006-2015 Cadence Design Systems Inc.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining
|
||||
a copy of this software and associated documentation files (the
|
||||
"Software"), to deal in the Software without restriction, including
|
||||
without limitation the rights to use, copy, modify, merge, publish,
|
||||
distribute, sublicense, and/or sell copies of the Software, and to
|
||||
permit persons to whom the Software is furnished to do so, subject to
|
||||
the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included
|
||||
in all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
Xtensa-specific API for RTOS ports.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __XTENSA_API_H__
|
||||
#define __XTENSA_API_H__
|
||||
|
||||
#include <xtensa/hal.h>
|
||||
|
||||
#include "xtensa_context.h"
|
||||
|
||||
|
||||
/* Typedef for C-callable interrupt handler function */
|
||||
typedef void (*xt_handler)(void *);
|
||||
|
||||
/* Typedef for C-callable exception handler function */
|
||||
typedef void (*xt_exc_handler)(XtExcFrame *);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to set a handler for the specified exception. The handler
|
||||
will be installed on the core that calls this function.
|
||||
|
||||
n - Exception number (type)
|
||||
f - Handler function address, NULL to uninstall handler.
|
||||
|
||||
The handler will be passed a pointer to the exception frame, which is created
|
||||
on the stack of the thread that caused the exception.
|
||||
|
||||
If the handler returns, the thread context will be restored and the faulting
|
||||
instruction will be retried. Any values in the exception frame that are
|
||||
modified by the handler will be restored as part of the context. For details
|
||||
of the exception frame structure see xtensa_context.h.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern xt_exc_handler xt_set_exception_handler(int n, xt_exc_handler f);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to set a handler for the specified interrupt. The handler
|
||||
will be installed on the core that calls this function.
|
||||
|
||||
n - Interrupt number.
|
||||
f - Handler function address, NULL to uninstall handler.
|
||||
arg - Argument to be passed to handler.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern xt_handler xt_set_interrupt_handler(int n, xt_handler f, void * arg);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to enable the specified interrupts on the core that runs
|
||||
this code.
|
||||
|
||||
mask - Bit mask of interrupts to be enabled.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern void xt_ints_on(unsigned int mask);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to disable the specified interrupts on the core that runs
|
||||
this code.
|
||||
|
||||
mask - Bit mask of interrupts to be disabled.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern void xt_ints_off(unsigned int mask);
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to set the specified (s/w) interrupt.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
static inline void xt_set_intset(unsigned int arg)
|
||||
{
|
||||
xthal_set_intset(arg);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to clear the specified (s/w or edge-triggered)
|
||||
interrupt.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
static inline void xt_set_intclear(unsigned int arg)
|
||||
{
|
||||
xthal_set_intclear(arg);
|
||||
}
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Call this function to get handler's argument for the specified interrupt.
|
||||
|
||||
n - Interrupt number.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
extern void * xt_get_interrupt_handler_arg(int n);
|
||||
|
||||
#endif /* __XTENSA_API_H__ */
|
||||
|
@ -0,0 +1,146 @@
|
||||
/*******************************************************************************
|
||||
// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining
|
||||
// a copy of this software and associated documentation files (the
|
||||
// "Software"), to deal in the Software without restriction, including
|
||||
// without limitation the rights to use, copy, modify, merge, publish,
|
||||
// distribute, sublicense, and/or sell copies of the Software, and to
|
||||
// permit persons to whom the Software is furnished to do so, subject to
|
||||
// the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included
|
||||
// in all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
Configuration-specific information for Xtensa build. This file must be
|
||||
included in FreeRTOSConfig.h to properly set up the config-dependent
|
||||
parameters correctly.
|
||||
|
||||
NOTE: To enable thread-safe C library support, XT_USE_THREAD_SAFE_CLIB must
|
||||
be defined to be > 0 somewhere above or on the command line.
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XTENSA_CONFIG_H
|
||||
#define XTENSA_CONFIG_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <xtensa/hal.h>
|
||||
#include <xtensa/config/core.h>
|
||||
#include <xtensa/config/system.h> /* required for XSHAL_CLIB */
|
||||
|
||||
#include "xtensa_context.h"
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------------
|
||||
* STACK REQUIREMENTS
|
||||
*
|
||||
* This section defines the minimum stack size, and the extra space required to
|
||||
* be allocated for saving coprocessor state and/or C library state information
|
||||
* (if thread safety is enabled for the C library). The sizes are in bytes.
|
||||
*
|
||||
* Stack sizes for individual tasks should be derived from these minima based on
|
||||
* the maximum call depth of the task and the maximum level of interrupt nesting.
|
||||
* A minimum stack size is defined by XT_STACK_MIN_SIZE. This minimum is based
|
||||
* on the requirement for a task that calls nothing else but can be interrupted.
|
||||
* This assumes that interrupt handlers do not call more than a few levels deep.
|
||||
* If this is not true, i.e. one or more interrupt handlers make deep calls then
|
||||
* the minimum must be increased.
|
||||
*
|
||||
* If the Xtensa processor configuration includes coprocessors, then space is
|
||||
* allocated to save the coprocessor state on the stack.
|
||||
*
|
||||
* If thread safety is enabled for the C runtime library, (XT_USE_THREAD_SAFE_CLIB
|
||||
* is defined) then space is allocated to save the C library context in the TCB.
|
||||
*
|
||||
* Allocating insufficient stack space is a common source of hard-to-find errors.
|
||||
* During development, it is best to enable the FreeRTOS stack checking features.
|
||||
*
|
||||
* Usage:
|
||||
*
|
||||
* XT_USE_THREAD_SAFE_CLIB -- Define this to a nonzero value to enable thread-safe
|
||||
* use of the C library. This will require extra stack
|
||||
* space to be allocated for tasks that use the C library
|
||||
* reentrant functions. See below for more information.
|
||||
*
|
||||
* NOTE: The Xtensa toolchain supports multiple C libraries and not all of them
|
||||
* support thread safety. Check your core configuration to see which C library
|
||||
* was chosen for your system.
|
||||
*
|
||||
* XT_STACK_MIN_SIZE -- The minimum stack size for any task. It is recommended
|
||||
* that you do not use a stack smaller than this for any
|
||||
* task. In case you want to use stacks smaller than this
|
||||
* size, you must verify that the smaller size(s) will work
|
||||
* under all operating conditions.
|
||||
*
|
||||
* XT_STACK_EXTRA -- The amount of extra stack space to allocate for a task
|
||||
* that does not make C library reentrant calls. Add this
|
||||
* to the amount of stack space required by the task itself.
|
||||
*
|
||||
* XT_STACK_EXTRA_CLIB -- The amount of space to allocate for C library state.
|
||||
*
|
||||
-----------------------------------------------------------------------------*/
|
||||
|
||||
/* Extra space required for interrupt/exception hooks. */
|
||||
#ifdef XT_INTEXC_HOOKS
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
#define STK_INTEXC_EXTRA 0x200
|
||||
#else
|
||||
#define STK_INTEXC_EXTRA 0x180
|
||||
#endif
|
||||
#else
|
||||
#define STK_INTEXC_EXTRA 0
|
||||
#endif
|
||||
|
||||
#define XT_CLIB_CONTEXT_AREA_SIZE 0
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
Extra size -- interrupt frame plus coprocessor save area plus hook space.
|
||||
NOTE: Make sure XT_INTEXC_HOOKS is undefined unless you really need the hooks.
|
||||
------------------------------------------------------------------------------*/
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
#define XT_XTRA_SIZE (XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x10 + XT_CP_SIZE)
|
||||
#else
|
||||
#define XT_XTRA_SIZE (XT_STK_FRMSZ + STK_INTEXC_EXTRA + 0x20 + XT_CP_SIZE)
|
||||
#endif
|
||||
|
||||
/*------------------------------------------------------------------------------
|
||||
Space allocated for user code -- function calls and local variables.
|
||||
NOTE: This number can be adjusted to suit your needs. You must verify that the
|
||||
amount of space you reserve is adequate for the worst-case conditions in your
|
||||
application.
|
||||
NOTE: The windowed ABI requires more stack, since space has to be reserved
|
||||
for spilling register windows.
|
||||
------------------------------------------------------------------------------*/
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
#define XT_USER_SIZE 0x200
|
||||
#else
|
||||
#define XT_USER_SIZE 0x400
|
||||
#endif
|
||||
|
||||
/* Minimum recommended stack size. */
|
||||
#define XT_STACK_MIN_SIZE ((XT_XTRA_SIZE + XT_USER_SIZE) / sizeof(unsigned char))
|
||||
|
||||
/* OS overhead with and without C library thread context. */
|
||||
#define XT_STACK_EXTRA (XT_XTRA_SIZE)
|
||||
#define XT_STACK_EXTRA_CLIB (XT_XTRA_SIZE + XT_CLIB_CONTEXT_AREA_SIZE)
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* XTENSA_CONFIG_H */
|
||||
|
@ -0,0 +1,387 @@
|
||||
/*******************************************************************************
|
||||
Copyright (c) 2006-2015 Cadence Design Systems Inc.
|
||||
|
||||
Permission is hereby granted, free of charge, to any person obtaining
|
||||
a copy of this software and associated documentation files (the
|
||||
"Software"), to deal in the Software without restriction, including
|
||||
without limitation the rights to use, copy, modify, merge, publish,
|
||||
distribute, sublicense, and/or sell copies of the Software, and to
|
||||
permit persons to whom the Software is furnished to do so, subject to
|
||||
the following conditions:
|
||||
|
||||
The above copyright notice and this permission notice shall be included
|
||||
in all copies or substantial portions of the Software.
|
||||
|
||||
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
XTENSA CONTEXT FRAMES AND MACROS FOR RTOS ASSEMBLER SOURCES
|
||||
|
||||
This header contains definitions and macros for use primarily by Xtensa
|
||||
RTOS assembly coded source files. It includes and uses the Xtensa hardware
|
||||
abstraction layer (HAL) to deal with config specifics. It may also be
|
||||
included in C source files.
|
||||
|
||||
!! Supports only Xtensa Exception Architecture 2 (XEA2). XEA1 not supported. !!
|
||||
|
||||
NOTE: The Xtensa architecture requires stack pointer alignment to 16 bytes.
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XTENSA_CONTEXT_H
|
||||
#define XTENSA_CONTEXT_H
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#include <xtensa/coreasm.h>
|
||||
#endif
|
||||
|
||||
#include <xtensa/config/tie.h>
|
||||
#include <xtensa/corebits.h>
|
||||
#include <xtensa/config/system.h>
|
||||
#include <xtensa/xtruntime-frames.h>
|
||||
|
||||
|
||||
/* Align a value up to nearest n-byte boundary, where n is a power of 2. */
|
||||
#define ALIGNUP(n, val) (((val) + (n)-1) & -(n))
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
Macros that help define structures for both C and assembler.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifdef STRUCT_BEGIN
|
||||
#undef STRUCT_BEGIN
|
||||
#undef STRUCT_FIELD
|
||||
#undef STRUCT_AFIELD
|
||||
#undef STRUCT_END
|
||||
#endif
|
||||
|
||||
#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
|
||||
|
||||
#define STRUCT_BEGIN .pushsection .text; .struct 0
|
||||
#define STRUCT_FIELD(ctype,size,asname,name) asname: .space size
|
||||
#define STRUCT_AFIELD(ctype,size,asname,name,n) asname: .space (size)*(n)
|
||||
#define STRUCT_END(sname) sname##Size:; .popsection
|
||||
|
||||
#else
|
||||
|
||||
#define STRUCT_BEGIN typedef struct {
|
||||
#define STRUCT_FIELD(ctype,size,asname,name) ctype name;
|
||||
#define STRUCT_AFIELD(ctype,size,asname,name,n) ctype name[n];
|
||||
#define STRUCT_END(sname) } sname;
|
||||
|
||||
#endif //_ASMLANGUAGE || __ASSEMBLER__
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
INTERRUPT/EXCEPTION STACK FRAME FOR A THREAD OR NESTED INTERRUPT
|
||||
|
||||
A stack frame of this structure is allocated for any interrupt or exception.
|
||||
It goes on the current stack. If the RTOS has a system stack for handling
|
||||
interrupts, every thread stack must allow space for just one interrupt stack
|
||||
frame, then nested interrupt stack frames go on the system stack.
|
||||
|
||||
The frame includes basic registers (explicit) and "extra" registers introduced
|
||||
by user TIE or the use of the MAC16 option in the user's Xtensa config.
|
||||
The frame size is minimized by omitting regs not applicable to user's config.
|
||||
|
||||
For Windowed ABI, this stack frame includes the interruptee's base save area,
|
||||
another base save area to manage gcc nested functions, and a little temporary
|
||||
space to help manage the spilling of the register windows.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
STRUCT_BEGIN
|
||||
STRUCT_FIELD (long, 4, XT_STK_EXIT, exit) /* exit point for dispatch */
|
||||
STRUCT_FIELD (long, 4, XT_STK_PC, pc) /* return PC */
|
||||
STRUCT_FIELD (long, 4, XT_STK_PS, ps) /* return PS */
|
||||
STRUCT_FIELD (long, 4, XT_STK_A0, a0)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A1, a1) /* stack pointer before interrupt */
|
||||
STRUCT_FIELD (long, 4, XT_STK_A2, a2)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A3, a3)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A4, a4)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A5, a5)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A6, a6)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A7, a7)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A8, a8)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A9, a9)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A10, a10)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A11, a11)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A12, a12)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A13, a13)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A14, a14)
|
||||
STRUCT_FIELD (long, 4, XT_STK_A15, a15)
|
||||
STRUCT_FIELD (long, 4, XT_STK_SAR, sar)
|
||||
STRUCT_FIELD (long, 4, XT_STK_EXCCAUSE, exccause)
|
||||
STRUCT_FIELD (long, 4, XT_STK_EXCVADDR, excvaddr)
|
||||
#if XCHAL_HAVE_LOOPS
|
||||
STRUCT_FIELD (long, 4, XT_STK_LBEG, lbeg)
|
||||
STRUCT_FIELD (long, 4, XT_STK_LEND, lend)
|
||||
STRUCT_FIELD (long, 4, XT_STK_LCOUNT, lcount)
|
||||
#endif
|
||||
#ifndef __XTENSA_CALL0_ABI__
|
||||
/* Temporary space for saving stuff during window spill */
|
||||
STRUCT_FIELD (long, 4, XT_STK_TMP0, tmp0)
|
||||
STRUCT_FIELD (long, 4, XT_STK_TMP1, tmp1)
|
||||
STRUCT_FIELD (long, 4, XT_STK_TMP2, tmp2)
|
||||
#endif
|
||||
#ifdef XT_USE_SWPRI
|
||||
/* Storage for virtual priority mask */
|
||||
STRUCT_FIELD (long, 4, XT_STK_VPRI, vpri)
|
||||
#endif
|
||||
#ifdef XT_USE_OVLY
|
||||
/* Storage for overlay state */
|
||||
STRUCT_FIELD (long, 4, XT_STK_OVLY, ovly)
|
||||
#endif
|
||||
STRUCT_END(XtExcFrame)
|
||||
|
||||
#if defined(_ASMLANGUAGE) || defined(__ASSEMBLER__)
|
||||
#define XT_STK_NEXT1 XtExcFrameSize
|
||||
#else
|
||||
#define XT_STK_NEXT1 sizeof(XtExcFrame)
|
||||
#endif
|
||||
|
||||
/* Allocate extra storage if needed */
|
||||
#if XCHAL_EXTRA_SA_SIZE != 0
|
||||
|
||||
#if XCHAL_EXTRA_SA_ALIGN <= 16
|
||||
#define XT_STK_EXTRA ALIGNUP(XCHAL_EXTRA_SA_ALIGN, XT_STK_NEXT1)
|
||||
#else
|
||||
/* If need more alignment than stack, add space for dynamic alignment */
|
||||
#define XT_STK_EXTRA (ALIGNUP(XCHAL_EXTRA_SA_ALIGN, XT_STK_NEXT1) + XCHAL_EXTRA_SA_ALIGN)
|
||||
#endif
|
||||
#define XT_STK_NEXT2 (XT_STK_EXTRA + XCHAL_EXTRA_SA_SIZE)
|
||||
|
||||
#else
|
||||
|
||||
#define XT_STK_NEXT2 XT_STK_NEXT1
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
This is the frame size. Add space for 4 registers (interruptee's base save
|
||||
area) and some space for gcc nested functions if any.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
#define XT_STK_FRMSZ (ALIGNUP(0x10, XT_STK_NEXT2) + 0x20)
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
SOLICITED STACK FRAME FOR A THREAD
|
||||
|
||||
A stack frame of this structure is allocated whenever a thread enters the
|
||||
RTOS kernel intentionally (and synchronously) to submit to thread scheduling.
|
||||
It goes on the current thread's stack.
|
||||
|
||||
The solicited frame only includes registers that are required to be preserved
|
||||
by the callee according to the compiler's ABI conventions, some space to save
|
||||
the return address for returning to the caller, and the caller's PS register.
|
||||
|
||||
For Windowed ABI, this stack frame includes the caller's base save area.
|
||||
|
||||
Note on XT_SOL_EXIT field:
|
||||
It is necessary to distinguish a solicited from an interrupt stack frame.
|
||||
This field corresponds to XT_STK_EXIT in the interrupt stack frame and is
|
||||
always at the same offset (0). It can be written with a code (usually 0)
|
||||
to distinguish a solicted frame from an interrupt frame. An RTOS port may
|
||||
opt to ignore this field if it has another way of distinguishing frames.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
STRUCT_BEGIN
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
STRUCT_FIELD (long, 4, XT_SOL_EXIT, exit)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_PC, pc)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_PS, ps)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_NEXT, next)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A12, a12) /* should be on 16-byte alignment */
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A13, a13)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A14, a14)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A15, a15)
|
||||
#else
|
||||
STRUCT_FIELD (long, 4, XT_SOL_EXIT, exit)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_PC, pc)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_PS, ps)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_NEXT, next)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A0, a0) /* should be on 16-byte alignment */
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A1, a1)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A2, a2)
|
||||
STRUCT_FIELD (long, 4, XT_SOL_A3, a3)
|
||||
#endif
|
||||
STRUCT_END(XtSolFrame)
|
||||
|
||||
/* Size of solicited stack frame */
|
||||
#define XT_SOL_FRMSZ ALIGNUP(0x10, XtSolFrameSize)
|
||||
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
CO-PROCESSOR STATE SAVE AREA FOR A THREAD
|
||||
|
||||
The RTOS must provide an area per thread to save the state of co-processors
|
||||
when that thread does not have control. Co-processors are context-switched
|
||||
lazily (on demand) only when a new thread uses a co-processor instruction,
|
||||
otherwise a thread retains ownership of the co-processor even when it loses
|
||||
control of the processor. An Xtensa co-processor exception is triggered when
|
||||
any co-processor instruction is executed by a thread that is not the owner,
|
||||
and the context switch of that co-processor is then peformed by the handler.
|
||||
Ownership represents which thread's state is currently in the co-processor.
|
||||
|
||||
Co-processors may not be used by interrupt or exception handlers. If an
|
||||
co-processor instruction is executed by an interrupt or exception handler,
|
||||
the co-processor exception handler will trigger a kernel panic and freeze.
|
||||
This restriction is introduced to reduce the overhead of saving and restoring
|
||||
co-processor state (which can be quite large) and in particular remove that
|
||||
overhead from interrupt handlers.
|
||||
|
||||
The co-processor state save area may be in any convenient per-thread location
|
||||
such as in the thread control block or above the thread stack area. It need
|
||||
not be in the interrupt stack frame since interrupts don't use co-processors.
|
||||
|
||||
Along with the save area for each co-processor, two bitmasks with flags per
|
||||
co-processor (laid out as in the CPENABLE reg) help manage context-switching
|
||||
co-processors as efficiently as possible:
|
||||
|
||||
XT_CPENABLE
|
||||
The contents of a non-running thread's CPENABLE register.
|
||||
It represents the co-processors owned (and whose state is still needed)
|
||||
by the thread. When a thread is preempted, its CPENABLE is saved here.
|
||||
When a thread solicits a context-swtich, its CPENABLE is cleared - the
|
||||
compiler has saved the (caller-saved) co-proc state if it needs to.
|
||||
When a non-running thread loses ownership of a CP, its bit is cleared.
|
||||
When a thread runs, it's XT_CPENABLE is loaded into the CPENABLE reg.
|
||||
Avoids co-processor exceptions when no change of ownership is needed.
|
||||
|
||||
XT_CPSTORED
|
||||
A bitmask with the same layout as CPENABLE, a bit per co-processor.
|
||||
Indicates whether the state of each co-processor is saved in the state
|
||||
save area. When a thread enters the kernel, only the state of co-procs
|
||||
still enabled in CPENABLE is saved. When the co-processor exception
|
||||
handler assigns ownership of a co-processor to a thread, it restores
|
||||
the saved state only if this bit is set, and clears this bit.
|
||||
|
||||
XT_CP_CS_ST
|
||||
A bitmask with the same layout as CPENABLE, a bit per co-processor.
|
||||
Indicates whether callee-saved state is saved in the state save area.
|
||||
Callee-saved state is saved by itself on a solicited context switch,
|
||||
and restored when needed by the coprocessor exception handler.
|
||||
Unsolicited switches will cause the entire coprocessor to be saved
|
||||
when necessary.
|
||||
|
||||
XT_CP_ASA
|
||||
Pointer to the aligned save area. Allows it to be aligned more than
|
||||
the overall save area (which might only be stack-aligned or TCB-aligned).
|
||||
Especially relevant for Xtensa cores configured with a very large data
|
||||
path that requires alignment greater than 16 bytes (ABI stack alignment).
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#if XCHAL_CP_NUM > 0
|
||||
|
||||
/* Offsets of each coprocessor save area within the 'aligned save area': */
|
||||
#define XT_CP0_SA 0
|
||||
#define XT_CP1_SA ALIGNUP(XCHAL_CP1_SA_ALIGN, XT_CP0_SA + XCHAL_CP0_SA_SIZE)
|
||||
#define XT_CP2_SA ALIGNUP(XCHAL_CP2_SA_ALIGN, XT_CP1_SA + XCHAL_CP1_SA_SIZE)
|
||||
#define XT_CP3_SA ALIGNUP(XCHAL_CP3_SA_ALIGN, XT_CP2_SA + XCHAL_CP2_SA_SIZE)
|
||||
#define XT_CP4_SA ALIGNUP(XCHAL_CP4_SA_ALIGN, XT_CP3_SA + XCHAL_CP3_SA_SIZE)
|
||||
#define XT_CP5_SA ALIGNUP(XCHAL_CP5_SA_ALIGN, XT_CP4_SA + XCHAL_CP4_SA_SIZE)
|
||||
#define XT_CP6_SA ALIGNUP(XCHAL_CP6_SA_ALIGN, XT_CP5_SA + XCHAL_CP5_SA_SIZE)
|
||||
#define XT_CP7_SA ALIGNUP(XCHAL_CP7_SA_ALIGN, XT_CP6_SA + XCHAL_CP6_SA_SIZE)
|
||||
#define XT_CP_SA_SIZE ALIGNUP(16, XT_CP7_SA + XCHAL_CP7_SA_SIZE)
|
||||
|
||||
/* Offsets within the overall save area: */
|
||||
#define XT_CPENABLE 0 /* (2 bytes) coprocessors active for this thread */
|
||||
#define XT_CPSTORED 2 /* (2 bytes) coprocessors saved for this thread */
|
||||
#define XT_CP_CS_ST 4 /* (2 bytes) coprocessor callee-saved regs stored for this thread */
|
||||
#define XT_CP_ASA 8 /* (4 bytes) ptr to aligned save area */
|
||||
/* Overall size allows for dynamic alignment: */
|
||||
#define XT_CP_SIZE (12 + XT_CP_SA_SIZE + XCHAL_TOTAL_SA_ALIGN)
|
||||
#else
|
||||
#define XT_CP_SIZE 0
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
Macro to get the current core ID. Only uses the reg given as an argument.
|
||||
Reading PRID on the ESP32 gives us 0xCDCD on the PRO processor (0)
|
||||
and 0xABAB on the APP CPU (1). We can distinguish between the two by checking
|
||||
bit 13: it's 1 on the APP and 0 on the PRO processor.
|
||||
*/
|
||||
#ifdef __ASSEMBLER__
|
||||
.macro getcoreid reg
|
||||
rsr.prid \reg
|
||||
extui \reg,\reg,13,1
|
||||
.endm
|
||||
#endif
|
||||
|
||||
/* Note: These are different to xCoreID used in ESP-IDF FreeRTOS, most places use
|
||||
0 and 1 which are determined by checking bit 13 (see previous comment)
|
||||
*/
|
||||
#define CORE_ID_REGVAL_PRO 0xCDCD
|
||||
#define CORE_ID_REGVAL_APP 0xABAB
|
||||
|
||||
/* Included for compatibility, recommend using CORE_ID_REGVAL_PRO instead */
|
||||
#define CORE_ID_PRO CORE_ID_REGVAL_PRO
|
||||
|
||||
/* Included for compatibility, recommend using CORE_ID_REGVAL_APP instead */
|
||||
#define CORE_ID_APP CORE_ID_REGVAL_APP
|
||||
|
||||
/*
|
||||
-------------------------------------------------------------------------------
|
||||
MACROS TO HANDLE ABI SPECIFICS OF FUNCTION ENTRY AND RETURN
|
||||
|
||||
Convenient where the frame size requirements are the same for both ABIs.
|
||||
ENTRY(sz), RET(sz) are for framed functions (have locals or make calls).
|
||||
ENTRY0, RET0 are for frameless functions (no locals, no calls).
|
||||
|
||||
where size = size of stack frame in bytes (must be >0 and aligned to 16).
|
||||
For framed functions the frame is created and the return address saved at
|
||||
base of frame (Call0 ABI) or as determined by hardware (Windowed ABI).
|
||||
For frameless functions, there is no frame and return address remains in a0.
|
||||
Note: Because CPP macros expand to a single line, macros requiring multi-line
|
||||
expansions are implemented as assembler macros.
|
||||
-------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#ifdef __XTENSA_CALL0_ABI__
|
||||
/* Call0 */
|
||||
#define ENTRY(sz) entry1 sz
|
||||
.macro entry1 size=0x10
|
||||
addi sp, sp, -\size
|
||||
s32i a0, sp, 0
|
||||
.endm
|
||||
#define ENTRY0
|
||||
#define RET(sz) ret1 sz
|
||||
.macro ret1 size=0x10
|
||||
l32i a0, sp, 0
|
||||
addi sp, sp, \size
|
||||
ret
|
||||
.endm
|
||||
#define RET0 ret
|
||||
#else
|
||||
/* Windowed */
|
||||
#define ENTRY(sz) entry sp, sz
|
||||
#define ENTRY0 entry sp, 0x10
|
||||
#define RET(sz) retw
|
||||
#define RET0 retw
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* XTENSA_CONTEXT_H */
|
||||
|
@ -0,0 +1,232 @@
|
||||
/*******************************************************************************
|
||||
// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining
|
||||
// a copy of this software and associated documentation files (the
|
||||
// "Software"), to deal in the Software without restriction, including
|
||||
// without limitation the rights to use, copy, modify, merge, publish,
|
||||
// distribute, sublicense, and/or sell copies of the Software, and to
|
||||
// permit persons to whom the Software is furnished to do so, subject to
|
||||
// the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included
|
||||
// in all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
RTOS-SPECIFIC INFORMATION FOR XTENSA RTOS ASSEMBLER SOURCES
|
||||
(FreeRTOS Port)
|
||||
|
||||
This header is the primary glue between generic Xtensa RTOS support
|
||||
sources and a specific RTOS port for Xtensa. It contains definitions
|
||||
and macros for use primarily by Xtensa assembly coded source files.
|
||||
|
||||
Macros in this header map callouts from generic Xtensa files to specific
|
||||
RTOS functions. It may also be included in C source files.
|
||||
|
||||
Xtensa RTOS ports support all RTOS-compatible configurations of the Xtensa
|
||||
architecture, using the Xtensa hardware abstraction layer (HAL) to deal
|
||||
with configuration specifics.
|
||||
|
||||
Should be included by all Xtensa generic and RTOS port-specific sources.
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XTENSA_RTOS_H
|
||||
#define XTENSA_RTOS_H
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#include <xtensa/coreasm.h>
|
||||
#else
|
||||
#include <xtensa/config/core.h>
|
||||
#endif
|
||||
|
||||
#include <xtensa/corebits.h>
|
||||
#include <xtensa/config/system.h>
|
||||
|
||||
/*
|
||||
Include any RTOS specific definitions that are needed by this header.
|
||||
*/
|
||||
#include "freertos/FreeRTOSConfig.h"
|
||||
|
||||
/*
|
||||
Convert FreeRTOSConfig definitions to XTENSA definitions.
|
||||
However these can still be overridden from the command line.
|
||||
*/
|
||||
|
||||
#ifndef XT_SIMULATOR
|
||||
#if configXT_SIMULATOR
|
||||
#define XT_SIMULATOR 1 /* Simulator mode */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef XT_BOARD
|
||||
#if configXT_BOARD
|
||||
#define XT_BOARD 1 /* Board mode */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef XT_TIMER_INDEX
|
||||
#if defined configXT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX configXT_TIMER_INDEX /* Index of hardware timer to be used */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef XT_INTEXC_HOOKS
|
||||
#if configXT_INTEXC_HOOKS
|
||||
#define XT_INTEXC_HOOKS 1 /* Enables exception hooks */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if !defined(XT_SIMULATOR) && !defined(XT_BOARD)
|
||||
#error Either XT_SIMULATOR or XT_BOARD must be defined.
|
||||
#endif
|
||||
|
||||
|
||||
/*
|
||||
Name of RTOS (for messages).
|
||||
*/
|
||||
#define XT_RTOS_NAME FreeRTOS
|
||||
|
||||
/*
|
||||
Check some Xtensa configuration requirements and report error if not met.
|
||||
Error messages can be customize to the RTOS port.
|
||||
*/
|
||||
|
||||
#if !XCHAL_HAVE_XEA2
|
||||
#error "FreeRTOS/Xtensa requires XEA2 (exception architecture 2)."
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
|
||||
RTOS CALLOUT MACROS MAPPED TO RTOS PORT-SPECIFIC FUNCTIONS.
|
||||
|
||||
Define callout macros used in generic Xtensa code to interact with the RTOS.
|
||||
The macros are simply the function names for use in calls from assembler code.
|
||||
Some of these functions may call back to generic functions in xtensa_context.h .
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
/*
|
||||
Inform RTOS of entry into an interrupt handler that will affect it.
|
||||
Allows RTOS to manage switch to any system stack and count nesting level.
|
||||
Called after minimal context has been saved, with interrupts disabled.
|
||||
RTOS port can call0 _xt_context_save to save the rest of the context.
|
||||
May only be called from assembly code by the 'call0' instruction.
|
||||
*/
|
||||
// void XT_RTOS_INT_ENTER(void)
|
||||
#define XT_RTOS_INT_ENTER _frxt_int_enter
|
||||
|
||||
/*
|
||||
Inform RTOS of completion of an interrupt handler, and give control to
|
||||
RTOS to perform thread/task scheduling, switch back from any system stack
|
||||
and restore the context, and return to the exit dispatcher saved in the
|
||||
stack frame at XT_STK_EXIT. RTOS port can call0 _xt_context_restore
|
||||
to save the context saved in XT_RTOS_INT_ENTER via _xt_context_save,
|
||||
leaving only a minimal part of the context to be restored by the exit
|
||||
dispatcher. This function does not return to the place it was called from.
|
||||
May only be called from assembly code by the 'call0' instruction.
|
||||
*/
|
||||
// void XT_RTOS_INT_EXIT(void)
|
||||
#define XT_RTOS_INT_EXIT _frxt_int_exit
|
||||
|
||||
/*
|
||||
Inform RTOS of the occurrence of a tick timer interrupt.
|
||||
If RTOS has no tick timer, leave XT_RTOS_TIMER_INT undefined.
|
||||
May be coded in or called from C or assembly, per ABI conventions.
|
||||
RTOS may optionally define XT_TICK_PER_SEC in its own way (eg. macro).
|
||||
*/
|
||||
// void XT_RTOS_TIMER_INT(void)
|
||||
#define XT_RTOS_TIMER_INT _frxt_timer_int
|
||||
#define XT_TICK_PER_SEC configTICK_RATE_HZ
|
||||
|
||||
/*
|
||||
Return in a15 the base address of the co-processor state save area for the
|
||||
thread that triggered a co-processor exception, or 0 if no thread was running.
|
||||
The state save area is structured as defined in xtensa_context.h and has size
|
||||
XT_CP_SIZE. Co-processor instructions should only be used in thread code, never
|
||||
in interrupt handlers or the RTOS kernel. May only be called from assembly code
|
||||
and by the 'call0' instruction. A result of 0 indicates an unrecoverable error.
|
||||
The implementation may use only a2-4, a15 (all other regs must be preserved).
|
||||
*/
|
||||
// void* XT_RTOS_CP_STATE(void)
|
||||
#define XT_RTOS_CP_STATE _frxt_task_coproc_state
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
|
||||
HOOKS TO DYNAMICALLY INSTALL INTERRUPT AND EXCEPTION HANDLERS PER LEVEL.
|
||||
|
||||
This Xtensa RTOS port provides hooks for dynamically installing exception
|
||||
and interrupt handlers to facilitate automated testing where each test
|
||||
case can install its own handler for user exceptions and each interrupt
|
||||
priority (level). This consists of an array of function pointers indexed
|
||||
by interrupt priority, with index 0 being the user exception handler hook.
|
||||
Each entry in the array is initially 0, and may be replaced by a function
|
||||
pointer of type XT_INTEXC_HOOK. A handler may be uninstalled by installing 0.
|
||||
|
||||
The handler for low and medium priority obeys ABI conventions so may be coded
|
||||
in C. For the exception handler, the cause is the contents of the EXCCAUSE
|
||||
reg, and the result is -1 if handled, else the cause (still needs handling).
|
||||
For interrupt handlers, the cause is a mask of pending enabled interrupts at
|
||||
that level, and the result is the same mask with the bits for the handled
|
||||
interrupts cleared (those not cleared still need handling). This allows a test
|
||||
case to either pre-handle or override the default handling for the exception
|
||||
or interrupt level (see xtensa_vectors.S).
|
||||
|
||||
High priority handlers (including NMI) must be coded in assembly, are always
|
||||
called by 'call0' regardless of ABI, must preserve all registers except a0,
|
||||
and must not use or modify the interrupted stack. The hook argument 'cause'
|
||||
is not passed and the result is ignored, so as not to burden the caller with
|
||||
saving and restoring a2 (it assumes only one interrupt per level - see the
|
||||
discussion in high priority interrupts in xtensa_vectors.S). The handler
|
||||
therefore should be coded to prototype 'void h(void)' even though it plugs
|
||||
into an array of handlers of prototype 'unsigned h(unsigned)'.
|
||||
|
||||
To enable interrupt/exception hooks, compile the RTOS with '-DXT_INTEXC_HOOKS'.
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#define XT_INTEXC_HOOK_NUM (1 + XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI)
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
typedef unsigned (*XT_INTEXC_HOOK)(unsigned cause);
|
||||
extern volatile XT_INTEXC_HOOK _xt_intexc_hooks[XT_INTEXC_HOOK_NUM];
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
|
||||
CONVENIENCE INCLUSIONS.
|
||||
|
||||
Ensures RTOS specific files need only include this one Xtensa-generic header.
|
||||
These headers are included last so they can use the RTOS definitions above.
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#include "xtensa_context.h"
|
||||
|
||||
#ifdef XT_RTOS_TIMER_INT
|
||||
#include "xtensa_timer.h"
|
||||
#endif
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
|
||||
Xtensa Port Version.
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#define XTENSA_PORT_VERSION 1.4.2
|
||||
#define XTENSA_PORT_VERSION_STRING "1.4.2"
|
||||
|
||||
#endif /* XTENSA_RTOS_H */
|
||||
|
@ -0,0 +1,159 @@
|
||||
/*******************************************************************************
|
||||
// Copyright (c) 2003-2015 Cadence Design Systems, Inc.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining
|
||||
// a copy of this software and associated documentation files (the
|
||||
// "Software"), to deal in the Software without restriction, including
|
||||
// without limitation the rights to use, copy, modify, merge, publish,
|
||||
// distribute, sublicense, and/or sell copies of the Software, and to
|
||||
// permit persons to whom the Software is furnished to do so, subject to
|
||||
// the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included
|
||||
// in all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
||||
// EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
|
||||
// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
|
||||
// IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
|
||||
// CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
|
||||
// TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
|
||||
// SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
--------------------------------------------------------------------------------
|
||||
|
||||
XTENSA INFORMATION FOR RTOS TICK TIMER AND CLOCK FREQUENCY
|
||||
|
||||
This header contains definitions and macros for use primarily by Xtensa
|
||||
RTOS assembly coded source files. It includes and uses the Xtensa hardware
|
||||
abstraction layer (HAL) to deal with config specifics. It may also be
|
||||
included in C source files.
|
||||
|
||||
User may edit to modify timer selection and to specify clock frequency and
|
||||
tick duration to match timer interrupt to the real-time tick duration.
|
||||
|
||||
If the RTOS has no timer interrupt, then there is no tick timer and the
|
||||
clock frequency is irrelevant, so all of these macros are left undefined
|
||||
and the Xtensa core configuration need not have a timer.
|
||||
|
||||
*******************************************************************************/
|
||||
|
||||
#ifndef XTENSA_TIMER_H
|
||||
#define XTENSA_TIMER_H
|
||||
|
||||
#ifdef __ASSEMBLER__
|
||||
#include <xtensa/coreasm.h>
|
||||
#endif
|
||||
|
||||
#include <xtensa/corebits.h>
|
||||
#include <xtensa/config/system.h>
|
||||
|
||||
#include "xtensa_rtos.h" /* in case this wasn't included directly */
|
||||
|
||||
#include "freertos/FreeRTOSConfig.h"
|
||||
|
||||
/*
|
||||
Select timer to use for periodic tick, and determine its interrupt number
|
||||
and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
|
||||
in which case its validity is checked (it must exist in this core and must
|
||||
not be on a high priority interrupt - an error will be reported in invalid).
|
||||
Otherwise select the first low or medium priority interrupt timer available.
|
||||
*/
|
||||
#if XCHAL_NUM_TIMERS == 0
|
||||
|
||||
#error "This Xtensa configuration is unsupported, it has no timers."
|
||||
|
||||
#else
|
||||
|
||||
#ifndef XT_TIMER_INDEX
|
||||
#if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 3
|
||||
#endif
|
||||
#endif
|
||||
#if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 2
|
||||
#endif
|
||||
#endif
|
||||
#if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 1
|
||||
#endif
|
||||
#endif
|
||||
#if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
|
||||
#if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
|
||||
#undef XT_TIMER_INDEX
|
||||
#define XT_TIMER_INDEX 0
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
#ifndef XT_TIMER_INDEX
|
||||
#error "There is no suitable timer in this Xtensa configuration."
|
||||
#endif
|
||||
|
||||
#define XT_CCOMPARE (CCOMPARE + XT_TIMER_INDEX)
|
||||
#define XT_TIMER_INTNUM XCHAL_TIMER_INTERRUPT(XT_TIMER_INDEX)
|
||||
#define XT_TIMER_INTPRI XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
|
||||
#define XT_TIMER_INTEN (1 << XT_TIMER_INTNUM)
|
||||
|
||||
#if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
|
||||
#error "The timer selected by XT_TIMER_INDEX does not exist in this core."
|
||||
#elif XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
|
||||
#error "The timer interrupt cannot be high priority (use medium or low)."
|
||||
#endif
|
||||
|
||||
#endif /* XCHAL_NUM_TIMERS */
|
||||
|
||||
/*
|
||||
Set processor clock frequency, used to determine clock divisor for timer tick.
|
||||
User should BE SURE TO ADJUST THIS for the Xtensa platform being used.
|
||||
If using a supported board via the board-independent API defined in xtbsp.h,
|
||||
this may be left undefined and frequency and tick divisor will be computed
|
||||
and cached during run-time initialization.
|
||||
|
||||
NOTE ON SIMULATOR:
|
||||
Under the Xtensa instruction set simulator, the frequency can only be estimated
|
||||
because it depends on the speed of the host and the version of the simulator.
|
||||
Also because it runs much slower than hardware, it is not possible to achieve
|
||||
real-time performance for most applications under the simulator. A frequency
|
||||
too low does not allow enough time between timer interrupts, starving threads.
|
||||
To obtain a more convenient but non-real-time tick duration on the simulator,
|
||||
compile with xt-xcc option "-DXT_SIMULATOR".
|
||||
Adjust this frequency to taste (it's not real-time anyway!).
|
||||
*/
|
||||
#if defined(XT_SIMULATOR) && !defined(XT_CLOCK_FREQ)
|
||||
#define XT_CLOCK_FREQ configCPU_CLOCK_HZ
|
||||
#endif
|
||||
|
||||
#if !defined(XT_CLOCK_FREQ) && !defined(XT_BOARD)
|
||||
#error "XT_CLOCK_FREQ must be defined for the target platform."
|
||||
#endif
|
||||
|
||||
/*
|
||||
Default number of timer "ticks" per second (default 100 for 10ms tick).
|
||||
RTOS may define this in its own way (if applicable) in xtensa_rtos.h.
|
||||
User may redefine this to an optimal value for the application, either by
|
||||
editing this here or in xtensa_rtos.h, or compiling with xt-xcc option
|
||||
"-DXT_TICK_PER_SEC=<value>" where <value> is a suitable number.
|
||||
*/
|
||||
#ifndef XT_TICK_PER_SEC
|
||||
#define XT_TICK_PER_SEC configTICK_RATE_HZ /* 10 ms tick = 100 ticks per second */
|
||||
#endif
|
||||
|
||||
/*
|
||||
Derivation of clock divisor for timer tick and interrupt (one per tick).
|
||||
*/
|
||||
#ifdef XT_CLOCK_FREQ
|
||||
#define XT_TICK_DIVISOR (XT_CLOCK_FREQ / XT_TICK_PER_SEC)
|
||||
#endif
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
extern unsigned _xt_tick_divisor;
|
||||
extern void _xt_tick_divisor_init(void);
|
||||
#endif
|
||||
|
||||
#endif /* XTENSA_TIMER_H */
|
||||
|
Reference in New Issue
Block a user