diff --git a/cores/esp32/esp32-hal-dac.c b/cores/esp32/esp32-hal-dac.c
index 6bc342a9..91270152 100644
--- a/cores/esp32/esp32-hal-dac.c
+++ b/cores/esp32/esp32-hal-dac.c
@@ -12,56 +12,41 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
-#include "esp32-hal-dac.h"
-#include "freertos/FreeRTOS.h"
-#include "freertos/task.h"
+#include "esp32-hal.h"
 #include "esp_attr.h"
 #include "soc/rtc_io_reg.h"
 #include "soc/rtc_cntl_reg.h"
+#include "soc/rtc_io_periph.h"
 #include "soc/sens_reg.h"
+#include "soc/sens_struct.h"
+#include "driver/dac.h"
 
-#include "esp_system.h"
-#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
-#if CONFIG_IDF_TARGET_ESP32 // ESP32/PICO-D4
-#include "esp32/rom/ets_sys.h"
-#include "esp_intr_alloc.h"
+#if CONFIG_IDF_TARGET_ESP32
+#define DAC1 25
+#define DAC2 26
 #elif CONFIG_IDF_TARGET_ESP32S2
-#include "esp32s2/rom/ets_sys.h"
-#else 
+#define DAC1 17
+#define DAC2 18
+#else
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
-#else // ESP32 Before IDF 4.0
-#include "rom/ets_sys.h"
-#include "esp_intr.h"
-#endif
 
 void IRAM_ATTR __dacWrite(uint8_t pin, uint8_t value)
 {
-    if(pin < 25 || pin > 26){
+    if(pin < DAC1 || pin > DAC2){
         return;//not dac pin
     }
     pinMode(pin, ANALOG);
-    uint8_t channel = pin - 25;
-
-
-    //Disable Tone
-    CLEAR_PERI_REG_MASK(SENS_SAR_DAC_CTRL1_REG, SENS_SW_TONE_EN);
-
-    if (channel) {
-        //Disable Channel Tone
-        CLEAR_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN2_M);
-        //Set the Dac value
-        SET_PERI_REG_BITS(RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_DAC, value, RTC_IO_PDAC2_DAC_S);   //dac_output
-        //Channel output enable
-        SET_PERI_REG_MASK(RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_XPD_DAC | RTC_IO_PDAC2_DAC_XPD_FORCE);
-    } else {
-        //Disable Channel Tone
-        CLEAR_PERI_REG_MASK(SENS_SAR_DAC_CTRL2_REG, SENS_DAC_CW_EN1_M);
-        //Set the Dac value
-        SET_PERI_REG_BITS(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_DAC, value, RTC_IO_PDAC1_DAC_S);   //dac_output
-        //Channel output enable
-        SET_PERI_REG_MASK(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_XPD_DAC | RTC_IO_PDAC1_DAC_XPD_FORCE);
+    uint8_t channel = pin - DAC1;
+    SENS.sar_dac_ctrl1.dac_clkgate_en = 1;
+    RTCIO.pad_dac[channel].dac_xpd_force = 1;
+    RTCIO.pad_dac[channel].xpd_dac = 1;
+    if (channel == 0) {
+        SENS.sar_dac_ctrl2.dac_cw_en1 = 0;
+    } else if (channel == 1) {
+        SENS.sar_dac_ctrl2.dac_cw_en2 = 0;
     }
+    RTCIO.pad_dac[channel].dac = value;
 }
 
 extern void dacWrite(uint8_t pin, uint8_t value) __attribute__ ((weak, alias("__dacWrite")));
diff --git a/cores/esp32/esp32-hal-gpio.c b/cores/esp32/esp32-hal-gpio.c
index 39d044a5..a1dc6f61 100644
--- a/cores/esp32/esp32-hal-gpio.c
+++ b/cores/esp32/esp32-hal-gpio.c
@@ -29,12 +29,14 @@
 #include "esp32/rom/gpio.h"
 #include "esp_intr_alloc.h"
 #define NUM_OUPUT_PINS 34
+#define GPIO_FUNC 2
 #elif CONFIG_IDF_TARGET_ESP32S2
 #include "esp32s2/rom/ets_sys.h"
 #include "esp32s2/rom/gpio.h"
 #include "esp_intr_alloc.h"
 #include "soc/periph_defs.h"
 #define NUM_OUPUT_PINS 45
+#define GPIO_FUNC 1
 #else 
 #error Target CONFIG_IDF_TARGET is not supported
 #endif
@@ -155,30 +157,6 @@ static InterruptHandle_t __pinInterruptHandlers[GPIO_PIN_COUNT] = {0,};
 
 #include "driver/rtc_io.h"
 
-//
-//static void idf_pinMode(uint8_t pin, uint8_t mode)
-//{
-//	gpio_mode_t m = 0;
-//	if(mode & INPUT) {
-//		m |= GPIO_MODE_DEF_INPUT;
-//	}
-//	if(mode & OUTPUT) {
-//		m |= GPIO_MODE_DEF_OUTPUT;
-//	}
-//	if(mode & OPEN_DRAIN) {
-//		m |= GPIO_MODE_DEF_OD;
-//	}
-//    gpio_config_t conf = {
-//        .pin_bit_mask = 1LL << pin,
-//        .mode = (gpio_mode_t)m,
-//        .pull_up_en = (gpio_pullup_t)((mode & PULLUP) != 0),
-//        .pull_down_en = (gpio_pulldown_t)((mode & PULLDOWN) != 0),
-//        .intr_type = (gpio_int_type_t)GPIO_INTR_DISABLE
-//    };
-//    gpio_config(&conf);
-//}
-
-
 extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
 {
 
@@ -186,33 +164,31 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
         return;
     }
 
-    //return idf_pinMode(pin, mode);
-
     uint32_t rtc_reg = rtc_io_desc[pin].reg;
     if(mode == ANALOG) {
         if(!rtc_reg) {
             return;//not rtc pin
         }
-        //lock rtc
-        uint32_t reg_val = ESP_REG(rtc_reg);
-        if(reg_val & rtc_io_desc[pin].mux){
-            return;//already in adc mode
+        SENS.sar_io_mux_conf.iomux_clk_gate_en = 1;
+        SET_PERI_REG_MASK(rtc_io_desc[pin].reg, (rtc_io_desc[pin].mux));
+        SET_PERI_REG_BITS(rtc_io_desc[pin].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, SOC_PIN_FUNC_RTC_IO, rtc_io_desc[pin].func);
+
+        RTCIO.pin[pin].pad_driver = 0;//OD = 1
+        RTCIO.enable_w1tc.w1tc = (1U << pin);
+        CLEAR_PERI_REG_MASK(rtc_io_desc[pin].reg, rtc_io_desc[pin].ie);
+
+        if (rtc_io_desc[pin].pullup) {
+            CLEAR_PERI_REG_MASK(rtc_io_desc[pin].reg, rtc_io_desc[pin].pullup);
         }
-        reg_val &= ~(
-                (RTC_IO_TOUCH_PAD1_FUN_SEL_V << rtc_io_desc[pin].func)
-                |rtc_io_desc[pin].ie
-                |rtc_io_desc[pin].pullup
-                |rtc_io_desc[pin].pulldown);
-        ESP_REG(RTC_GPIO_ENABLE_W1TC_REG) = (1 << (rtc_io_desc[pin].rtc_num + RTC_GPIO_ENABLE_W1TC_S));
-        ESP_REG(rtc_reg) = reg_val | rtc_io_desc[pin].mux;
-        //unlock rtc
-        ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = ((uint32_t)2 << MCU_SEL_S) | ((uint32_t)2 << FUN_DRV_S) | FUN_IE;
+        if (rtc_io_desc[pin].pulldown) {
+            CLEAR_PERI_REG_MASK(rtc_io_desc[pin].reg, rtc_io_desc[pin].pulldown);
+        }
+        ESP_REG(DR_REG_IO_MUX_BASE + esp32_gpioMux[pin].reg) = ((uint32_t)GPIO_FUNC << MCU_SEL_S) | ((uint32_t)2 << FUN_DRV_S) | FUN_IE;
         return;
     }
 
     //RTC pins PULL settings
     if(rtc_reg) {
-        //lock rtc
         ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].mux);
         if(mode & PULLUP) {
             ESP_REG(rtc_reg) = (ESP_REG(rtc_reg) | rtc_io_desc[pin].pullup) & ~(rtc_io_desc[pin].pulldown);
@@ -221,12 +197,10 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
         } else {
             ESP_REG(rtc_reg) = ESP_REG(rtc_reg) & ~(rtc_io_desc[pin].pullup | rtc_io_desc[pin].pulldown);
         }
-        //unlock rtc
     }
 
     uint32_t pinFunction = 0, pinControl = 0;
 
-    //lock gpio
     if(mode & INPUT) {
         if(pin < 32) {
             GPIO.enable_w1tc = ((uint32_t)1 << pin);
@@ -235,8 +209,7 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
         }
     } else if(mode & OUTPUT) {
         if(pin >= NUM_OUPUT_PINS){
-            //unlock gpio
-            return;//pins above 33 can be only inputs
+            return;
         } else if(pin < 32) {
             GPIO.enable_w1ts = ((uint32_t)1 << pin);
         } else {
@@ -276,7 +249,6 @@ extern void IRAM_ATTR __pinMode(uint8_t pin, uint8_t mode)
     }
 
     GPIO.pin[pin].val = pinControl;
-    //unlock gpio
 }
 
 extern void IRAM_ATTR __digitalWrite(uint8_t pin, uint8_t val)
diff --git a/cores/esp32/esp32-hal-sigmadelta.c b/cores/esp32/esp32-hal-sigmadelta.c
index 47047a15..41b9bc55 100644
--- a/cores/esp32/esp32-hal-sigmadelta.c
+++ b/cores/esp32/esp32-hal-sigmadelta.c
@@ -81,6 +81,9 @@ uint32_t sigmaDeltaSetup(uint8_t channel, uint32_t freq) //chan 0-7 freq 1220-31
         prescale = 0xFF;
     }
     SD_MUTEX_LOCK();
+#ifndef CONFIG_IDF_TARGET_ESP32
+    SIGMADELTA.misc.function_clk_en = 1;
+#endif
     SIGMADELTA.channel[channel].prescale = prescale;
     SIGMADELTA.cg.clk_en = 0;
     SIGMADELTA.cg.clk_en = 1;
diff --git a/cores/esp32/esp32-hal-timer.c b/cores/esp32/esp32-hal-timer.c
index 1847a8a8..e2ec4284 100644
--- a/cores/esp32/esp32-hal-timer.c
+++ b/cores/esp32/esp32-hal-timer.c
@@ -19,6 +19,7 @@
 #include "soc/timer_group_struct.h"
 #include "soc/dport_reg.h"
 #include "esp_attr.h"
+#include "driver/periph_ctrl.h"
 
 #include "esp_system.h"
 #ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
@@ -225,15 +226,29 @@ hw_timer_t * timerBegin(uint8_t num, uint16_t divider, bool countUp){
     }
     hw_timer_t * timer = &hw_timer[num];
     if(timer->group) {
-        DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_TIMERGROUP1_CLK_EN);
-        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP1_RST);
-        TIMERG1.int_ena.val &= ~BIT(timer->timer);
+    	periph_module_enable(PERIPH_TIMG1_MODULE);
     } else {
-        DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_TIMERGROUP_CLK_EN);
-        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_TIMERGROUP_RST);
-        TIMERG0.int_ena.val &= ~BIT(timer->timer);
+    	periph_module_enable(PERIPH_TIMG0_MODULE);
     }
     timer->dev->config.enable = 0;
+    if(timer->group) {
+        TIMERG1.int_ena.val &= ~BIT(timer->timer);
+#if CONFIG_IDF_TARGET_ESP32
+            TIMERG1.int_clr_timers.val |= BIT(timer->timer);
+#else
+            TIMERG1.int_clr.val = BIT(timer->timer);
+#endif
+    } else {
+        TIMERG0.int_ena.val &= ~BIT(timer->timer);
+#if CONFIG_IDF_TARGET_ESP32
+            TIMERG0.int_clr_timers.val |= BIT(timer->timer);
+#else
+            TIMERG0.int_clr.val = BIT(timer->timer);
+#endif
+    }
+#ifdef TIMER_GROUP_SUPPORTS_XTAL_CLOCK
+    timer->dev->config.use_xtal = 0;
+#endif
     timerSetDivider(timer, divider);
     timerSetCountUp(timer, countUp);
     timerSetAutoReload(timer, false);
@@ -251,6 +266,9 @@ void timerEnd(hw_timer_t *timer){
 }
 
 void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
+	// EDGE DOES NOT WORK CURRENTLY
+	edge = false;
+
     static bool initialized = false;
     static intr_handle_t intr_handle = NULL;
     if(intr_handle){
@@ -262,8 +280,18 @@ void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
         timer->dev->config.alarm_en = 0;
         if(timer->num & 2){
             TIMERG1.int_ena.val &= ~BIT(timer->timer);
+#if CONFIG_IDF_TARGET_ESP32
+            TIMERG1.int_clr_timers.val |= BIT(timer->timer);
+#else
+            TIMERG1.int_clr.val = BIT(timer->timer);
+#endif
         } else {
             TIMERG0.int_ena.val &= ~BIT(timer->timer);
+#if CONFIG_IDF_TARGET_ESP32
+            TIMERG0.int_clr_timers.val |= BIT(timer->timer);
+#else
+            TIMERG0.int_clr.val = BIT(timer->timer);
+#endif
         }
         __timerInterruptHandlers[timer->num] = NULL;
     } else {
@@ -286,7 +314,7 @@ void timerAttachInterrupt(hw_timer_t *timer, void (*fn)(void), bool edge){
         }
         if(!initialized){
             initialized = true;
-            esp_intr_alloc(intr_source, (int)(ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_LOWMED|ESP_INTR_FLAG_EDGE), __timerISR, NULL, &intr_handle);
+            esp_intr_alloc(intr_source, (int)(ESP_INTR_FLAG_IRAM|ESP_INTR_FLAG_LOWMED), __timerISR, NULL, &intr_handle);
         } else {
             intr_matrix_set(esp_intr_get_cpu(intr_handle), intr_source, esp_intr_get_intno(intr_handle));
         }
diff --git a/cores/esp32/esp32-hal-touch.c b/cores/esp32/esp32-hal-touch.c
index b9ea18ab..202aca28 100644
--- a/cores/esp32/esp32-hal-touch.c
+++ b/cores/esp32/esp32-hal-touch.c
@@ -19,6 +19,8 @@
 #include "soc/rtc_io_reg.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/sens_reg.h"
+#include "soc/sens_struct.h"
+#include "driver/touch_sensor.h"
 
 #include "esp_system.h"
 #ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
@@ -75,6 +77,8 @@ void __touchSetCycles(uint16_t measure, uint16_t sleep)
     SET_PERI_REG_BITS(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_SLEEP_CYCLES, __touchSleepCycles, SENS_TOUCH_SLEEP_CYCLES_S);
     //Touch Pad Measure Time
     SET_PERI_REG_BITS(SENS_SAR_TOUCH_CTRL1_REG, SENS_TOUCH_MEAS_DELAY, __touchMeasureCycles, SENS_TOUCH_MEAS_DELAY_S);
+#else
+    touch_pad_set_meas_time(sleep, measure);
 #endif
 }
 
@@ -90,13 +94,21 @@ void __touchInit()
     SET_PERI_REG_MASK(SENS_SAR_TOUCH_CTRL2_REG, SENS_TOUCH_MEAS_EN_CLR);
     //clear touch enable
     WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, 0x0);
-    SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_TOUCH_SLP_TIMER_EN);
-#endif
-
     __touchSetCycles(__touchMeasureCycles, __touchSleepCycles);
-
-#if CONFIG_IDF_TARGET_ESP32
     esp_intr_alloc(ETS_RTC_CORE_INTR_SOURCE, (int)ESP_INTR_FLAG_IRAM, __touchISR, NULL, &touch_intr_handle);
+#else
+    touch_pad_init();
+    touch_pad_set_voltage(TOUCH_HVOLT_2V7, TOUCH_LVOLT_0V5, TOUCH_HVOLT_ATTEN_0V5);
+    touch_pad_set_idle_channel_connect(TOUCH_PAD_CONN_GND);
+    __touchSetCycles(__touchMeasureCycles, __touchSleepCycles);
+    touch_pad_denoise_t denoise = {
+        .grade = TOUCH_PAD_DENOISE_BIT4,
+        .cap_level = TOUCH_PAD_DENOISE_CAP_L4,
+    };
+    touch_pad_denoise_set_config(&denoise);
+    touch_pad_denoise_enable();
+    touch_pad_set_fsm_mode(TOUCH_FSM_MODE_TIMER);
+    touch_pad_fsm_start();
 #endif
 }
 
@@ -144,7 +156,23 @@ uint16_t __touchRead(uint8_t pin)
     WRITE_PERI_REG(SENS_SAR_TOUCH_ENABLE_REG, v0);
     return touch_value;
 #else
-    return 0;
+    static uint32_t chan_mask = 0;
+    uint32_t value = 0;
+    if((chan_mask & (1 << pad)) == 0){
+        if(touch_pad_set_thresh((touch_pad_t)pad, TOUCH_PAD_THRESHOLD_MAX) != ESP_OK){
+        	log_e("touch_pad_set_thresh failed");
+        } else if(touch_pad_config((touch_pad_t)pad) != ESP_OK){
+        	log_e("touch_pad_config failed");
+        } else {
+        	chan_mask |= (1 << pad);
+        }
+    }
+    if((chan_mask & (1 << pad)) != 0) {
+        if(touch_pad_read_raw_data((touch_pad_t)pad, &value) != ESP_OK){
+        	log_e("touch_pad_read_raw_data failed");
+        }
+    }
+    return value;
 #endif
 }
 
@@ -189,6 +217,8 @@ void __touchAttachInterrupt(uint8_t pin, void (*userFunc)(void), uint16_t thresh
                       (1 << (pad + SENS_TOUCH_PAD_WORKEN_S)) | \
                       (1 << (pad + SENS_TOUCH_PAD_OUTEN2_S)) | \
                       (1 << (pad + SENS_TOUCH_PAD_OUTEN1_S)));
+#else
+
 #endif
 }