forked from espressif/arduino-esp32
update IDF libs and includes
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@ -1035,14 +1035,20 @@
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#define DPORT_WIFI_CLK_EN_V 0xFFFFFFFF
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#define DPORT_WIFI_CLK_EN_S 0
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#define DPORT_WIFI_RST_EN_REG (DR_REG_DPORT_BASE + 0x0D0)
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/* DPORT_WIFI_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
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#define DPORT_CORE_RST_EN_REG (DR_REG_DPORT_BASE + 0x0D0)
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/* DPORT_CORE_RST : R/W ;bitpos:[31:0] ;default: 32'h0 ; */
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/*description: */
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#define DPROT_RW_BTLP_RST (BIT(10))
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#define DPROT_RW_BTMAC_RST (BIT(9))
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#define DPORT_MACPWR_RST (BIT(8))
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#define DPORT_EMAC_RST (BIT(7))
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#define DPORT_SDIO_HOST_RST (BIT(6))
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#define DPORT_SDIO_RST (BIT(5))
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#define DPORT_BTMAC_RST (BIT(4))
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#define DPORT_BT_RST (BIT(3))
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#define DPORT_MAC_RST (BIT(2))
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#define DPORT_WIFI_RST 0xFFFFFFFF
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#define DPORT_WIFI_RST_M ((DPORT_WIFI_RST_V)<<(DPORT_WIFI_RST_S))
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#define DPORT_WIFI_RST_V 0xFFFFFFFF
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#define DPORT_WIFI_RST_S 0
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#define DPORT_FE_RST (BIT(1))
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#define DPORT_BB_RST (BIT(0))
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#define DPORT_BT_LPCK_DIV_INT_REG (DR_REG_DPORT_BASE + 0x0D4)
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/* DPORT_BTEXTWAKEUP_REQ : R/W ;bitpos:[12] ;default: 1'b0 ; */
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