forked from espressif/arduino-esp32
v2.0.0 Add support for ESP32S2 and update ESP-IDF to 4.4 (#4996)
This is very much still work in progress and much more will change before the final 2.0.0 Some APIs have changed. New libraries have been added. LittleFS included. Co-authored-by: Seon Rozenblum <seonr@3sprockets.com> Co-authored-by: Me No Dev <me-no-dev@users.noreply.github.com> Co-authored-by: geeksville <kevinh@geeksville.com> Co-authored-by: Mike Dunston <m_dunston@comcast.net> Co-authored-by: Unexpected Maker <seon@unexpectedmaker.com> Co-authored-by: Seon Rozenblum <seonr@3sprockets.com> Co-authored-by: microDev <70126934+microDev1@users.noreply.github.com> Co-authored-by: tobozo <tobozo@users.noreply.github.com> Co-authored-by: bobobo1618 <bobobo1618@users.noreply.github.com> Co-authored-by: lorol <lorolouis@gmail.com> Co-authored-by: geeksville <kevinh@geeksville.com> Co-authored-by: Limor "Ladyada" Fried <limor@ladyada.net> Co-authored-by: Sweety <switi.mhaiske@espressif.com> Co-authored-by: Loick MAHIEUX <loick111@gmail.com> Co-authored-by: Larry Bernstone <lbernstone@gmail.com> Co-authored-by: Valerii Koval <valeros@users.noreply.github.com> Co-authored-by: 快乐的我531 <2302004040@qq.com> Co-authored-by: chegewara <imperiaonline4@gmail.com> Co-authored-by: Clemens Kirchgatterer <clemens@1541.org> Co-authored-by: Aron Rubin <aronrubin@gmail.com> Co-authored-by: Pete Lewis <601236+lewispg228@users.noreply.github.com>
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// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _dsps_biquad_H_
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#define _dsps_biquad_H_
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#include "dsp_err.h"
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#include "dsps_add_platform.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**@{*/
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/**
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* @brief IIR filter
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*
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* IIR filter 2nd order direct form II (bi quad)
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* The extension (_ansi) use ANSI C and could be compiled and run on any platform.
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* The extension (_ae32) is optimized for ESP32 chip.
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*
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* @param[in] input: input array
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* @param output: output array
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* @param len: length of input and output vectors
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* @param coef: array of coefficients. b0,b1,b2,a1,a2
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* expected that a0 = 1. b0..b2 - numerator, a0..a2 - denominator
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* @param w: delay line w0,w1. Length of 2.
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_f32_ansi(const float *input, float *output, int len, float *coef, float *w);
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esp_err_t dsps_biquad_f32_ae32(const float *input, float *output, int len, float *coef, float *w);
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/**@}*/
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#ifdef __cplusplus
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}
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#endif
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#if CONFIG_DSP_OPTIMIZED
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#if (dsps_biquad_f32_ae32_enabled == 1)
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#define dsps_biquad_f32 dsps_biquad_f32_ae32
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#else
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#define dsps_biquad_f32 dsps_biquad_f32_ansi
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#endif
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#else // CONFIG_DSP_OPTIMIZED
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#define dsps_biquad_f32 dsps_biquad_f32_ansi
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#endif // CONFIG_DSP_OPTIMIZED
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#endif // _dsps_biquad_H_
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// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef _dsps_biquad_gen_H_
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#define _dsps_biquad_gen_H_
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#include "dsp_err.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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// Common rules for all generated coefficients.
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// The coefficients placed to the array as follows:
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// coeffs[0] = b0;
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// coeffs[1] = b1;
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// coeffs[2] = b2;
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// coeffs[3] = a1;
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// coeffs[4] = a2;
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// a0 - are not placed and expected always as == 1
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/**
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* @brief LPF IIR filter coefficients
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* Coefficients for low pass 2nd order IIR filter (bi-quad)
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_lpf_f32(float *coeffs, float f, float qFactor);
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/**
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* @brief HPF IIR filter coefficients
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*
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* Coefficients for high pass 2nd order IIR filter (bi-quad)
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_hpf_f32(float *coeffs, float f, float qFactor);
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/**
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* @brief BPF IIR filter coefficients
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*
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* Coefficients for band pass 2nd order IIR filter (bi-quad)
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_bpf_f32(float *coeffs, float f, float qFactor);
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/**
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* @brief 0 dB BPF IIR filter coefficients
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*
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* Coefficients for band pass 2nd order IIR filter (bi-quad) with 0 dB gain in passband
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_bpf0db_f32(float *coeffs, float f, float qFactor);
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/**
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* @brief Notch IIR filter coefficients
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*
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* Coefficients for notch 2nd order IIR filter (bi-quad)
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
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* @param gain: gain in stopband in dB
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_notch_f32(float *coeffs, float f, float gain, float qFactor);
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/**
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* @brief Allpass 360 degree IIR filter coefficients
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*
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* Coefficients for all pass 2nd order IIR filter (bi-quad) with 360 degree phase shift
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_allpass360_f32(float *coeffs, float f, float qFactor);
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/**
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* @brief Allpass 180 degree IIR filter coefficients
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*
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* Coefficients for all pass 2nd order IIR filter (bi-quad) with 180 degree phase shift
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_allpass180_f32(float *coeffs, float f, float qFactor);
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/**
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* @brief peak IIR filter coefficients
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*
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* Coefficients for peak 2nd order IIR filter (bi-quad)
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_peakingEQ_f32(float *coeffs, float f, float qFactor);
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/**
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* @brief low shelf IIR filter coefficients
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*
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* Coefficients for low pass Shelf 2nd order IIR filter (bi-quad)
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
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* @param gain: gain in stopband in dB
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_lowShelf_f32(float *coeffs, float f, float gain, float qFactor);
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/**
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* @brief high shelf IIR filter coefficients
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*
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* Coefficients for high pass Shelf 2nd order IIR filter (bi-quad)
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* The implementation use ANSI C and could be compiled and run on any platform
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*
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* @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
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* @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
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* @param gain: gain in stopband in dB
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* @param qFactor: Q factor of filter
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*
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* @return
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* - ESP_OK on success
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* - One of the error codes from DSP library
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*/
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esp_err_t dsps_biquad_gen_highShelf_f32(float *coeffs, float f, float gain, float qFactor);
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#ifdef __cplusplus
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}
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#endif
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#endif // _dsps_biquad_gen_H_
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#ifndef _dsps_biquad_platform_H_
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#define _dsps_biquad_platform_H_
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#include <xtensa/config/core-isa.h>
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#include <xtensa/config/core-matmap.h>
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#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
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#define dsps_biquad_f32_ae32_enabled 1
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#endif
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#endif // _dsps_biquad_platform_H_
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