From 59a6800cdf71b33cfdca7d35d53cb3e0d7108946 Mon Sep 17 00:00:00 2001 From: me-no-dev Date: Sun, 10 Sep 2017 20:24:41 +0300 Subject: [PATCH] Enable clocks for UART1 and 2 Recent change in IDF disables those clocks at boot. This change should help with that. Fixes: https://github.com/espressif/esp-idf/issues/975 --- cores/esp32/esp32-hal-uart.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/cores/esp32/esp32-hal-uart.c b/cores/esp32/esp32-hal-uart.c index 3f79f22a..222bbcb2 100644 --- a/cores/esp32/esp32-hal-uart.c +++ b/cores/esp32/esp32-hal-uart.c @@ -26,6 +26,7 @@ #include "soc/uart_struct.h" #include "soc/io_mux_reg.h" #include "soc/gpio_sig_map.h" +#include "soc/dport_reg.h" #define ETS_UART_INUM 5 #define ETS_UART2_INUM ETS_UART_INUM @@ -190,7 +191,13 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx return NULL; } } - + if(uart_nr == 1){ + DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_UART1_CLK_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_UART1_RST); + } else if(uart_nr == 2){ + DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_UART2_CLK_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_UART2_RST); + } uartFlush(uart); uartSetBaudRate(uart, baudrate); UART_MUTEX_LOCK();