IDF master cf457d412 (#5073)

esp-dsp: master 7cc5073
esp-face: master 420fc7e
esp-rainmaker: f1b82c7
esp32-camera: master 2dded7c
esp_littlefs: master d268e18

tools/sdk/esp32/include/espcoredump/include/esp_core_dump.h

@@ -17,11 +17,37 @@
 #include <stddef.h>
 #include "esp_err.h"
 #include "esp_private/panic_internal.h"
+#include "esp_core_dump_summary_extra_info.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#define APP_ELF_SHA256_SZ (CONFIG_APP_RETRIEVE_LEN_ELF_SHA + 1)
+
+/**
+ * @brief Backtrace information
+ */
+typedef struct {
+    uint32_t bt[16];    /*!< Backtrace (array of PC) */
+    uint32_t depth;     /*!< Number of backtrace entries */
+    bool corrupted;     /*!< Status flag for backtrace is corrupt or not */
+} esp_core_dump_bt_info_t;
+
+/**
+ * @brief Core dump summary, Most meaningful contents of the core dump
+ *        are accommodated in this structure
+ */
+typedef struct {
+    uint32_t exc_tcb;                           /*!< TCB pointer to the task causing exception */
+    char exc_task[16];                          /*!< Name of the task that caused exception */
+    uint32_t exc_pc;                            /*!< Program counter for exception */
+    esp_core_dump_bt_info_t exc_bt_info;        /*!< Backtrace information for task causing exception */
+    uint32_t core_dump_version;                 /*!< Core dump version */
+    uint8_t app_elf_sha256[APP_ELF_SHA256_SZ];  /*!< Crashing application's SHA256 sum as a string */
+    esp_core_dump_summary_extra_info_t ex_info; /*!< Architecture specific extra data */
+} esp_core_dump_summary_t;
+
 /**************************************************************************************/
 /******************************** EXCEPTION MODE API **********************************/
 /**************************************************************************************/
@@ -89,6 +115,24 @@ void esp_core_dump_to_uart(panic_info_t *info);
  */
 esp_err_t esp_core_dump_image_get(size_t* out_addr, size_t *out_size);
 
+/**
+ * @brief  Erases coredump data in flash. esp_core_dump_image_get() will then return
+ *         ESP_ERR_NOT_FOUND. Can be used after a coredump has been transmitted successfully.
+ *         This function is always available, even when core dump is disabled in menuconfig.
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_core_dump_image_erase(void);
+
+/**
+ * @brief  Get the summary of a core dump. This function works only with ELF format core dumps.
+ *
+ * @param  summary   Summary of the core dump
+ *
+ * @return ESP_OK on success, otherwise \see esp_err_t
+ */
+esp_err_t esp_core_dump_get_summary(esp_core_dump_summary_t *summary);
+
 #ifdef __cplusplus
 }
 #endif

tools/sdk/esp32/include/espcoredump/include/port/riscv/esp_core_dump_summary_extra_info.h

@@ -0,0 +1,35 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief RISC-V architecture specific extra information
+ */
+typedef struct {
+    uint32_t mstatus;     /* Machine Status */
+    uint32_t mtvec;       /* Machine Trap-Vector Base Address */
+    uint32_t mcause;      /* Machine Trap Cause */
+    uint32_t mtval;       /* Machine Trap Value */
+    uint32_t exc_a[8];    /*!< a register set when the exception caused */
+} esp_core_dump_summary_extra_info_t;
+
+#ifdef __cplusplus
+}
+#endif

tools/sdk/esp32/include/espcoredump/include/port/xtensa/esp_core_dump_summary_extra_info.h

@@ -0,0 +1,38 @@
+// Copyright 2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#pragma once
+#include <stdint.h>
+#include <xtensa/config/core-isa.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define EPCx_REGISTER_COUNT XCHAL_NUM_INTLEVELS
+
+/**
+ * @brief Xtensa architecture specific extra information
+ */
+typedef struct {
+    uint32_t exc_cause;                 /*!< Cause of exception */
+    uint32_t exc_vaddr;                 /*!< Virtual address of exception */
+    uint32_t exc_a[16];                 /*!< a register set when the exception caused */
+    uint32_t epcx[EPCx_REGISTER_COUNT]; /*!< PC register address at exception level(1 to 7) */
+    uint8_t epcx_reg_bits;              /*!< Bit mask of available EPCx registers */
+} esp_core_dump_summary_extra_info_t;
+
+#ifdef __cplusplus
+}
+#endif