feedc0de/arduino-esp32
1
0
Fork 0
forked from espressif/arduino-esp32
Code Pull Requests Activity

Pull latest IDF and enable TinyUSB

Browse Source
This commit is contained in:
me-no-dev
2020-05-30 03:58:15 +03:00
parent 604abf0a96
commit 5dbcf201b8
245 changed files with 10305 additions and 98 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
tools/sdk/esp32/include/esp-tls/esp_tls.h
View File

@ -64,6 +64,7 @@ extern "C" {
#define ESP_ERR_WOLFSSL_SSL_SETUP_FAILED (ESP_ERR_ESP_TLS_BASE + 0x19) /*!< wolfSSL api returned failed */
#define ESP_ERR_WOLFSSL_SSL_WRITE_FAILED (ESP_ERR_ESP_TLS_BASE + 0x1A) /*!< wolfSSL api returned failed */
#define ESP_ERR_ESP_TLS_SE_FAILED (ESP_ERR_ESP_TLS_BASE + 0x1B) /*< esp-tls use Secure Element returned failed */
#ifdef CONFIG_ESP_TLS_USING_MBEDTLS
#define ESP_TLS_ERR_SSL_WANT_READ MBEDTLS_ERR_SSL_WANT_READ
#define ESP_TLS_ERR_SSL_WANT_WRITE MBEDTLS_ERR_SSL_WANT_WRITE
@ -183,6 +184,9 @@ typedef struct esp_tls_cfg {
underneath socket will be configured in non
blocking mode after tls session is established */
bool use_secure_element; /*!< Enable this option to use secure element or
atecc608a chip ( Integrated with ESP32-WROOM-32SE ) */
int timeout_ms; /*!< Network timeout in milliseconds */
bool use_global_ca_store; /*!< Use a global ca_store for all the connections in which

8
tools/sdk/esp32/include/esp_wifi/include/esp_mesh.h
View File

@ -128,6 +128,7 @@ extern "C" {
#define ESP_ERR_MESH_XMIT (ESP_ERR_MESH_BASE + 23) /**< XMIT */
#define ESP_ERR_MESH_QUEUE_READ (ESP_ERR_MESH_BASE + 24) /**< error in reading queue */
#define ESP_ERR_MESH_PS (ESP_ERR_MESH_BASE + 25) /**< mesh PS is not specified as enable or disable */
#define ESP_ERR_MESH_RECV_RELEASE (ESP_ERR_MESH_BASE + 26) /**< release esp_mesh_recv_toDS */
/**
* @brief Flags bitmap for esp_mesh_send() and esp_mesh_recv()
@ -225,6 +226,7 @@ typedef enum {
MESH_ROOT, /**< the only sink of the mesh network. Has the ability to access external IP network */
MESH_NODE, /**< intermediate device. Has the ability to forward packets over the mesh network */
MESH_LEAF, /**< has no forwarding ability */
MESH_STA, /**< connect to router with a standlone Wi-Fi station mode, no network expansion capability */
} mesh_type_t;
/**
@ -753,6 +755,7 @@ esp_err_t esp_mesh_recv(mesh_addr_t *from, mesh_data_t *data, int timeout_ms,
* - ESP_ERR_MESH_NOT_START
* - ESP_ERR_MESH_TIMEOUT
* - ESP_ERR_MESH_DISCARD
* - ESP_ERR_MESH_RECV_RELEASE
*/
esp_err_t esp_mesh_recv_toDS(mesh_addr_t *from, mesh_addr_t *to,
mesh_data_t *data, int timeout_ms, int *flag, mesh_opt_t opt[],
@ -848,8 +851,10 @@ esp_err_t esp_mesh_get_id(mesh_addr_t *id);
/**
* @brief Designate device type over the mesh network
* - MESH_IDLE: designates a device as a self-organized node for a mesh network
* - MESH_ROOT: designates the root node for a mesh network
* - MESH_LEAF: designates a device as a standalone Wi-Fi station
* - MESH_LEAF: designates a device as a standalone Wi-Fi station that connects to a parent
* - MESH_STA: designates a device as a standalone Wi-Fi station that connects to a router
*
* @param[in] type device type
*
@ -1356,6 +1361,7 @@ bool esp_mesh_is_root_fixed(void);
* @param[in] parent_mesh_id parent mesh ID,
* - If this value is not set, the original mesh ID is used.
* @param[in] my_type mesh type
* - MESH_STA is not supported.
* - If the parent set for the device is the same as the router in the network configuration,
* then my_type shall set MESH_ROOT and my_layer shall set MESH_ROOT_LAYER.
* @param[in] my_layer mesh layer

43
tools/sdk/esp32/include/esp_wifi/include/esp_wifi.h
View File

@ -879,28 +879,59 @@ esp_err_t esp_wifi_set_vendor_ie(bool enable, wifi_vendor_ie_type_t type, wifi_v
esp_err_t esp_wifi_set_vendor_ie_cb(esp_vendor_ie_cb_t cb, void *ctx);
/**
* @brief Set maximum WiFi transmitting power
* @brief Set maximum transmitting power after WiFi start.
*
* @param power Maximum WiFi transmitting power, unit is 0.25dBm, range is [40, 82] corresponding to 10dBm - 20.5dBm here.
* @attention 1. Maximum power before wifi startup is limited by PHY init data bin.
* @attention 2. The value set by this API will be mapped to the max_tx_power of the structure wifi_country_t variable.
* @attention 3. Mapping Table {Power, max_tx_power} = {{8, 2}, {20, 5}, {28, 7}, {34, 8}, {44, 11},
* {52, 13}, {56, 14}, {60, 15}, {66, 16}, {72, 18}, {78, 20}}.
* @attention 4. Param power unit is 0.25dBm, range is [8, 78] corresponding to 2dBm - 20dBm.
* @attention 5. Relationship between set value and actual value. As follows:
* +------------+--------------+
* | set value | actual value |
* +============+==============+
* | [8, 19] | 8 |
* +------------+--------------+
* | [20, 27] | 20 |
* +------------+--------------+
* | [28, 33] | 28 |
* +------------+--------------+
* | [34, 43] | 34 |
* +------------+--------------+
* | [44, 51] | 44 |
* +------------+--------------+
* | [52, 55] | 52 |
* +------------+--------------+
* | [56, 59] | 56 |
* +------------+--------------+
* | [60, 65] | 60 |
* +------------+--------------+
* | [66, 71] | 66 |
* +------------+--------------+
* | [72, 77] | 72 |
* +------------+--------------+
* | 78 | 78 |
* +------------+--------------+
* @param power Maximum WiFi transmitting power.
*
* @return
* - ESP_OK: succeed
* - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
* - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start
* - ESP_ERR_WIFI_NOT_ARG: invalid argument
* - ESP_ERR_WIFI_ARG: invalid argument, e.g. parameter is out of range
*/
esp_err_t esp_wifi_set_max_tx_power(int8_t power);
/**
* @brief Get maximum WiFi transmiting power
* @brief Get maximum transmiting power after WiFi start
*
* @param power Maximum WiFi transmitting power, unit is 0.25dBm.
* @param power Maximum WiFi transmitting power, unit is 0.25dBm.
*
* @return
* - ESP_OK: succeed
* - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init
* - ESP_ERR_WIFI_NOT_START: WiFi is not started by esp_wifi_start
* - ESP_ERR_INVALID_ARG: invalid argument
* - ESP_ERR_WIFI_ARG: invalid argument
*/
esp_err_t esp_wifi_get_max_tx_power(int8_t *power);

65
tools/sdk/esp32/include/idf_test/include/idf_performance.h
View File

@ -90,6 +90,71 @@
#define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_KBSEC_FRHOST_SPI 1000
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B 22200
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B 53400
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB (701*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB (7088*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE 52200
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B 27400
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B 53600
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB (1015*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB (7797*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE 44300
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B 24400
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B 50100
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB (618*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB (1601*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE 59800
#endif
// Some performance value based on the test against GD chip with single_core config.
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B 68900
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B (359*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB (475*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB (1697*1000)
#endif
#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE
#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE 81300
#endif
//time to perform the task selection plus context switch (from task)
#ifndef IDF_PERFORMANCE_MAX_SCHEDULING_TIME
#define IDF_PERFORMANCE_MAX_SCHEDULING_TIME 2000

8
tools/sdk/esp32/include/mbedtls/port/include/mbedtls/esp_config.h
View File

@ -149,6 +149,14 @@
#undef MBEDTLS_MPI_MUL_MPI_ALT
#endif
#ifdef CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN
#define MBEDTLS_ECDSA_SIGN_ALT
#endif
#ifdef CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY
#define MBEDTLS_ECDSA_VERIFY_ALT
#endif
/**
* \def MBEDTLS_ENTROPY_HARDWARE_ALT
*

4
tools/sdk/esp32/include/soc/soc/esp32/include/soc/spi_caps.h
View File

@ -60,8 +60,8 @@
//#define SOC_SPI_SUPPORT_CD_SIG
// Peripheral supports DIO, DOUT, QIO, or QOUT
#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(spi_dev) 1
#define SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(spi_host) ({(void)spi_host; 1;})
// Peripheral doesn't support output given level during its "dummy phase"
#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUTPUT(spi_dev) 0
#define SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUTPUT(spi_host) ({(void)spi_host; 0;})

2
tools/sdk/esp32/include/soc/src/esp32/include/hal/cpu_ll.h
View File

@ -103,7 +103,7 @@ static inline uint32_t cpu_ll_ptr_to_pc(const void* addr)
static inline void* cpu_ll_pc_to_ptr(uint32_t pc)
{
return (void*) ((pc & 0x3fffffff) | 0x40000000);
return (void*) ((pc & 0x3fffffffU) | 0x40000000U);
}
static inline void cpu_ll_set_watchpoint(int id,

23
tools/sdk/esp32/include/soc/src/esp32/include/hal/spi_flash_ll.h
View File

@ -43,7 +43,16 @@ extern "C" {
#define SPI_FLASH_LL_CLKREG_VAL_80MHZ ((spi_flash_ll_clock_reg_t){.val=0x80000000}) ///< Clock set to 80 MHz
/// Get the start address of SPI peripheral registers by the host ID
#define spi_flash_ll_get_hw(host_id) ((host_id)==SPI1_HOST? &SPI1:((host_id)==SPI2_HOST?&SPI2:((host_id)==SPI3_HOST?&SPI3:({abort();(spi_dev_t*)0;}))))
#define spi_flash_ll_get_hw(host_id) ( ((host_id)==SPI1_HOST) ? &SPI1 :(\
((host_id)==SPI2_HOST) ? &SPI2 :(\
((host_id)==SPI3_HOST) ? &SPI3 :(\
{abort();(spi_dev_t*)0;}\
))) )
#define spi_flash_ll_hw_get_id(dev) ( ((dev) == &SPI1) ? SPI1_HOST :(\
((dev) == &SPI2) ? SPI2_HOST :(\
((dev) == &SPI3) ? SPI3_HOST :(\
-1\
))) )
/// Empty function to be compatible with new version chips.
#define spi_flash_ll_set_dummy_out(dev, out_en, out_lev)
@ -161,12 +170,12 @@ static inline void spi_flash_ll_write_word(spi_dev_t *dev, uint32_t word)
/**
* Set the data to be written in the data buffer.
*
*
* @param dev Beginning address of the peripheral registers.
* @param buffer Buffer holding the data
* @param buffer Buffer holding the data
* @param length Length of data in bytes.
*/
static inline void spi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length)
static inline void spi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length)
{
// Load data registers, word at a time
int num_words = (length + 3) >> 2;
@ -324,10 +333,10 @@ static inline void spi_flash_ll_set_command8(spi_dev_t *dev, uint8_t command)
/**
* Get the address length that is set in register, in bits.
*
*
* @param dev Beginning address of the peripheral registers.
*
*/
*
*/
static inline int spi_flash_ll_get_addr_bitlen(spi_dev_t *dev)
{
return dev->user.usr_addr ? dev->user1.usr_addr_bitlen + 1 : 0;

4
tools/sdk/esp32/include/spi_flash/include/esp_flash.h
View File

@ -48,8 +48,8 @@ typedef struct {
/** Called before any erase/write operations to check whether the region is limited by the OS */
esp_err_t (*region_protected)(void* arg, size_t start_addr, size_t size);
/** Delay for at least 'ms' milliseconds. Called in between 'start' and 'end'. */
esp_err_t (*delay_ms)(void *arg, unsigned ms);
/** Delay for at least 'us' microseconds. Called in between 'start' and 'end'. */
esp_err_t (*delay_us)(void *arg, unsigned us);
} esp_flash_os_functions_t;
/** @brief Structure to describe a SPI flash chip connected to the system.

8
tools/sdk/esp32/include/spi_flash/include/esp_flash_spi_init.h
View File

@ -28,8 +28,12 @@ typedef struct {
esp_flash_io_mode_t io_mode; ///< IO mode to read from the Flash
esp_flash_speed_t speed; ///< Speed of the Flash clock
int input_delay_ns; ///< Input delay of the data pins, in ns. Set to 0 if unknown.
int cs_id; ///< @deprecated CS pin (signal) to use
/**
* CS line ID, ignored when not `host_id` is not SPI1_HOST, or
* `CONFIG_SPI_FLASH_SHARE_SPI1_BUS` is enabled. In this case, the CS line used is
* automatically assigned by the SPI bus lock.
*/
int cs_id;
} esp_flash_spi_device_config_t;
/**

8
tools/sdk/esp32/include/spi_flash/include/spi_flash_chip_generic.h
View File

@ -193,14 +193,14 @@ esp_err_t spi_flash_chip_generic_get_write_protect(esp_flash_t *chip, bool *out_
* progress bit) to be cleared.
*
* @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
* @param timeout_ms Time to wait before timeout, in ms.
* @param timeout_us Time to wait before timeout, in us.
*
* @return
* - ESP_OK if success
* - ESP_ERR_TIMEOUT if not idle before timeout
* - or other error passed from the ``wait_idle`` or ``read_status`` function of host driver
*/
esp_err_t spi_flash_chip_generic_wait_idle(esp_flash_t *chip, uint32_t timeout_ms);
esp_err_t spi_flash_chip_generic_wait_idle(esp_flash_t *chip, uint32_t timeout_us);
/**
* @brief Set the specified SPI read mode according to the data in the chip
@ -247,7 +247,7 @@ extern const spi_flash_chip_t esp_flash_chip_generic;
* spi_flash_chip_generic_wait_idle() and may be useful when implementing
* alternative drivers.
*
* timeout_ms will be decremented if the function needs to wait until the host hardware is idle.
* timeout_us will be decremented if the function needs to wait until the host hardware is idle.
*
* @param chip Pointer to SPI flash chip to use. If NULL, esp_flash_default_chip is substituted.
*
@ -256,7 +256,7 @@ extern const spi_flash_chip_t esp_flash_chip_generic;
* - ESP_ERR_TIMEOUT if not idle before timeout
* - or other error passed from the ``set_write_protect`` or ``common_command`` function of host driver
*/
esp_err_t spi_flash_generic_wait_host_idle(esp_flash_t *chip, uint32_t *timeout_ms);
esp_err_t spi_flash_generic_wait_host_idle(esp_flash_t *chip, uint32_t *timeout_us);
/// Function pointer type for reading status register with QE bit.
typedef esp_err_t (*esp_flash_rdsr_func_t)(esp_flash_t* chip, uint32_t* out_sr);

9
tools/sdk/esp32/include/tcp_transport/include/esp_transport_ssl.h
View File

@ -132,6 +132,15 @@ void esp_transport_ssl_set_alpn_protocol(esp_transport_handle_t t, const char **
*/
void esp_transport_ssl_skip_common_name_check(esp_transport_handle_t t);
/**
* @brief Set the ssl context to use secure element (atecc608a) for client(device) private key and certificate
*
* @note Recommended to be used with ESP32-WROOM-32SE (which has inbuilt ATECC608A a.k.a Secure Element)
*
* @param t ssl transport
*/
void esp_transport_ssl_use_secure_element(esp_transport_handle_t t);
/**
* @brief Set PSK key and hint for PSK server/client verification in esp-tls component.
* Important notes: