Allow configuration of Ethernet PHY clock source (#916)

* Allow configuration of Ethernet PHY clock source
Refer to https://github.com/espressif/esp-idf/pull/1127
The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY.
The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested).
New example available.

* Allow configuration of Ethernet PHY clock source
Refer to https://github.com/espressif/esp-idf/pull/1127
The internal APLL can be used to generate the 50MHz clock for the internal EMAC and the external Ethernet PHY.
The clock can either be input on GPIO0 (as before) or output on GPIO0, GPIO16 or GPIO17 (only GPIO17 extensively tested).
New example available.
This commit is contained in:
Frank Sautter
2017-12-19 14:06:01 +01:00
committed by Me No Dev
parent 20db2ee421
commit 75bc1e648b
3 changed files with 109 additions and 3 deletions

View File

@ -44,7 +44,11 @@
#define ETH_PHY_MDIO 18
#endif
typedef enum { ETH_PHY_LAN8720, ETH_PHY_TLK110, ETH_PHY_MAX} eth_phy_type_t;
#ifndef ETH_CLK_MODE
#define ETH_CLK_MODE ETH_CLOCK_GPIO0_IN
#endif
typedef enum { ETH_PHY_LAN8720, ETH_PHY_TLK110, ETH_PHY_MAX } eth_phy_type_t;
class ETHClass {
private:
@ -56,7 +60,7 @@ class ETHClass {
ETHClass();
~ETHClass();
bool begin(uint8_t phy_addr=ETH_PHY_ADDR, int power=ETH_PHY_POWER, int mdc=ETH_PHY_MDC, int mdio=ETH_PHY_MDIO, eth_phy_type_t type=ETH_PHY_TYPE);
bool begin(uint8_t phy_addr=ETH_PHY_ADDR, int power=ETH_PHY_POWER, int mdc=ETH_PHY_MDC, int mdio=ETH_PHY_MDIO, eth_phy_type_t type=ETH_PHY_TYPE, eth_clock_mode_t clk_mode=ETH_CLK_MODE);
// NOT WORKING YET!
//bool config(IPAddress local_ip, IPAddress gateway, IPAddress subnet, IPAddress dns1 = (uint32_t)0x00000000, IPAddress dns2 = (uint32_t)0x00000000);