diff --git a/boards.txt b/boards.txt
index 44bf8aa2..9505d568 100644
--- a/boards.txt
+++ b/boards.txt
@@ -3376,6 +3376,7 @@ m5stack-core2.upload.tool=esptool_py
 m5stack-core2.upload.maximum_size=6553600
 m5stack-core2.upload.maximum_data_size=4521984
 m5stack-core2.upload.wait_for_upload_port=true
+m5stack-core2.upload.flags=
 
 m5stack-core2.serial.disableDTR=true
 m5stack-core2.serial.disableRTS=true
diff --git a/cores/esp32/esp32-hal-psram.c b/cores/esp32/esp32-hal-psram.c
index 90722d10..d0c0504a 100644
--- a/cores/esp32/esp32-hal-psram.c
+++ b/cores/esp32/esp32-hal-psram.c
@@ -51,12 +51,6 @@ bool psramInit(){
         log_w("PSRAM not supported!");
         return false;
     }
-    esp_spiram_init_cache();
-#elif CONFIG_IDF_TARGET_ESP32S2
-    extern void esp_config_data_cache_mode(void);
-    esp_config_data_cache_mode();
-    Cache_Enable_DCache(0);
-#endif
     if (esp_spiram_init() != ESP_OK) {
         spiramFailed = true;
         log_w("PSRAM init failed!");
@@ -67,6 +61,11 @@ bool psramInit(){
         return false;
     }
     esp_spiram_init_cache();
+#elif CONFIG_IDF_TARGET_ESP32S2
+    extern void esp_config_data_cache_mode(void);
+    esp_config_data_cache_mode();
+    Cache_Enable_DCache(0);
+#endif
     if (!esp_spiram_test()) {
         spiramFailed = true;
         log_e("PSRAM test failed!");