forked from espressif/arduino-esp32
IDF release/v4.4 f3e0c8bc41 (#6075)
esp-dsp: master 6b25cbb esp-face: master 925c72e esp-rainmaker: f1b82c7 esp32-camera: master 221d24d esp_littlefs: master 5a13cd6 fixes: #5948
This commit is contained in:
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@ -12,8 +12,7 @@
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#ifndef __ESP_IPC_H__
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#define __ESP_IPC_H__
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#pragma once
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#include <esp_err.h>
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@ -23,30 +22,30 @@ extern "C" {
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#if !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
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/** @cond */
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typedef void (*esp_ipc_func_t)(void* arg);
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/** @endcond */
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/*
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* Inter-processor call APIs
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*
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* FreeRTOS provides several APIs which can be used to communicate between
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* different tasks, including tasks running on different CPUs.
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* This module provides additional APIs to run some code on the other CPU.
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*
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* These APIs can only be used when FreeRTOS scheduler is running.
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* FreeRTOS provides several APIs which can be used to communicate between different tasks, including tasks running on
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* different CPUs. This module provides additional APIs to run some code on the other CPU. These APIs can only be used
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* when FreeRTOS scheduler is running.
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*/
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/**
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* @brief Execute a function on the given CPU
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* @brief IPC Callback
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*
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* Run a given function on a particular CPU. The given function must accept a
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* void* argument and return void. The given function is run in the context of
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* the IPC task of the CPU specified by the cpu_id parameter. The calling task
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* will be blocked until the IPC task begins executing the given function. If
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* another IPC call is ongoing, the calling task will block until the other IPC
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* call completes. The stack size allocated for the IPC task can be configured
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* in the "Inter-Processor Call (IPC) task stack size" setting in menuconfig.
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* Increase this setting if the given function requires more stack than default.
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* A callback of this type should be provided as an argument when calling esp_ipc_call() or esp_ipc_call_blocking().
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*/
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typedef void (*esp_ipc_func_t)(void* arg);
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/**
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* @brief Execute a callback on a given CPU
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*
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* Execute a given callback on a particular CPU. The callback must be of type "esp_ipc_func_t" and will be invoked in
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* the context of the target CPU's IPC task.
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*
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* - This function will block the target CPU's IPC task has begun execution of the callback
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* - If another IPC call is ongoing, this function will block until the ongoing IPC call completes
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* - The stack size of the IPC task can be configured via the CONFIG_ESP_IPC_TASK_STACK_SIZE option
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*
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* @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
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*
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@ -63,17 +62,10 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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/**
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* @brief Execute a function on the given CPU and blocks until it completes
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* @brief Execute a callback on a given CPU until and block until it completes
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*
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* Run a given function on a particular CPU. The given function must accept a
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* void* argument and return void. The given function is run in the context of
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* the IPC task of the CPU specified by the cpu_id parameter. The calling task
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* will be blocked until the IPC task completes execution of the given function.
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* If another IPC call is ongoing, the calling task will block until the other
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* IPC call completes. The stack size allocated for the IPC task can be
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* configured in the "Inter-Processor Call (IPC) task stack size" setting in
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* menuconfig. Increase this setting if the given function requires more stack
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* than default.
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* This function is identical to esp_ipc_call() except that this function will block until the execution of the callback
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* completes.
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*
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* @note In single-core mode, returns ESP_ERR_INVALID_ARG for cpu_id 1.
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*
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@ -88,10 +80,8 @@ esp_err_t esp_ipc_call(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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*/
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esp_err_t esp_ipc_call_blocking(uint32_t cpu_id, esp_ipc_func_t func, void* arg);
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#endif // not CONFIG_FREERTOS_UNICORE or CONFIG_APPTRACE_GCOV_ENABLE
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#endif // !defined(CONFIG_FREERTOS_UNICORE) || defined(CONFIG_APPTRACE_GCOV_ENABLE)
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ESP_IPC_H__ */
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@ -14,31 +14,38 @@ extern "C" {
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#ifdef CONFIG_ESP_IPC_ISR_ENABLE
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/** @cond */
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/**
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* @brief IPC ISR Callback
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*
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* A callback of this type should be provided as an argument when calling esp_ipc_isr_asm_call() or
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* esp_ipc_isr_asm_call_blocking().
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*/
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typedef void (*esp_ipc_isr_func_t)(void* arg);
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/** @endcond */
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/**
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* @brief Initialize inter-processor call module which based on #4 high-interrupt.
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* @brief Initialize the IPC ISR feature
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*
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* This function is called on CPU start and should not be called from the application.
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* This function initializes the IPC ISR feature and must be called before any other esp_ipc_isr...() functions.
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* The IPC ISR feature allows for callbacks (written in assembly) to be run on a particular CPU in the context of a
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* High Priority Interrupt.
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*
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* This function starts two tasks, one on each CPU. These tasks register
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* #4 High-interrupt and after that, the tasks are deleted.
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* The next API functions work with this functionality:
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* esp_ipc_isr_asm_call
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* esp_ipc_isr_asm_call_blocking
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* They allow to run an asm function on other CPU.
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* - This function will register a High Priority Interrupt on each CPU. The priority of the interrupts is dependent on
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* the CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL option.
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* - Callbacks written in assembly can then run in context of the registered High Priority Interrupts
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* - Callbacks can be executed by calling esp_ipc_isr_asm_call() or esp_ipc_isr_asm_call_blocking()
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*/
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void esp_ipc_isr_init(void);
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/**
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* @brief Execute an asm function on the other CPU (uses the #4 high-priority interrupt)
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* @brief Execute an assembly callback on the other CPU
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*
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* @note In single-core mode, it is not available.
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* This function calls the #4 high-priority interrupt on the other CPU.
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* The given function is called in the context of the interrupt by CALLX0 command and
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* operates with registers a2, a3, a4.
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* Execute a given callback on the other CPU in the context of a High Priority Interrupt.
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*
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* - This function will busy-wait in a critical section until the other CPU has started execution of the callback
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* - The callback must be written in assembly, is invoked using a CALLX0 instruction, and has a2, a3, a4 as scratch
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* registers. See docs for more details
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*
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* @note This function is not available in single-core mode.
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*
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* @param[in] func Pointer to a function of type void func(void* arg) to be executed
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* @param[in] arg Arbitrary argument of type void* to be passed into the function
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@ -46,11 +53,12 @@ void esp_ipc_isr_init(void);
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void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
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/**
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* @brief Execute an asm function on the other CPU and blocks until it completes (uses the #4 high-priority interrupt)
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* @brief Execute an assembly callback on the other CPU and busy-wait until it completes
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*
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* @note In single-core mode, it is not available.
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* This function calls the #4 high-priority interrupt on the other CPU.
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* The given function is called in the context of the interrupt by CALLX0 command.
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* This function is identical to esp_ipc_isr_asm_call() except that this function will busy-wait until the execution of
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* the callback completes.
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*
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* @note This function is not available in single-core mode.
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*
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* @param[in] func Pointer to a function of type void func(void* arg) to be executed
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* @param[in] arg Arbitrary argument of type void* to be passed into the function
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@ -58,51 +66,60 @@ void esp_ipc_isr_asm_call(esp_ipc_isr_func_t func, void* arg);
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void esp_ipc_isr_asm_call_blocking(esp_ipc_isr_func_t func, void* arg);
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/**
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* @brief Stall the other CPU and the current CPU disables interrupts with level 3 and lower.
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* @brief Stall the other CPU
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*
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* @note In single-core mode, it is not available.
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* This function calls the #4 high-priority interrupt on the other CPU.
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* The esp_ipc_isr_finish_cmd() function is called on the other CPU in the context of the #4 high-priority interrupt.
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* The esp_ipc_isr_finish_cmd is called by CALLX0 command.
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* It is waiting for the end command. The command will be sent by esp_ipc_isr_release_other_cpu().
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* This function is used for DPORT workaround.
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* This function will stall the other CPU. The other CPU is stalled by busy-waiting in the context of a High Priority
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* Interrupt. The other CPU will not be resumed until esp_ipc_isr_release_other_cpu() is called.
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*
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* This function blocks other CPU until the release call esp_ipc_isr_release_other_cpu().
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* - This function is internally implemented using IPC ISR
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* - This function is used for DPORT workaround.
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* - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
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*
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* This fucntion is used for the DPORT workaround: stall other cpu that this cpu is pending to access dport register start.
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* @note This function is not available in single-core mode.
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*/
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void esp_ipc_isr_stall_other_cpu(void);
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/**
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* @brief Release the other CPU
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*
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* @note In single-core mode, it is not available.
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* This function will send the end command to release the stall other CPU.
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* This function is used for DPORT workaround: stall other cpu that this cpu is pending to access dport register end.
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* This function will release the other CPU that was previously stalled from calling esp_ipc_isr_stall_other_cpu()
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*
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* - This function is used for DPORT workaround.
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* - If the stall feature is paused using esp_ipc_isr_stall_pause(), this function will have no effect
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*
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* @note This function is not available in single-core mode.
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*/
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void esp_ipc_isr_release_other_cpu(void);
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/**
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* @brief Pause stall the other CPU
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* @brief Puase the CPU stall feature
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*
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* This function will pause the CPU stall feature. Once paused, calls to esp_ipc_isr_stall_other_cpu() and
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* esp_ipc_isr_release_other_cpu() will have no effect. If a IPC ISR call is already in progress, this function will
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* busy-wait until the call completes before pausing the CPU stall feature.
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*/
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void esp_ipc_isr_stall_pause(void);
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/**
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* @brief Abort stall the other CPU
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* @brief Abort a CPU stall
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*
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* This routine does not stop the stall routines in any way that is recoverable.
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* Please only call in case of panic().
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* Used in panic code: the enter_critical stuff may be messed up so we just stop everything without checking the mux.
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* This function will abort any stalling routine of the other CPU due to a pervious call to
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* esp_ipc_isr_stall_other_cpu(). This function aborts the stall in a non-recoverable manner, thus should only be called
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* in case of a panic().
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*
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* - This function is used in panic handling code
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*/
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void esp_ipc_isr_stall_abort(void);
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/**
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* @brief Resume stall the other CPU
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* @brief Resume the CPU stall feature
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*
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* This function will resume the CPU stall feature that was previously paused by calling esp_ipc_isr_stall_pause(). Once
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* resumed, calls to esp_ipc_isr_stall_other_cpu() and esp_ipc_isr_release_other_cpu() will have effect again.
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*/
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void esp_ipc_isr_stall_resume(void);
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#else // not CONFIG_ESP_IPC_ISR_ENABLE
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#else // CONFIG_ESP_IPC_ISR_ENABLE
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#define esp_ipc_isr_stall_other_cpu()
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#define esp_ipc_isr_release_other_cpu()
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