Esp32 s3 support (#6341)

Co-authored-by: Jason2866 <24528715+Jason2866@users.noreply.github.com>
Co-authored-by: Unexpected Maker <seon@unexpectedmaker.com>
Co-authored-by: Rodrigo Garcia <rodrigo.garcia@espressif.com>
Co-authored-by: Tomáš Pilný <34927466+PilnyTomas@users.noreply.github.com>
Co-authored-by: Pedro Minatel <pedro.minatel@espressif.com>
Co-authored-by: Ivan Grokhotkov <ivan@espressif.com>
Co-authored-by: Jan Procházka <90197375+P-R-O-C-H-Y@users.noreply.github.com>
Co-authored-by: Limor "Ladyada" Fried <limor@ladyada.net>

tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_gap_bt_api.h

@@ -236,7 +236,7 @@ typedef enum {
 #define ESP_BT_GAP_MIN_INQ_LEN                (0x01)  /*!< Minimum inquiry duration, unit is 1.28s */
 #define ESP_BT_GAP_MAX_INQ_LEN                (0x30)  /*!< Maximum inquiry duration, unit is 1.28s */
 
-/// A2DP state callback parameters
+/// GAP state callback parameters
 typedef union {
     /**
      * @brief ESP_BT_GAP_DISC_RES_EVT

tools/sdk/esp32c3/include/bt/host/bluedroid/api/include/api/esp_hf_client_api.h

@@ -60,6 +60,9 @@ typedef enum {
 #define ESP_HF_CLIENT_PEER_FEAT_ECC        0x80        /* Enhanced Call Control */
 #define ESP_HF_CLIENT_PEER_FEAT_EXTERR    0x100        /* Extended error codes */
 #define ESP_HF_CLIENT_PEER_FEAT_CODEC     0x200        /* Codec Negotiation */
+/* HFP 1.7+ */
+#define ESP_HF_CLIENT_PEER_FEAT_HF_IND    0x400        /* HF Indicators */
+#define ESP_HF_CLIENT_PEER_FEAT_ESCO_S4   0x800        /* eSCO S4 Setting Supported */
 
 /* CHLD feature masks of AG */
 #define ESP_HF_CLIENT_CHLD_FEAT_REL           0x01       /* 0  Release waiting call or held calls */

tools/sdk/esp32c3/include/bt/include/esp32c3/include/esp_bt.h

@@ -18,7 +18,7 @@ extern "C" {
 #endif
 
 #define ESP_BT_CTRL_CONFIG_MAGIC_VAL    0x5A5AA5A5
-#define ESP_BT_CTRL_CONFIG_VERSION      0x02104270
+#define ESP_BT_CTRL_CONFIG_VERSION      0x02112280
 
 #define ESP_BT_HCI_TL_MAGIC_VALUE   0xfadebead
 #define ESP_BT_HCI_TL_VERSION       0x00010000
@@ -178,6 +178,7 @@ typedef void (* esp_bt_hci_tl_callback_t) (void *arg, uint8_t status);
     .hw_target_code = BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0,                \
     .slave_ce_len_min = SLAVE_CE_LEN_MIN_DEFAULT,                          \
     .hw_recorrect_en = AGC_RECORRECT_EN,                                   \
+    .cca_thresh = CONFIG_BT_CTRL_HW_CCA_VAL,                               \
 };
 
 #else
@@ -244,6 +245,7 @@ typedef struct {
     uint32_t hw_target_code;                /*!< hardware target */
     uint8_t slave_ce_len_min;
     uint8_t hw_recorrect_en;
+    uint8_t cca_thresh;                     /*!< cca threshold*/
 } esp_bt_controller_config_t;
 
 /**

tools/sdk/esp32c3/include/button/button/include/iot_button.h

@@ -0,0 +1,272 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _IOT_BUTTON_H_
+#define _IOT_BUTTON_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <driver/gpio.h>
+#include <freertos/FreeRTOS.h>
+#include <freertos/portmacro.h>
+typedef void (* button_cb)(void*);
+typedef void* button_handle_t;
+
+typedef enum {
+    BUTTON_ACTIVE_HIGH = 1,    /*!<button active level: high level*/
+    BUTTON_ACTIVE_LOW = 0,     /*!<button active level: low level*/
+} button_active_t;
+
+typedef enum {
+    BUTTON_CB_PUSH = 0,   /*!<button push callback event */
+    BUTTON_CB_RELEASE,    /*!<button release callback event */
+    BUTTON_CB_TAP,        /*!<button quick tap callback event(will not trigger if there already is a "PRESS" event) */
+    BUTTON_CB_SERIAL,     /*!<button serial trigger callback event */
+} button_cb_type_t;
+
+/**
+ * @brief Init button functions
+ *
+ * @param gpio_num GPIO index of the pin that the button uses
+ * @param active_level button hardware active level.
+ *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+ *
+ * @return A button_handle_t handle to the created button object, or NULL in case of error.
+ */
+button_handle_t iot_button_create(gpio_num_t gpio_num, button_active_t active_level);
+
+/**
+ * @brief Register a callback function for a serial trigger event.
+ *
+ * @param btn_handle handle of the button object
+ * @param start_after_sec define the time after which to start serial trigger action
+ * @param interval_tick serial trigger interval
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_serial_cb(button_handle_t btn_handle, uint32_t start_after_sec, TickType_t interval_tick, button_cb cb, void* arg);
+
+/**
+ * @brief Register a callback function for a button_cb_type_t action.
+ *
+ * @param btn_handle handle of the button object
+ * @param type callback function type
+ * @param cb callback function for "TAP" action.
+ * @param arg Parameter for callback function
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_set_evt_cb(button_handle_t btn_handle, button_cb_type_t type, button_cb cb, void* arg);
+
+/**
+ * @brief Callbacks invoked as timer events occur while button is pressed.
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is pressed for 6 sec then 2 sec callback would be invoked at 2 sec event and 5 sec callback would be invoked at 5 sec event
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and HOLD" action.
+ * @param arg Parameter for callback function
+ *
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_press_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Single callback invoked according to the latest timer event on button release. 
+ *        Example: If a button is configured for 2 sec, 5 sec and 7 sec callbacks and if the button is released at 6 sec then only 5 sec callback would be invoked
+ *
+ * @param btn_handle handle of the button object
+ * @param press_sec the callback function would be called if you press the button for a specified period of time
+ * @param cb callback function for "PRESS and RELEASE" action.
+ * @param arg Parameter for callback function
+ * 
+ * @note
+ *        Button callback functions execute in the context of the timer service task.
+ *        It is therefore essential that button callback functions never attempt to block.
+ *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+ *        or specify a non zero block time when accessing a queue or a semaphore.
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_add_on_release_cb(button_handle_t btn_handle, uint32_t press_sec, button_cb cb, void* arg);
+
+/**
+ * @brief Delete button object and free memory
+ * @param btn_handle handle of the button object
+ *
+ * @return
+ *     - ESP_OK Success
+ *     - ESP_FAIL Parameter error
+ */
+esp_err_t iot_button_delete(button_handle_t btn_handle);
+
+/**
+ * @brief Remove callback
+ *
+ * @param btn_handle The handle of the button object
+ * @param type callback function event type
+ *
+ * @return
+ *     - ESP_OK Success
+ */
+esp_err_t iot_button_rm_cb(button_handle_t btn_handle, button_cb_type_t type);
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+
+/**
+ * class of button
+ * simple usage:
+ * CButton* btn = new CButton(BUTTON_IO_NUM, BUTTON_ACTIVE_LEVEL, BUTTON_SERIAL_TRIGGER, 3);
+ * btn->add_cb(BUTTON_CB_PUSH, button_tap_cb, (void*) push, 50 / portTICK_PERIOD_MS);
+ * btn->add_custom_cb(5, button_press_5s_cb, NULL);
+ * ......
+ * delete btn;
+ */
+class CButton
+{
+private:
+    button_handle_t m_btn_handle;
+
+    /**
+     * prevent copy constructing
+     */
+    CButton(const CButton&);
+    CButton& operator = (const CButton&);
+public:
+
+    /**
+     * @brief constructor of CButton
+     * 
+     * @param gpio_num GPIO index of the pin that the button uses
+     * @param active_level button hardware active level.
+     *        For "BUTTON_ACTIVE_LOW" it means when the button pressed, the GPIO will read low level.
+     */
+    CButton(gpio_num_t gpio_num, button_active_t active_level = BUTTON_ACTIVE_LOW);
+    
+    ~CButton();
+
+    /**
+     * @brief Register a callback function for a button_cb_type_t action.
+     *
+     * @param type callback function type
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_evt_cb(button_cb_type_t type, button_cb cb, void* arg);
+
+    /**
+     * @brief Register a callback function for a serial trigger event.
+     *
+     * @param btn_handle handle of the button object
+     * @param start_after_sec define the time after which to start serial trigger action
+     * @param interval_tick serial trigger interval
+     * @param cb callback function for "TAP" action.
+     * @param arg Parameter for callback function
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t set_serial_cb(button_cb cb, void* arg, TickType_t interval_tick, uint32_t start_after_sec);
+
+    /**
+     * @brief Callbacks invoked as timer events occur while button is pressed
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and HOLD" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_press_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Single callback invoked according to the latest timer event on button release.
+     *
+     * @param press_sec the callback function would be called if you press the button for a specified period of time
+     * @param cb callback function for "PRESS and RELEASE" action.
+     * @param arg Parameter for callback function
+     *
+     * @note
+     *        Button callback functions execute in the context of the timer service task.
+     *        It is therefore essential that button callback functions never attempt to block.
+     *        For example, a button callback function must not call vTaskDelay(), vTaskDelayUntil(),
+     *        or specify a non zero block time when accessing a queue or a semaphore.
+     * @return
+     *     - ESP_OK Success
+     *     - ESP_FAIL Parameter error
+     */
+    esp_err_t add_on_release_cb(uint32_t press_sec, button_cb cb, void* arg);
+    
+    /**
+     * @brief Remove callback
+     *
+     * @param type callback function event type
+     *
+     * @return
+     *     - ESP_OK Success
+     */
+    esp_err_t rm_cb(button_cb_type_t type);
+};
+#endif
+
+#endif

tools/sdk/esp32c3/include/config/sdkconfig.h

@@ -1,636 +0,0 @@
-/*
- * Automatically generated file. DO NOT EDIT.
- * Espressif IoT Development Framework (ESP-IDF) Configuration Header
- */
-#pragma once
-#define CONFIG_IDF_CMAKE 1
-#define CONFIG_IDF_TARGET_ARCH_RISCV 1
-#define CONFIG_IDF_TARGET "esp32c3"
-#define CONFIG_IDF_TARGET_ESP32C3 1
-#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0005
-#define CONFIG_SDK_TOOLPREFIX "riscv32-esp-elf-"
-#define CONFIG_APP_BUILD_TYPE_APP_2NDBOOT 1
-#define CONFIG_APP_BUILD_GENERATE_BINARIES 1
-#define CONFIG_APP_BUILD_BOOTLOADER 1
-#define CONFIG_APP_BUILD_USE_FLASH_SECTIONS 1
-#define CONFIG_APP_COMPILE_TIME_DATE 1
-#define CONFIG_APP_RETRIEVE_LEN_ELF_SHA 16
-#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0
-#define CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE 1
-#define CONFIG_BOOTLOADER_LOG_LEVEL_NONE 1
-#define CONFIG_BOOTLOADER_LOG_LEVEL 0
-#define CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V 1
-#define CONFIG_BOOTLOADER_WDT_ENABLE 1
-#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
-#define CONFIG_BOOTLOADER_RESERVE_RTC_SIZE 0x0
-#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
-#define CONFIG_SECURE_BOOT_SUPPORTS_RSA 1
-#define CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE 1
-#define CONFIG_BOOT_ROM_LOG_ALWAYS_ON 1
-#define CONFIG_ESPTOOLPY_BAUD_OTHER_VAL 115200
-#define CONFIG_ESPTOOLPY_FLASHMODE_DIO 1
-#define CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR 1
-#define CONFIG_ESPTOOLPY_FLASHMODE "dio"
-#define CONFIG_ESPTOOLPY_FLASHFREQ_80M 1
-#define CONFIG_ESPTOOLPY_FLASHFREQ "80m"
-#define CONFIG_ESPTOOLPY_FLASHSIZE_2MB 1
-#define CONFIG_ESPTOOLPY_FLASHSIZE "2MB"
-#define CONFIG_ESPTOOLPY_FLASHSIZE_DETECT 1
-#define CONFIG_ESPTOOLPY_BEFORE_RESET 1
-#define CONFIG_ESPTOOLPY_BEFORE "default_reset"
-#define CONFIG_ESPTOOLPY_AFTER_RESET 1
-#define CONFIG_ESPTOOLPY_AFTER "hard_reset"
-#define CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B 1
-#define CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL 115200
-#define CONFIG_ESPTOOLPY_MONITOR_BAUD 115200
-#define CONFIG_PARTITION_TABLE_SINGLE_APP 1
-#define CONFIG_PARTITION_TABLE_CUSTOM_FILENAME "partitions.csv"
-#define CONFIG_PARTITION_TABLE_FILENAME "partitions_singleapp.csv"
-#define CONFIG_PARTITION_TABLE_OFFSET 0x8000
-#define CONFIG_PARTITION_TABLE_MD5 1
-#define CONFIG_ENABLE_ARDUINO_DEPENDS 1
-#define CONFIG_AUTOSTART_ARDUINO 1
-#define CONFIG_ARDUINO_RUN_CORE0 1
-#define CONFIG_ARDUINO_RUNNING_CORE 0
-#define CONFIG_ARDUINO_LOOP_STACK_SIZE 8192
-#define CONFIG_ARDUINO_EVENT_RUN_CORE0 1
-#define CONFIG_ARDUINO_EVENT_RUNNING_CORE 0
-#define CONFIG_ARDUINO_UDP_RUN_CORE0 1
-#define CONFIG_ARDUINO_UDP_TASK_PRIORITY 3
-#define CONFIG_ARDUINO_UDP_RUNNING_CORE 0
-#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR 1
-#define CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL 1
-#define CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT 1
-#define CONFIG_ARDUHAL_PARTITION_SCHEME "default"
-#define CONFIG_COMPILER_OPTIMIZATION_SIZE 1
-#define CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE 1
-#define CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL 2
-#define CONFIG_COMPILER_HIDE_PATHS_MACROS 1
-#define CONFIG_COMPILER_STACK_CHECK_MODE_NONE 1
-#define CONFIG_APPTRACE_DEST_NONE 1
-#define CONFIG_APPTRACE_LOCK_ENABLE 1
-#define CONFIG_BT_ENABLED 1
-#define CONFIG_BT_SOC_SUPPORT_5_0 1
-#define CONFIG_BT_CTRL_MODE_EFF 1
-#define CONFIG_BT_CTRL_BLE_MAX_ACT 10
-#define CONFIG_BT_CTRL_BLE_MAX_ACT_EFF 10
-#define CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB 0
-#define CONFIG_BT_CTRL_PINNED_TO_CORE 0
-#define CONFIG_BT_CTRL_HCI_MODE_VHCI 1
-#define CONFIG_BT_CTRL_HCI_TL 1
-#define CONFIG_BT_CTRL_ADV_DUP_FILT_MAX 30
-#define CONFIG_BT_CTRL_HW_CCA_EFF 0
-#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG 1
-#define CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF 0
-#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0 1
-#define CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF 0
-#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0 1
-#define CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF 0
-#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3 1
-#define CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF 10
-#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP 1
-#define CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM 100
-#define CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD 20
-#define CONFIG_BT_CTRL_BLE_SCAN_DUPL 1
-#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE_DEVICE 1
-#define CONFIG_BT_CTRL_SCAN_DUPL_TYPE 0
-#define CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE 100
-#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS 1
-#define CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF 0
-#define CONFIG_BT_CTRL_SLEEP_MODE_EFF 0
-#define CONFIG_BT_CTRL_SLEEP_CLOCK_EFF 0
-#define CONFIG_BT_CTRL_HCI_TL_EFF 1
-#define CONFIG_BT_BLUEDROID_ENABLED 1
-#define CONFIG_BT_BTC_TASK_STACK_SIZE 3072
-#define CONFIG_BT_BLUEDROID_PINNED_TO_CORE 0
-#define CONFIG_BT_BTU_TASK_STACK_SIZE 4096
-#define CONFIG_BT_BLE_ENABLED 1
-#define CONFIG_BT_GATTS_ENABLE 1
-#define CONFIG_BT_BLE_BLUFI_ENABLE 1
-#define CONFIG_BT_GATT_MAX_SR_PROFILES 8
-#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO 1
-#define CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE 0
-#define CONFIG_BT_GATTC_ENABLE 1
-#define CONFIG_BT_GATTC_CONNECT_RETRY_COUNT 3
-#define CONFIG_BT_BLE_SMP_ENABLE 1
-#define CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_HCI_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_BTM_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_L2CAP_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_SDP_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_GAP_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_BNEP_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_PAN_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_A2D_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_AVDT_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_AVCT_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_AVRC_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_MCA_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_HID_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_APPL_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_GATT_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_SMP_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_BTIF_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_BTC_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_OSI_TRACE_LEVEL 2
-#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING 1
-#define CONFIG_BT_LOG_BLUFI_TRACE_LEVEL 2
-#define CONFIG_BT_ACL_CONNECTIONS 4
-#define CONFIG_BT_MULTI_CONNECTION_ENBALE 1
-#define CONFIG_BT_SMP_ENABLE 1
-#define CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT 30
-#define CONFIG_BT_BLE_RPA_SUPPORTED 1
-#define CONFIG_BT_BLE_50_FEATURES_SUPPORTED 1
-#define CONFIG_BT_BLE_42_FEATURES_SUPPORTED 1
-#define CONFIG_COAP_MBEDTLS_PSK 1
-#define CONFIG_COAP_LOG_DEFAULT_LEVEL 0
-#define CONFIG_ADC_DISABLE_DAC 1
-#define CONFIG_SPI_MASTER_ISR_IN_IRAM 1
-#define CONFIG_SPI_SLAVE_ISR_IN_IRAM 1
-#define CONFIG_EFUSE_MAX_BLK_LEN 256
-#define CONFIG_ESP_TLS_USING_MBEDTLS 1
-#define CONFIG_ESP_TLS_USE_DS_PERIPHERAL 1
-#define CONFIG_ESP_TLS_SERVER 1
-#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_160 1
-#define CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ 160
-#define CONFIG_ESP32C3_REV_MIN_3 1
-#define CONFIG_ESP32C3_REV_MIN 3
-#define CONFIG_ESP32C3_DEBUG_OCDAWARE 1
-#define CONFIG_ESP32C3_BROWNOUT_DET 1
-#define CONFIG_ESP32C3_BROWNOUT_DET_LVL_SEL_7 1
-#define CONFIG_ESP32C3_BROWNOUT_DET_LVL 7
-#define CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER 1
-#define CONFIG_ESP32C3_RTC_CLK_SRC_INT_RC 1
-#define CONFIG_ESP32C3_RTC_CLK_CAL_CYCLES 576
-#define CONFIG_ESP_ERR_TO_NAME_LOOKUP 1
-#define CONFIG_ETH_ENABLED 1
-#define CONFIG_ETH_USE_SPI_ETHERNET 1
-#define CONFIG_ESP_EVENT_POST_FROM_ISR 1
-#define CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR 1
-#define CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS 1
-#define CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH 1
-#define CONFIG_HTTPD_MAX_REQ_HDR_LEN 512
-#define CONFIG_HTTPD_MAX_URI_LEN 512
-#define CONFIG_HTTPD_ERR_RESP_NO_DELAY 1
-#define CONFIG_HTTPD_PURGE_BUF_LEN 32
-#define CONFIG_HTTPD_WS_SUPPORT 1
-#define CONFIG_ESP_HTTPS_SERVER_ENABLE 1
-#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA 1
-#define CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP 1
-#define CONFIG_ESP_MAC_ADDR_UNIVERSE_BT 1
-#define CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH 1
-#define CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR 1
-#define CONFIG_ESP32C3_UNIVERSAL_MAC_ADDRESSES 4
-#define CONFIG_ESP_SLEEP_POWER_DOWN_FLASH 1
-#define CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND 1
-#define CONFIG_ESP_IPC_TASK_STACK_SIZE 1024
-#define CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE 32
-#define CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL 120
-#define CONFIG_ESP_NETIF_TCPIP_LWIP 1
-#define CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER 1
-#define CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE 1
-#define CONFIG_ESP_PHY_MAX_WIFI_TX_POWER 20
-#define CONFIG_ESP_PHY_MAX_TX_POWER 20
-#define CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP 1
-#define CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT 1
-#define CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE 1
-#define CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK 1
-#define CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP 1
-#define CONFIG_ESP_SYSTEM_MEMPROT_DEPCHECK 1
-#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE 1
-#define CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK 1
-#define CONFIG_ESP_SYSTEM_MEMPROT_CPU_PREFETCH_PAD_SIZE 16
-#define CONFIG_ESP_SYSTEM_MEMPROT_MEM_ALIGN_SIZE 512
-#define CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE 32
-#define CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE 2304
-#define CONFIG_ESP_MAIN_TASK_STACK_SIZE 3584
-#define CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0 1
-#define CONFIG_ESP_MAIN_TASK_AFFINITY 0x0
-#define CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE 2048
-#define CONFIG_ESP_CONSOLE_UART_DEFAULT 1
-#define CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG 1
-#define CONFIG_ESP_CONSOLE_UART 1
-#define CONFIG_ESP_CONSOLE_UART_NUM 0
-#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
-#define CONFIG_ESP_INT_WDT 1
-#define CONFIG_ESP_INT_WDT_TIMEOUT_MS 300
-#define CONFIG_ESP_TASK_WDT 1
-#define CONFIG_ESP_TASK_WDT_TIMEOUT_S 5
-#define CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 1
-#define CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4 1
-#define CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER 1
-#define CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER 1
-#define CONFIG_ESP_TIMER_TASK_STACK_SIZE 3584
-#define CONFIG_ESP_TIMER_INTERRUPT_LEVEL 1
-#define CONFIG_ESP_TIMER_IMPL_SYSTIMER 1
-#define CONFIG_ESP32_WIFI_ENABLED 1
-#define CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE 1
-#define CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM 10
-#define CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM 32
-#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER 1
-#define CONFIG_ESP32_WIFI_TX_BUFFER_TYPE 1
-#define CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM 32
-#define CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED 1
-#define CONFIG_ESP32_WIFI_TX_BA_WIN 6
-#define CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED 1
-#define CONFIG_ESP32_WIFI_RX_BA_WIN 6
-#define CONFIG_ESP32_WIFI_NVS_ENABLED 1
-#define CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN 752
-#define CONFIG_ESP32_WIFI_MGMT_SBUF_NUM 32
-#define CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE 1
-#define CONFIG_ESP_WIFI_FTM_ENABLE 1
-#define CONFIG_ESP_WIFI_FTM_INITIATOR_SUPPORT 1
-#define CONFIG_ESP_WIFI_FTM_RESPONDER_SUPPORT 1
-#define CONFIG_ESP_WIFI_SOFTAP_SUPPORT 1
-#define CONFIG_ESP_COREDUMP_ENABLE_TO_NONE 1
-#define CONFIG_FATFS_CODEPAGE_437 1
-#define CONFIG_FATFS_CODEPAGE 437
-#define CONFIG_FATFS_LFN_HEAP 1
-#define CONFIG_FATFS_MAX_LFN 255
-#define CONFIG_FATFS_API_ENCODING_ANSI_OEM 1
-#define CONFIG_FATFS_FS_LOCK 0
-#define CONFIG_FATFS_TIMEOUT_MS 10000
-#define CONFIG_FATFS_PER_FILE_CACHE 1
-#define CONFIG_FMB_COMM_MODE_TCP_EN 1
-#define CONFIG_FMB_TCP_PORT_DEFAULT 502
-#define CONFIG_FMB_TCP_PORT_MAX_CONN 5
-#define CONFIG_FMB_TCP_CONNECTION_TOUT_SEC 20
-#define CONFIG_FMB_COMM_MODE_RTU_EN 1
-#define CONFIG_FMB_COMM_MODE_ASCII_EN 1
-#define CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND 150
-#define CONFIG_FMB_MASTER_DELAY_MS_CONVERT 200
-#define CONFIG_FMB_QUEUE_LENGTH 20
-#define CONFIG_FMB_PORT_TASK_STACK_SIZE 4096
-#define CONFIG_FMB_SERIAL_BUF_SIZE 256
-#define CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB 8
-#define CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS 1000
-#define CONFIG_FMB_PORT_TASK_PRIO 10
-#define CONFIG_FMB_PORT_TASK_AFFINITY 0x7FFFFFFF
-#define CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT 1
-#define CONFIG_FMB_CONTROLLER_SLAVE_ID 0x00112233
-#define CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT 20
-#define CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE 20
-#define CONFIG_FMB_CONTROLLER_STACK_SIZE 4096
-#define CONFIG_FMB_EVENT_QUEUE_TIMEOUT 20
-#define CONFIG_FMB_TIMER_PORT_ENABLED 1
-#define CONFIG_FMB_TIMER_GROUP 0
-#define CONFIG_FMB_TIMER_INDEX 0
-#define CONFIG_FMB_MASTER_TIMER_GROUP 0
-#define CONFIG_FMB_MASTER_TIMER_INDEX 0
-#define CONFIG_FREERTOS_UNICORE 1
-#define CONFIG_FREERTOS_NO_AFFINITY 0x7FFFFFFF
-#define CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER 1
-#define CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1 1
-#define CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER 1
-#define CONFIG_FREERTOS_OPTIMIZED_SCHEDULER 1
-#define CONFIG_FREERTOS_HZ 1000
-#define CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION 1
-#define CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY 1
-#define CONFIG_FREERTOS_INTERRUPT_BACKTRACE 1
-#define CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS 1
-#define CONFIG_FREERTOS_ASSERT_FAIL_ABORT 1
-#define CONFIG_FREERTOS_IDLE_TASK_STACKSIZE 2304
-#define CONFIG_FREERTOS_ISR_STACKSIZE 1536
-#define CONFIG_FREERTOS_MAX_TASK_NAME_LEN 16
-#define CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION 1
-#define CONFIG_FREERTOS_TIMER_TASK_PRIORITY 1
-#define CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH 2048
-#define CONFIG_FREERTOS_TIMER_QUEUE_LENGTH 10
-#define CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE 0
-#define CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER 1
-#define CONFIG_FREERTOS_DEBUG_OCDAWARE 1
-#define CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT 1
-#define CONFIG_HAL_ASSERTION_EQUALS_SYSTEM 1
-#define CONFIG_HAL_DEFAULT_ASSERTION_LEVEL 2
-#define CONFIG_HEAP_POISONING_DISABLED 1
-#define CONFIG_HEAP_TRACING_OFF 1
-#define CONFIG_LOG_DEFAULT_LEVEL_ERROR 1
-#define CONFIG_LOG_DEFAULT_LEVEL 1
-#define CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT 1
-#define CONFIG_LOG_MAXIMUM_LEVEL 1
-#define CONFIG_LOG_TIMESTAMP_SOURCE_RTOS 1
-#define CONFIG_LWIP_LOCAL_HOSTNAME "espressif"
-#define CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES 1
-#define CONFIG_LWIP_TIMERS_ONDEMAND 1
-#define CONFIG_LWIP_MAX_SOCKETS 16
-#define CONFIG_LWIP_SO_REUSE 1
-#define CONFIG_LWIP_SO_REUSE_RXTOALL 1
-#define CONFIG_LWIP_SO_RCVBUF 1
-#define CONFIG_LWIP_IP4_FRAG 1
-#define CONFIG_LWIP_IP6_FRAG 1
-#define CONFIG_LWIP_ESP_GRATUITOUS_ARP 1
-#define CONFIG_LWIP_GARP_TMR_INTERVAL 60
-#define CONFIG_LWIP_TCPIP_RECVMBOX_SIZE 32
-#define CONFIG_LWIP_DHCP_DOES_ARP_CHECK 1
-#define CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID 1
-#define CONFIG_LWIP_DHCP_OPTIONS_LEN 128
-#define CONFIG_LWIP_DHCPS 1
-#define CONFIG_LWIP_DHCPS_LEASE_UNIT 60
-#define CONFIG_LWIP_DHCPS_MAX_STATION_NUM 8
-#define CONFIG_LWIP_IPV6 1
-#define CONFIG_LWIP_IPV6_NUM_ADDRESSES 3
-#define CONFIG_LWIP_NETIF_LOOPBACK 1
-#define CONFIG_LWIP_LOOPBACK_MAX_PBUFS 8
-#define CONFIG_LWIP_MAX_ACTIVE_TCP 16
-#define CONFIG_LWIP_MAX_LISTENING_TCP 16
-#define CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION 1
-#define CONFIG_LWIP_TCP_MAXRTX 12
-#define CONFIG_LWIP_TCP_SYNMAXRTX 12
-#define CONFIG_LWIP_TCP_MSS 1440
-#define CONFIG_LWIP_TCP_TMR_INTERVAL 250
-#define CONFIG_LWIP_TCP_MSL 60000
-#define CONFIG_LWIP_TCP_SND_BUF_DEFAULT 5744
-#define CONFIG_LWIP_TCP_WND_DEFAULT 5744
-#define CONFIG_LWIP_TCP_RECVMBOX_SIZE 6
-#define CONFIG_LWIP_TCP_QUEUE_OOSEQ 1
-#define CONFIG_LWIP_TCP_OVERSIZE_MSS 1
-#define CONFIG_LWIP_TCP_RTO_TIME 1500
-#define CONFIG_LWIP_MAX_UDP_PCBS 16
-#define CONFIG_LWIP_UDP_RECVMBOX_SIZE 6
-#define CONFIG_LWIP_CHECKSUM_CHECK_ICMP 1
-#define CONFIG_LWIP_TCPIP_TASK_STACK_SIZE 3072
-#define CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY 1
-#define CONFIG_LWIP_TCPIP_TASK_AFFINITY 0x7FFFFFFF
-#define CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE 3
-#define CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS 5
-#define CONFIG_LWIP_ICMP 1
-#define CONFIG_LWIP_MAX_RAW_PCBS 16
-#define CONFIG_LWIP_SNTP_MAX_SERVERS 3
-#define CONFIG_LWIP_DHCP_GET_NTP_SRV 1
-#define CONFIG_LWIP_DHCP_MAX_NTP_SERVERS 1
-#define CONFIG_LWIP_SNTP_UPDATE_DELAY 3600000
-#define CONFIG_LWIP_ESP_LWIP_ASSERT 1
-#define CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT 1
-#define CONFIG_LWIP_HOOK_IP6_ROUTE_NONE 1
-#define CONFIG_LWIP_HOOK_ND6_GET_GW_NONE 1
-#define CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE 1
-#define CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC 1
-#define CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN 1
-#define CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN 16384
-#define CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN 4096
-#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE 1
-#define CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL 1
-#define CONFIG_MBEDTLS_HARDWARE_AES 1
-#define CONFIG_MBEDTLS_AES_USE_INTERRUPT 1
-#define CONFIG_MBEDTLS_HARDWARE_MPI 1
-#define CONFIG_MBEDTLS_HARDWARE_SHA 1
-#define CONFIG_MBEDTLS_ROM_MD5 1
-#define CONFIG_MBEDTLS_HAVE_TIME 1
-#define CONFIG_MBEDTLS_ECDSA_DETERMINISTIC 1
-#define CONFIG_MBEDTLS_SHA512_C 1
-#define CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT 1
-#define CONFIG_MBEDTLS_TLS_SERVER 1
-#define CONFIG_MBEDTLS_TLS_CLIENT 1
-#define CONFIG_MBEDTLS_TLS_ENABLED 1
-#define CONFIG_MBEDTLS_PSK_MODES 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_PSK 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_RSA 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA 1
-#define CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA 1
-#define CONFIG_MBEDTLS_SSL_RENEGOTIATION 1
-#define CONFIG_MBEDTLS_SSL_PROTO_TLS1 1
-#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 1
-#define CONFIG_MBEDTLS_SSL_PROTO_TLS1_2 1
-#define CONFIG_MBEDTLS_SSL_ALPN 1
-#define CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS 1
-#define CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE 1
-#define CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE 1
-#define CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS 1
-#define CONFIG_MBEDTLS_AES_C 1
-#define CONFIG_MBEDTLS_CAMELLIA_C 1
-#define CONFIG_MBEDTLS_RC4_DISABLED 1
-#define CONFIG_MBEDTLS_CCM_C 1
-#define CONFIG_MBEDTLS_GCM_C 1
-#define CONFIG_MBEDTLS_PEM_PARSE_C 1
-#define CONFIG_MBEDTLS_PEM_WRITE_C 1
-#define CONFIG_MBEDTLS_X509_CRL_PARSE_C 1
-#define CONFIG_MBEDTLS_X509_CSR_PARSE_C 1
-#define CONFIG_MBEDTLS_ECP_C 1
-#define CONFIG_MBEDTLS_ECDH_C 1
-#define CONFIG_MBEDTLS_ECDSA_C 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED 1
-#define CONFIG_MBEDTLS_ECP_NIST_OPTIM 1
-#define CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI 1
-#define CONFIG_MDNS_MAX_SERVICES 10
-#define CONFIG_MDNS_TASK_PRIORITY 1
-#define CONFIG_MDNS_TASK_STACK_SIZE 4096
-#define CONFIG_MDNS_TASK_AFFINITY_CPU0 1
-#define CONFIG_MDNS_TASK_AFFINITY 0x0
-#define CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS 2000
-#define CONFIG_MDNS_TIMER_PERIOD_MS 100
-#define CONFIG_MDNS_MULTIPLE_INSTANCE 1
-#define CONFIG_MQTT_PROTOCOL_311 1
-#define CONFIG_MQTT_TRANSPORT_SSL 1
-#define CONFIG_MQTT_TRANSPORT_WEBSOCKET 1
-#define CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE 1
-#define CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF 1
-#define CONFIG_NEWLIB_STDIN_LINE_ENDING_CR 1
-#define CONFIG_OPENSSL_ERROR_STACK 1
-#define CONFIG_OPENSSL_ASSERT_EXIT 1
-#define CONFIG_PTHREAD_TASK_PRIO_DEFAULT 5
-#define CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT 3072
-#define CONFIG_PTHREAD_STACK_MIN 768
-#define CONFIG_PTHREAD_TASK_CORE_DEFAULT -1
-#define CONFIG_PTHREAD_TASK_NAME_DEFAULT "pthread"
-#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
-#define CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS 1
-#define CONFIG_SPI_FLASH_YIELD_DURING_ERASE 1
-#define CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS 20
-#define CONFIG_SPI_FLASH_ERASE_YIELD_TICKS 1
-#define CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE 8192
-#define CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP 1
-#define CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP 1
-#define CONFIG_SPI_FLASH_SUPPORT_GD_CHIP 1
-#define CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP 1
-#define CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP 1
-#define CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE 1
-#define CONFIG_SPIFFS_MAX_PARTITIONS 3
-#define CONFIG_SPIFFS_CACHE 1
-#define CONFIG_SPIFFS_CACHE_WR 1
-#define CONFIG_SPIFFS_PAGE_CHECK 1
-#define CONFIG_SPIFFS_GC_MAX_RUNS 10
-#define CONFIG_SPIFFS_PAGE_SIZE 256
-#define CONFIG_SPIFFS_OBJ_NAME_LEN 32
-#define CONFIG_SPIFFS_USE_MAGIC 1
-#define CONFIG_SPIFFS_USE_MAGIC_LENGTH 1
-#define CONFIG_SPIFFS_META_LENGTH 4
-#define CONFIG_SPIFFS_USE_MTIME 1
-#define CONFIG_WS_TRANSPORT 1
-#define CONFIG_WS_BUFFER_SIZE 1024
-#define CONFIG_UNITY_ENABLE_FLOAT 1
-#define CONFIG_UNITY_ENABLE_DOUBLE 1
-#define CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER 1
-#define CONFIG_VFS_SUPPORT_IO 1
-#define CONFIG_VFS_SUPPORT_DIR 1
-#define CONFIG_VFS_SUPPORT_SELECT 1
-#define CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT 1
-#define CONFIG_VFS_SUPPORT_TERMIOS 1
-#define CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS 1
-#define CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN 128
-#define CONFIG_WL_SECTOR_SIZE_4096 1
-#define CONFIG_WL_SECTOR_SIZE 4096
-#define CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES 16
-#define CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT 30
-#define CONFIG_WPA_MBEDTLS_CRYPTO 1
-#define CONFIG_LITTLEFS_MAX_PARTITIONS 3
-#define CONFIG_LITTLEFS_PAGE_SIZE 256
-#define CONFIG_LITTLEFS_OBJ_NAME_LEN 64
-#define CONFIG_LITTLEFS_READ_SIZE 128
-#define CONFIG_LITTLEFS_WRITE_SIZE 128
-#define CONFIG_LITTLEFS_LOOKAHEAD_SIZE 128
-#define CONFIG_LITTLEFS_CACHE_SIZE 512
-#define CONFIG_LITTLEFS_BLOCK_CYCLES 512
-#define CONFIG_LITTLEFS_USE_MTIME 1
-#define CONFIG_LITTLEFS_MTIME_USE_SECONDS 1
-
-/* List of deprecated options */
-#define CONFIG_A2D_TRACE_LEVEL_WARNING CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING
-#define CONFIG_ADC2_DISABLE_DAC CONFIG_ADC_DISABLE_DAC
-#define CONFIG_APPL_TRACE_LEVEL_WARNING CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING
-#define CONFIG_AVCT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING
-#define CONFIG_AVDT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING
-#define CONFIG_AVRC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING
-#define CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT
-#define CONFIG_BLE_SMP_ENABLE CONFIG_BT_BLE_SMP_ENABLE
-#define CONFIG_BLUEDROID_ENABLED CONFIG_BT_BLUEDROID_ENABLED
-#define CONFIG_BLUFI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING
-#define CONFIG_BTC_TASK_STACK_SIZE CONFIG_BT_BTC_TASK_STACK_SIZE
-#define CONFIG_BTC_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING
-#define CONFIG_BTIF_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING
-#define CONFIG_BTM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING
-#define CONFIG_BTU_TASK_STACK_SIZE CONFIG_BT_BTU_TASK_STACK_SIZE
-#define CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
-#define CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT
-#define CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND
-#define CONFIG_ESP32C3_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
-#define CONFIG_ESP32C3_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
-#define CONFIG_ESP32H2_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
-#define CONFIG_ESP32H2_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
-#define CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
-#define CONFIG_ESP32S2_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPROT_FEATURE
-#define CONFIG_ESP32S2_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK
-#define CONFIG_ESP32S2_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
-#define CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP
-#define CONFIG_ESP32_APPTRACE_DEST_NONE CONFIG_APPTRACE_DEST_NONE
-#define CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE CONFIG_ESP_COREDUMP_ENABLE_TO_NONE
-#define CONFIG_ESP32_PANIC_PRINT_REBOOT CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT
-#define CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE
-#define CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER CONFIG_ESP_PHY_MAX_WIFI_TX_POWER
-#define CONFIG_ESP32_PTHREAD_STACK_MIN CONFIG_PTHREAD_STACK_MIN
-#define CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT CONFIG_PTHREAD_TASK_NAME_DEFAULT
-#define CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT CONFIG_PTHREAD_TASK_PRIO_DEFAULT
-#define CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT
-#define CONFIG_ESP_GRATUITOUS_ARP CONFIG_LWIP_ESP_GRATUITOUS_ARP
-#define CONFIG_ESP_SYSTEM_PD_FLASH CONFIG_ESP_SLEEP_POWER_DOWN_FLASH
-#define CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
-#define CONFIG_FLASHMODE_DIO CONFIG_ESPTOOLPY_FLASHMODE_DIO
-#define CONFIG_GAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING
-#define CONFIG_GARP_TMR_INTERVAL CONFIG_LWIP_GARP_TMR_INTERVAL
-#define CONFIG_GATTC_ENABLE CONFIG_BT_GATTC_ENABLE
-#define CONFIG_GATTS_ENABLE CONFIG_BT_GATTS_ENABLE
-#define CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO
-#define CONFIG_GATT_TRACE_LEVEL_WARNING CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING
-#define CONFIG_HCI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING
-#define CONFIG_HID_TRACE_LEVEL_WARNING CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING
-#define CONFIG_INT_WDT CONFIG_ESP_INT_WDT
-#define CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS
-#define CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE
-#define CONFIG_L2CAP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING
-#define CONFIG_LOG_BOOTLOADER_LEVEL_NONE CONFIG_BOOTLOADER_LOG_LEVEL_NONE
-#define CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE
-#define CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE
-#define CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT
-#define CONFIG_MB_CONTROLLER_SLAVE_ID CONFIG_FMB_CONTROLLER_SLAVE_ID
-#define CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT
-#define CONFIG_MB_CONTROLLER_STACK_SIZE CONFIG_FMB_CONTROLLER_STACK_SIZE
-#define CONFIG_MB_EVENT_QUEUE_TIMEOUT CONFIG_FMB_EVENT_QUEUE_TIMEOUT
-#define CONFIG_MB_MASTER_DELAY_MS_CONVERT CONFIG_FMB_MASTER_DELAY_MS_CONVERT
-#define CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND
-#define CONFIG_MB_QUEUE_LENGTH CONFIG_FMB_QUEUE_LENGTH
-#define CONFIG_MB_SERIAL_BUF_SIZE CONFIG_FMB_SERIAL_BUF_SIZE
-#define CONFIG_MB_SERIAL_TASK_PRIO CONFIG_FMB_PORT_TASK_PRIO
-#define CONFIG_MB_SERIAL_TASK_STACK_SIZE CONFIG_FMB_PORT_TASK_STACK_SIZE
-#define CONFIG_MB_TIMER_GROUP CONFIG_FMB_TIMER_GROUP
-#define CONFIG_MB_TIMER_INDEX CONFIG_FMB_TIMER_INDEX
-#define CONFIG_MB_TIMER_PORT_ENABLED CONFIG_FMB_TIMER_PORT_ENABLED
-#define CONFIG_MCA_TRACE_LEVEL_WARNING CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING
-#define CONFIG_MONITOR_BAUD_115200B CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B
-#define CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE
-#define CONFIG_OPTIMIZATION_LEVEL_RELEASE CONFIG_COMPILER_OPTIMIZATION_SIZE
-#define CONFIG_OSI_TRACE_LEVEL_WARNING CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING
-#define CONFIG_PAN_TRACE_LEVEL_WARNING CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING
-#define CONFIG_POST_EVENTS_FROM_IRAM_ISR CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR
-#define CONFIG_POST_EVENTS_FROM_ISR CONFIG_ESP_EVENT_POST_FROM_ISR
-#define CONFIG_RFCOMM_TRACE_LEVEL_WARNING CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING
-#define CONFIG_SDP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING
-#define CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN
-#define CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS
-#define CONFIG_SMP_TRACE_LEVEL_WARNING CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING
-#define CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS
-#define CONFIG_STACK_CHECK_NONE CONFIG_COMPILER_STACK_CHECK_MODE_NONE
-#define CONFIG_SUPPORT_TERMIOS CONFIG_VFS_SUPPORT_TERMIOS
-#define CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT
-#define CONFIG_SW_COEXIST_ENABLE CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE
-#define CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE
-#define CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE
-#define CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT
-#define CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0
-#define CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S
-#define CONFIG_TCPIP_RECVMBOX_SIZE CONFIG_LWIP_TCPIP_RECVMBOX_SIZE
-#define CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY
-#define CONFIG_TCPIP_TASK_STACK_SIZE CONFIG_LWIP_TCPIP_TASK_STACK_SIZE
-#define CONFIG_TCP_MAXRTX CONFIG_LWIP_TCP_MAXRTX
-#define CONFIG_TCP_MSL CONFIG_LWIP_TCP_MSL
-#define CONFIG_TCP_MSS CONFIG_LWIP_TCP_MSS
-#define CONFIG_TCP_OVERSIZE_MSS CONFIG_LWIP_TCP_OVERSIZE_MSS
-#define CONFIG_TCP_QUEUE_OOSEQ CONFIG_LWIP_TCP_QUEUE_OOSEQ
-#define CONFIG_TCP_RECVMBOX_SIZE CONFIG_LWIP_TCP_RECVMBOX_SIZE
-#define CONFIG_TCP_SND_BUF_DEFAULT CONFIG_LWIP_TCP_SND_BUF_DEFAULT
-#define CONFIG_TCP_SYNMAXRTX CONFIG_LWIP_TCP_SYNMAXRTX
-#define CONFIG_TCP_WND_DEFAULT CONFIG_LWIP_TCP_WND_DEFAULT
-#define CONFIG_TIMER_QUEUE_LENGTH CONFIG_FREERTOS_TIMER_QUEUE_LENGTH
-#define CONFIG_TIMER_TASK_PRIORITY CONFIG_FREERTOS_TIMER_TASK_PRIORITY
-#define CONFIG_TIMER_TASK_STACK_DEPTH CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH
-#define CONFIG_TIMER_TASK_STACK_SIZE CONFIG_ESP_TIMER_TASK_STACK_SIZE
-#define CONFIG_TOOLPREFIX CONFIG_SDK_TOOLPREFIX
-#define CONFIG_UDP_RECVMBOX_SIZE CONFIG_LWIP_UDP_RECVMBOX_SIZE
-#define CONFIG_ARDUINO_IDF_COMMIT "f3e0c8bc41"
-#define CONFIG_ARDUINO_IDF_BRANCH "release/v4.4"

tools/sdk/esp32c3/include/driver/include/driver/i2s.h

@@ -78,7 +78,7 @@ typedef struct  {
  *
  */
 typedef struct {
-    int mck_io_num;     /*!< MCK in out pin*/
+    int mck_io_num;     /*!< MCK in out pin. Note that ESP32 supports setting MCK on GPIO0/GPIO1/GPIO3 only*/
     int bck_io_num;     /*!< BCK in out pin*/
     int ws_io_num;      /*!< WS in out pin*/
     int data_out_num;   /*!< DATA out pin*/
@@ -97,8 +97,22 @@ typedef struct {
     i2s_channel_fmt_t       channel_format;             /*!< I2S channel format.*/
     i2s_comm_format_t       communication_format;       /*!< I2S communication format */
     int                     intr_alloc_flags;           /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
-    int                     dma_buf_count;              /*!< I2S DMA Buffer Count */
-    int                     dma_buf_len;                /*!< I2S DMA Buffer Length */
+    int                     dma_buf_count;              /**< The total number of DMA buffers to receive/transmit data.
+                                                          * A descriptor includes some information such as buffer address,
+                                                          * the address of the next descriptor, and the buffer length.
+                                                          * Since one descriptor points to one buffer, therefore, 'dma_desc_num' can be interpreted as the total number of DMA buffers used to store data from DMA interrupt.
+                                                          * Notice that these buffers are internal to'i2s_read' and descriptors are created automatically inside of the I2S driver.
+                                                          * Users only need to set the buffer number while the length is derived from the parameter described below.
+                                                          */
+    int                     dma_buf_len;                /**< Number of frames in a DMA buffer.
+                                                          *  A frame means the data of all channels in a WS cycle.
+                                                          *  The real_dma_buf_size = dma_buf_len * chan_num * bits_per_chan / 8.
+                                                          *  For example, if two channels in stereo mode (i.e., 'channel_format' is set to 'I2S_CHANNEL_FMT_RIGHT_LEFT') are active,
+                                                          *  and each channel transfers 32 bits (i.e., 'bits_per_sample' is set to 'I2S_BITS_PER_CHAN_32BIT'),
+                                                          *  then the total number of bytes of a frame is 'channel_format' * 'bits_per_sample' = 2 * 32 / 8 = 8 bytes.
+                                                          *  We assume that the current 'dma_buf_len' is 100, then the real length of the DMA buffer is 8 * 100 = 800 bytes.
+                                                          *  Note that the length of an internal real DMA buffer shouldn't be greater than 4092.
+                                                          */
     bool                    use_apll;                   /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
     bool                    tx_desc_auto_clear;         /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
     int                     fixed_mclk;                 /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */

tools/sdk/esp32c3/include/driver/include/driver/ledc.h

@@ -85,6 +85,7 @@ esp_err_t ledc_timer_config(const ledc_timer_config_t* timer_conf);
  * @brief LEDC update channel parameters
  * @note  Call this function to activate the LEDC updated parameters.
  *        After ledc_set_duty, we need to call this function to update the settings.
+ *        And the new LEDC parameters don't take effect until the next PWM cycle.
  * @note  ledc_set_duty, ledc_set_duty_with_hpoint and ledc_update_duty are not thread-safe, do not call these functions to
  *        control one LEDC channel in different tasks at the same time.
  *        A thread-safe version of API is ledc_set_duty_and_update
@@ -203,6 +204,9 @@ esp_err_t ledc_set_duty(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t
 
 /**
  * @brief LEDC get duty
+ *        This function returns the duty at the present PWM cycle.
+ *        You shouldn't expect the function to return the new duty in the same cycle of calling ledc_update_duty,
+ *        because duty update doesn't take effect until the next cycle.
  *
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel (0 - LEDC_CHANNEL_MAX-1), select from ledc_channel_t
@@ -385,7 +389,8 @@ void ledc_fade_func_uninstall(void);
  *        Other duty operations will have to wait until the fade operation has finished.
  * @param speed_mode Select the LEDC channel group with specified speed mode. Note that not all targets support high speed mode.
  * @param channel LEDC channel number
- * @param fade_mode Whether to block until fading done.
+ * @param fade_mode Whether to block until fading done. See ledc_types.h ledc_fade_mode_t for more info.
+ *        Note that this function will not return until fading to the target duty if LEDC_FADE_WAIT_DONE mode is selected.
  *
  * @return
  *     - ESP_OK Success
@@ -443,9 +448,6 @@ esp_err_t ledc_set_fade_time_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t channel, uint32_t target_duty, uint32_t scale, uint32_t cycle_num, ledc_fade_mode_t fade_mode);
-#ifdef __cplusplus
-}
-#endif
 
 /**
  * @brief LEDC callback registration function
@@ -461,3 +463,6 @@ esp_err_t ledc_set_fade_step_and_start(ledc_mode_t speed_mode, ledc_channel_t ch
  *     - ESP_FAIL Fade function init error
  */
 esp_err_t ledc_cb_register(ledc_mode_t speed_mode, ledc_channel_t channel, ledc_cbs_t *cbs, void *user_arg);
+#ifdef __cplusplus
+}
+#endif

tools/sdk/esp32c3/include/efuse/esp32c3/include/esp_efuse_table.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,7 +9,7 @@ extern "C" {
 #endif
 
 
-// md5_digest_table ef33779021404fbaddc878eefebaddc1
+// md5_digest_table 720eb12a076091cb1a236c15d9fa3308
 // This file was generated from the file esp_efuse_table.csv. DO NOT CHANGE THIS FILE MANUALLY.
 // If you want to change some fields, you need to change esp_efuse_table.csv file
 // then run `efuse_common_table` or `efuse_custom_table` command it will generate this file.
@@ -56,7 +56,6 @@ extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_JTAG[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_ICACHE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DEVICE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_FORCE_DOWNLOAD[];
-extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_CAN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_JTAG_SEL_ENABLE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SOFT_DIS_JTAG[];
@@ -86,14 +85,9 @@ extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TPUW[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_LEGACY_SPI_BOOT[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CHANNEL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_DIS_USB_DOWNLOAD_MODE[];
 extern const esp_efuse_desc_t* ESP_EFUSE_ENABLE_SECURITY_DOWNLOAD[];
 extern const esp_efuse_desc_t* ESP_EFUSE_UART_PRINT_CONTROL[];
-extern const esp_efuse_desc_t* ESP_EFUSE_PIN_POWER_SELECTION[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_TYPE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_PAGE_SIZE[];
-extern const esp_efuse_desc_t* ESP_EFUSE_FLASH_ECC_EN[];
 extern const esp_efuse_desc_t* ESP_EFUSE_FORCE_SEND_RESUME[];
 extern const esp_efuse_desc_t* ESP_EFUSE_SECURE_VERSION[];
 extern const esp_efuse_desc_t* ESP_EFUSE_MAC_FACTORY[];

tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_common.h

@@ -0,0 +1,66 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsp_common_H_
+#define _dsp_common_H_
+#include <stdint.h>
+#include <stdbool.h>
+#include "dsp_err.h"
+#include "esp_idf_version.h"
+
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
+#include "soc/cpu.h"
+#endif
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief      check power of two
+ * The function check if the argument is power of 2.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @return
+ *      - true if x is power of two
+ *      - false if no
+ */
+bool dsp_is_power_of_two(int x);
+
+
+/**
+ * @brief      Power of two
+ * The function return power of 2 for values 2^N.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @return
+ *      - power of two
+ */
+int dsp_power_of_two(int x);
+
+#ifdef __cplusplus
+}
+#endif
+
+// esp_cpu_get_ccount function is implemented in IDF 4.1 and later
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 1, 0)
+#define dsp_get_cpu_cycle_count  esp_cpu_get_ccount
+#else
+#define dsp_get_cpu_cycle_count  xthal_get_ccount
+#endif
+
+#endif // _dsp_common_H_

tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err.h

@@ -0,0 +1,23 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _DSP_ERR_H_
+#define _DSP_ERR_H_
+
+#include "stdint.h"
+#include "esp_err.h"
+#include "dsp_err_codes.h"
+
+#endif // _DSP_ERR_H_

tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_err_codes.h

@@ -0,0 +1,27 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsp_error_codes_H_
+#define _dsp_error_codes_H_
+
+#define DSP_OK                          0 // For internal use only. Please use ESP_OK instead
+#define ESP_ERR_DSP_BASE                0x70000
+#define ESP_ERR_DSP_INVALID_LENGTH      (ESP_ERR_DSP_BASE + 1)
+#define ESP_ERR_DSP_INVALID_PARAM       (ESP_ERR_DSP_BASE + 2)
+#define ESP_ERR_DSP_PARAM_OUTOFRANGE    (ESP_ERR_DSP_BASE + 3)
+#define ESP_ERR_DSP_UNINITIALIZED       (ESP_ERR_DSP_BASE + 4)
+#define ESP_ERR_DSP_REINITIALIZED       (ESP_ERR_DSP_BASE + 5)
+
+
+#endif // _dsp_error_codes_H_

tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_platform.h

@@ -0,0 +1,30 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef dsp_platform_h_
+#define dsp_platform_h_
+#include "esp_idf_version.h"
+#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0)
+#include "esp_cpu.h"
+#else
+#include "soc/cpu.h"
+#endif
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/portable.h"
+#include "freertos/task.h"
+#include "freertos/semphr.h"
+
+#endif // dsp_platform_h_

tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_tests.h

@@ -0,0 +1,37 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSP_TESTS_H_
+#define _DSP_TESTS_H_
+
+#include <stdlib.h>
+#include "esp_idf_version.h"
+
+#define TEST_ASSERT_EXEC_IN_RANGE(min_exec, max_exec, actual) \
+    if (actual >= max_exec) { \
+        ESP_LOGE("", "Time error. Expected max: %i, reached: %i", (int)max_exec, (int)actual);\
+        TEST_ASSERT_MESSAGE (false, "Exec time takes more than expected! ");\
+    }\
+    if (actual < min_exec) {\
+        ESP_LOGE("", "Time error. Expected min: %i, reached: %i", (int)min_exec, (int)actual);\
+        TEST_ASSERT_MESSAGE (false, "Exec time takes less then expected!");\
+    }
+
+
+// memalign function is implemented in IDF 4.3 and later
+#if ESP_IDF_VERSION <= ESP_IDF_VERSION_VAL(4, 3, 0)
+#define memalign(align_, size_) malloc(size_)
+#endif
+
+#endif // _DSP_TESTS_H_

tools/sdk/esp32c3/include/esp-dsp/modules/common/include/dsp_types.h

@@ -0,0 +1,39 @@
+#ifndef _dsp_types_H_
+#define _dsp_types_H_
+#include <stdint.h>
+#include <stdbool.h>
+
+// union to simplify access to the 16 bit data
+typedef union sc16_u
+{
+    struct
+    {
+        int16_t re;
+        int16_t im;
+    };
+    uint32_t data;
+}sc16_t;
+
+typedef union fc32_u
+{
+    struct
+    {
+        float re;
+        float im;
+    };
+    uint64_t data;
+}fc32_t;
+
+typedef struct image2d_s
+{
+    void* data; // could be int8_t, unt8_t, int16_t, unt16_t, float
+    int step_x; // step of elements by X
+    int step_y; // step of elements by Y, usually is 1
+    int stride_x; // stride width: size of the elements in X axis * by step_x + padding
+    int stride_y; // stride height: size of the elements in Y axis * by step_y + padding
+    // Point[x,y] = data[width*y*step_y + x*step_x];
+    // Full data size = width*height
+
+} image2d_t;
+
+#endif // _dsp_types_H_

tools/sdk/esp32c3/include/esp-dsp/modules/common/include/esp_dsp.h

@@ -0,0 +1,64 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _esp_dsp_H_
+#define _esp_dsp_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+// Common includes
+#include "dsp_common.h"
+
+// Signal processing
+#include "dsps_dotprod.h"
+#include "dsps_math.h"
+#include "dsps_fir.h"
+#include "dsps_biquad.h"
+#include "dsps_biquad_gen.h"
+#include "dsps_wind.h"
+#include "dsps_conv.h"
+#include "dsps_corr.h"
+
+#include "dsps_d_gen.h"
+#include "dsps_h_gen.h"
+#include "dsps_tone_gen.h"
+#include "dsps_snr.h"
+#include "dsps_sfdr.h"
+
+#include "dsps_fft2r.h"
+#include "dsps_fft4r.h"
+#include "dsps_dct.h"
+
+// Matrix operations
+#include "dspm_mult.h"
+
+// Support functions
+#include "dsps_view.h"
+
+// Image processing functions:
+#include "dspi_dotprod.h"
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifdef __cplusplus
+#include "mat.h"
+#endif
+
+#endif // _esp_dsp_H_

tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_ccorr.h

@@ -0,0 +1,63 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_ccorr_H_
+#define _dsps_ccorr_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Cross correlation
+ *
+ * The function make cross correlate between two ignals.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal1: input array with input 1 signal values
+ * @param[in] siglen1: length of the input 1 signal array
+ * @param[in] Signal2: input array with input 2 signal values
+ * @param[in] siglen2: length of the input  signal array
+ * @param corrout: output array with result of cross correlation. The size of dest array must be (siglen1 + siglen2 - 1) !!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library (one of the input array are NULL, or if (siglen < patlen))
+ */
+esp_err_t dsps_ccorr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *corrout);
+esp_err_t dsps_ccorr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *corrout);
+/**}@*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#if (dsps_ccorr_f32_ae32_enabled == 1)
+#define dsps_ccorr_f32 dsps_ccorr_f32_ae32
+#else
+#define dsps_ccorr_f32 dsps_ccorr_f32_ansi
+#endif // dsps_ccorr_f32_ae32_enabled
+#else
+#define dsps_ccorr_f32 dsps_ccorr_f32_ansi
+#endif
+
+#endif // _dsps_conv_H_

tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv.h

@@ -0,0 +1,65 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_conv_H_
+#define _dsps_conv_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Convolution
+ *
+ * The function convolve Signal array with Kernel array.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal:  input array with signal
+ * @param[in] siglen:  length of the input signal
+ * @param[in] Kernel:  input array with convolution kernel
+ * @param[in] kernlen: length of the Kernel array
+ * @param convout: output array with convolution result length of (siglen + Kernel -1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_conv_f32_ae32(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
+esp_err_t dsps_conv_f32_ansi(const float *Signal, const int siglen, const float *Kernel, const int kernlen, float *convout);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+
+#if (dsps_conv_f32_ae32_enabled == 1)
+#define dsps_conv_f32 dsps_conv_f32_ae32
+#else
+#define dsps_conv_f32 dsps_conv_f32_ansi
+#endif // dsps_conv_f32_ae32_enabled
+
+#else
+#define dsps_conv_f32 dsps_conv_f32_ansi
+#endif
+
+#endif // _dsps_conv_H_

tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_conv_platform.h

@@ -0,0 +1,20 @@
+#ifndef _dsps_conv_platform_H_
+#define _dsps_conv_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_conv_f32_ae32_enabled  1
+#define dsps_ccorr_f32_ae32_enabled  1
+#define dsps_corr_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+#endif // _dsps_conv_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/conv/include/dsps_corr.h

@@ -0,0 +1,63 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_corr_H_
+#define _dsps_corr_H_
+#include "dsp_err.h"
+
+#include "dsps_conv_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   Correlation with pattern
+ *
+ * The function correlate input sigla array with pattern array.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] Signal: input array with signal values
+ * @param[in] siglen: length of the signal array
+ * @param[in] Pattern: input array with pattern values
+ * @param[in] patlen: length of the pattern array. The siglen must be bigger then patlen!
+ * @param dest: output array with result of correlation
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library (one of the input array are NULL, or if (siglen < patlen))
+ */
+esp_err_t dsps_corr_f32_ansi(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
+esp_err_t dsps_corr_f32_ae32(const float *Signal, const int siglen, const float *Pattern, const int patlen, float *dest);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#if (dsps_corr_f32_ae32_enabled == 1)
+#define dsps_corr_f32 dsps_corr_f32_ae32
+#else
+#define dsps_corr_f32 dsps_corr_f32_ansi
+#endif // dsps_corr_f32_ae32_enabled
+#else
+#define dsps_corr_f32 dsps_corr_f32_ansi
+#endif
+
+#endif // _dsps_corr_H_

tools/sdk/esp32c3/include/esp-dsp/modules/dct/include/dsps_dct.h

@@ -0,0 +1,95 @@
+// Copyright 2018-2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_dct_H_
+#define _dsps_dct_H_
+#include "dsp_err.h"
+#include "sdkconfig.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief      DCT of radix 2, unscaled
+ *
+ * DCT type II of radix 2, unscaled
+ * Function is FFT based
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output array with size of N*2. An elements located: Re[0],Re[1], , ... Re[N-1], any data... up to N*2
+ *               result of DCT will be stored to this array from 0...N-1.
+ *               Size of data array must be N*2!!!
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_f32(float *data, int N);
+
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Inverce DCT of radix 2
+ *
+ * Inverce DCT type III of radix 2, unscaled
+ * Function is FFT based
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output array with size of N*2. An elements located: Re[0],Re[1], , ... Re[N-1], any data... up to N*2
+ *               result of DCT will be stored to this array from 0...N-1.
+ *               Size of data array must be N*2!!!
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_inv_f32(float *data, int N);
+
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      DCTs
+ *
+ * Direct DCT type II and Inverce DCT type III, unscaled
+ * These functions used as a reference for general purpose. These functions are not optimyzed!
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] data: input/output array with size of N. An elements located: Re[0],Re[1], , ... Re[N-1]
+ * @param[in] N: Size of DCT transform. Size of data array must be N*2!!!
+ * @param[out] result: output result array with size of N.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dct_f32_ref(float *data, int N, float *result);
+esp_err_t dsps_dct_inverce_f32_ref(float *data, int N, float *result);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_dct_H_

tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod.h

@@ -0,0 +1,171 @@
+
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dspi_dotprod_H_
+#define _dspi_dotprod_H_
+
+#include "esp_log.h"
+#include "dsp_err.h"
+#include "dsp_types.h"
+#include "dspi_dotprod_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief      dot product of two images
+ * Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y);
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images
+ * Dot product calculation for two floating point images: *out_value += image[i*...] * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t 
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
+
+esp_err_t dspi_dotprod_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift);
+esp_err_t dspi_dotprod_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift);
+
+
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images with input offset
+ * Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] offset - input offset value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_off_f32_ansi(image2d_t* in_image, image2d_t* filter, float *out_value, int count_x, int count_y, float offset);
+/**@}*/ 
+
+/**@{*/
+/**
+ * @brief      dot product of two images with input offset
+ * Dot product calculation for two floating point images: *out_value += (image[i*...] + offset) * src2[i*...]); i= [0..count_x*count_y)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform. 
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] in_image  descriptor of the image
+ * @param[in] filter  descriptor of the filter
+ * @param[out] out_value   pointer to the output value
+ * @param[in] count_x amount of samples by X axis  (count_x*step_X <= widdth)
+ * @param[in] count_y amount of samples by Y axis (count_y*step_Y  <= height)
+ * @param[in] shift - result shift to right, by default must be 15 for int16_t or 7 for int8_t 
+ * @param[in] offset - input offset value.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dspi_dotprod_off_s16_ansi(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
+esp_err_t dspi_dotprod_off_u16_ansi(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
+esp_err_t dspi_dotprod_off_s8_ansi(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
+esp_err_t dspi_dotprod_off_u8_ansi(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
+
+esp_err_t dspi_dotprod_off_s16_aes3(image2d_t* in_image, image2d_t* filter, int16_t *out_value, int count_x, int count_y, int shift, int16_t offset);
+esp_err_t dspi_dotprod_off_u16_aes3(image2d_t* in_image, image2d_t* filter, uint16_t *out_value, int count_x, int count_y, int shift, uint16_t offset);
+esp_err_t dspi_dotprod_off_s8_aes3(image2d_t* in_image, image2d_t* filter, int8_t *out_value, int count_x, int count_y, int shift, int8_t offset);
+esp_err_t dspi_dotprod_off_u8_aes3(image2d_t* in_image, image2d_t* filter, uint8_t *out_value, int count_x, int count_y, int shift, uint8_t offset);
+/**@}*/ 
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#ifdef CONFIG_DSP_OPTIMIZED
+#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
+#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
+    #if (dspi_dotprod_aes3_enabled == 1)
+    #define dspi_dotprod_s16 dspi_dotprod_s16_aes3
+    #define dspi_dotprod_u16 dspi_dotprod_u16_aes3
+    #define dspi_dotprod_s8 dspi_dotprod_s8_aes3
+    #define dspi_dotprod_u8 dspi_dotprod_u8_aes3
+    #define dspi_dotprod_off_s16 dspi_dotprod_off_s16_aes3
+    #define dspi_dotprod_off_s8 dspi_dotprod_off_s8_aes3
+    #define dspi_dotprod_off_u16 dspi_dotprod_off_u16_aes3
+    #define dspi_dotprod_off_u8 dspi_dotprod_off_u8_aes3
+    #else
+    #define dspi_dotprod_s16 dspi_dotprod_s16_ansi
+    #define dspi_dotprod_s8 dspi_dotprod_s8_ansi
+    #define dspi_dotprod_u16 dspi_dotprod_u16_ansi
+    #define dspi_dotprod_u8 dspi_dotprod_u8_ansi
+    #define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
+    #define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
+    #define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
+    #define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
+    #endif
+#endif
+#ifdef CONFIG_DSP_ANSI
+#define dspi_dotprod_f32 dspi_dotprod_f32_ansi
+#define dspi_dotprod_off_f32 dspi_dotprod_off_f32_ansi
+#define dspi_dotprod_s16 dspi_dotprod_s16_ansi
+#define dspi_dotprod_s8 dspi_dotprod_s8_ansi
+#define dspi_dotprod_off_s16 dspi_dotprod_off_s16_ansi
+#define dspi_dotprod_off_s8 dspi_dotprod_off_s8_ansi
+#define dspi_dotprod_u16 dspi_dotprod_u16_ansi
+#define dspi_dotprod_u8 dspi_dotprod_u8_ansi
+#define dspi_dotprod_off_u16 dspi_dotprod_off_u16_ansi
+#define dspi_dotprod_off_u8 dspi_dotprod_off_u8_ansi
+#endif
+
+
+#endif // _dspi_dotprod_H_

tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dspi_dotprod_platform.h

@@ -0,0 +1,16 @@
+#ifndef _dspi_dotprod_platform_H_
+#define _dspi_dotprod_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dspi_dotprod_aes3_enabled 1
+#endif 
+#endif // __XTENSA__
+
+#endif // _dspi_dotprod_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod.h

@@ -0,0 +1,120 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _DSPI_DOTPROD_H_
+#define _DSPI_DOTPROD_H_
+
+#include "esp_log.h"
+#include "dsp_err.h"
+
+#include "dsps_dotprod_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+// These functions calculates dotproduct of two vectors.
+
+/**@{*/
+/**
+ * @brief      dot product of two 16 bit vectors
+ * Dot product calculation for two signed 16 bit arrays: *dest += (src1[i] * src2[i]) >> (15-shift); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @param[in] shift shift of the result.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprod_s16_ansi(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift);
+esp_err_t dsps_dotprod_s16_ae32(const int16_t *src1, const int16_t *src2, int16_t *dest, int len, int8_t shift);
+/**@}*/
+
+
+/**@{*/
+/**
+ * @brief      dot product of two float vectors
+ * Dot product calculation for two floating point arrays: *dest += (src1[i] * src2[i]); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprod_f32_ansi(const float *src1, const float *src2, float *dest, int len);
+esp_err_t dsps_dotprod_f32_ae32(const float *src1, const float *src2, float *dest, int len);
+esp_err_t dsps_dotprod_f32_aes3(const float *src1, const float *src2, float *dest, int len);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      dot product of two float vectors with step
+ * Dot product calculation for two floating point arrays: *dest += (src1[i*step1] * src2[i*step2]); i= [0..N)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] src1  source array 1
+ * @param[in] src2  source array 2
+ * @param dest  destination pointer
+ * @param[in] len   length of input arrays
+ * @param[in] step1 step over elements in first array
+ * @param[in] step2 step over elements in second array
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_dotprode_f32_ansi(const float *src1, const float *src2, float *dest, int len, int step1, int step2);
+esp_err_t dsps_dotprode_f32_ae32(const float *src1, const float *src2, float *dest, int len, int step1, int step2);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_dotprod_s16_ae32_enabled == 1)
+#define dsps_dotprod_s16 dsps_dotprod_s16_ae32
+#else
+#define dsps_dotprod_s16 dsps_dotprod_s16_ansi
+#endif // dsps_dotprod_s16_ae32_enabled
+
+#if (dsps_dotprod_f32_aes3_enabled == 1)
+#define dsps_dotprod_f32 dsps_dotprod_f32_aes3
+#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
+#elif (dotprod_f32_ae32_enabled == 1)
+#define dsps_dotprod_f32 dsps_dotprod_f32_ae32
+#define dsps_dotprode_f32 dsps_dotprode_f32_ae32
+#else
+#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
+#define dsps_dotprode_f32 dsps_dotprode_f32_ansi
+#endif // dsps_dotprod_f32_ae32_enabled
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_dotprod_s16 dsps_dotprod_s16_ansi
+#define dsps_dotprod_f32 dsps_dotprod_f32_ansi
+#define dsps_dotprode_f32 dsps_dotprode_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _DSPI_DOTPROD_H_

tools/sdk/esp32c3/include/esp-dsp/modules/dotprod/include/dsps_dotprod_platform.h

@@ -0,0 +1,32 @@
+#ifndef _dsps_dotprod_platform_H_
+#define _dsps_dotprod_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dotprod_f32_ae32_enabled  1
+#define dotprode_f32_ae32_enabled 1
+
+#endif // 
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_dotprod_s16_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dsps_dotprod_s16_aes3_enabled 1
+#define dsps_dotprod_f32_aes3_enabled 1
+#endif 
+
+
+#endif // _dsps_dotprod_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r.h

@@ -0,0 +1,245 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft2r_H_
+#define _dsps_fft2r_H_
+
+#include "dsp_err.h"
+#include "sdkconfig.h"
+#include "dsps_fft_tables.h"
+#include "dsps_fft2r_platform.h"
+
+#ifndef CONFIG_DSP_MAX_FFT_SIZE
+#define CONFIG_DSP_MAX_FFT_SIZE 4096
+#endif // CONFIG_DSP_MAX_FFT_SIZE
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern float *dsps_fft_w_table_fc32;
+extern int dsps_fft_w_table_size;
+extern uint8_t dsps_fft2r_initialized;
+
+extern int16_t *dsps_fft_w_table_sc16;
+extern int dsps_fft_w_table_sc16_size;
+extern uint8_t dsps_fft2r_sc16_initialized;
+
+
+/**@{*/
+/**
+ * @brief      init fft tables
+ *
+ * Initialization of Complex FFT. This function initialize coefficients table.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] fft_table_buff: pointer to floating point buffer where sin/cos table will be stored
+ *                          if this parameter set to NULL, and table_size value is more then 0, then
+ *                          dsps_fft2r_init_fc32 will allocate buffer internally
+ * @param[in] table_size: size of the buffer in float words
+ *                      if fft_table_buff is NULL and table_size is not 0, buffer will be allocated internally.
+ *                      If table_size is 0, buffer will not be allocated.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_DSP_PARAM_OUTOFRANGE if table_size > CONFIG_DSP_MAX_FFT_SIZE
+ *      - ESP_ERR_DSP_REINITIALIZED if buffer already allocated internally by other function
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft2r_init_fc32(float *fft_table_buff, int table_size);
+esp_err_t dsps_fft2r_init_sc16(int16_t *fft_table_buff, int table_size);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      deinit fft tables
+ *
+ * Free resources of Complex FFT. This function delete coefficients table if it was allocated by dsps_fft2r_init_fc32.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ */
+void dsps_fft2r_deinit_fc32(void);
+void dsps_fft2r_deinit_sc16(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      complex FFT of radix 2
+ *
+ * Complex FFT of radix 2
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] w: pointer to the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft2r_fc32_ansi_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_fc32_ae32_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_fc32_aes3_(float *data, int N, float *w);
+esp_err_t dsps_fft2r_sc16_ansi_(int16_t *data, int N, int16_t *w);
+esp_err_t dsps_fft2r_sc16_ae32_(int16_t *data, int N, int16_t *w);
+esp_err_t dsps_fft2r_sc16_aes3_(int16_t *data, int N, int16_t *w);
+/**@}*/
+// This is workaround because linker generates permanent error when assembler uses
+// direct access to the table pointer
+#define dsps_fft2r_fc32_ae32(data, N) dsps_fft2r_fc32_ae32_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_fc32_aes3(data, N) dsps_fft2r_fc32_aes3_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_sc16_ae32(data, N) dsps_fft2r_sc16_ae32_(data, N, dsps_fft_w_table_sc16)
+#define dsps_fft2r_sc16_aes3(data, N) dsps_fft2r_sc16_aes3_(data, N, dsps_fft_w_table_sc16)
+#define dsps_fft2r_fc32_ansi(data, N) dsps_fft2r_fc32_ansi_(data, N, dsps_fft_w_table_fc32)
+#define dsps_fft2r_sc16_ansi(data, N) dsps_fft2r_sc16_ansi_(data, N, dsps_fft_w_table_sc16)
+
+
+/**@{*/
+/**
+ * @brief      bit reverse operation for the complex input array
+ *
+ * Bit reverse operation for the complex input array
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: input/ complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_bit_rev_fc32_ansi(float *data, int N);
+esp_err_t dsps_bit_rev_sc16_ansi(int16_t *data, int N);
+esp_err_t dsps_bit_rev2r_fc32(float *data, int N);
+/**@}*/
+
+esp_err_t dsps_bit_rev_lookup_fc32_ansi(float *data, int reverse_size, uint16_t *reverse_tab);
+esp_err_t dsps_bit_rev_lookup_fc32_ae32(float *data, int reverse_size, uint16_t *reverse_tab);
+esp_err_t dsps_bit_rev_lookup_fc32_aes3(float *data, int reverse_size, uint16_t *reverse_tab);
+
+/**@{*/
+/**
+ * @brief      Generate coefficients table for the FFT radix 2
+ *
+ * Generate coefficients table for the FFT radix 2. This function called inside init.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] w: memory location to store coefficients.
+ *           By default coefficients will be stored to the dsps_fft_w_table_fc32.
+ *           Maximum size of the FFT must be setup in menuconfig
+ * @param[in] N: maximum size of the FFT that will be used
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_gen_w_r2_fc32(float *w, int N);
+esp_err_t dsps_gen_w_r2_sc16(int16_t *w, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex array to two real arrays
+ *
+ * Convert complex array to two real arrays in case if input was two real arrays.
+ * This function have to be used if FFT used to process real data.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2reC_fc32_ansi(float *data, int N);
+esp_err_t dsps_cplx2reC_sc16(int16_t *data, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex FFT result to real array
+ *
+ * Convert FFT result of complex FFT for resl input to real array.
+ * This function have to be used if FFT used to process real data.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2real_sc16_ansi(int16_t *data, int N);
+/**@}*/
+esp_err_t dsps_cplx2real256_fc32_ansi(float *data);
+
+esp_err_t dsps_gen_bitrev2r_table(int N, int step, char *name_ext);
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#define dsps_bit_rev_fc32 dsps_bit_rev_fc32_ansi
+#define dsps_cplx2reC_fc32 dsps_cplx2reC_fc32_ansi
+
+#if (dsps_fft2r_fc32_aes3_enabled == 1)
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_aes3
+#elif (dsps_fft2r_fc32_ae32_enabled == 1)
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ae32
+#else
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ansi
+#endif
+
+#if (dsps_fft2r_sc16_aes3_enabled == 1)
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_aes3
+#elif (dsps_fft2r_sc16_ae32_enabled == 1)
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_ae32
+#else
+#define dsps_fft2r_sc16 dsps_fft2r_sc16_ansi
+#endif
+
+#if (dsps_bit_rev_lookup_fc32_ae32_enabled == 1)
+#if (dsps_fft2r_fc32_aes3_enabled)
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_aes3
+#else
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ae32
+#endif // dsps_fft2r_fc32_aes3_enabled
+#else
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+
+#define dsps_fft2r_fc32 dsps_fft2r_fc32_ansi
+#define dsps_bit_rev_fc32 dsps_bit_rev_fc32_ansi
+#define dsps_cplx2reC_fc32 dsps_cplx2reC_fc32_ansi
+#define dsps_bit_rev_sc16 dsps_bit_rev_sc16_ansi
+#define dsps_bit_rev_lookup_fc32 dsps_bit_rev_lookup_fc32_ansi
+
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_fft2r_H_

tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft2r_platform.h

@@ -0,0 +1,36 @@
+#ifndef _dsps_fft2r_platform_H_
+#define _dsps_fft2r_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fft2r_fc32_ae32_enabled 1
+
+#endif // 
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_fft2r_sc16_ae32_enabled 1
+
+#endif //
+
+#if (XCHAL_HAVE_LOOPS == 1)
+
+#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+#if CONFIG_IDF_TARGET_ESP32S3
+#define dsps_fft2r_fc32_aes3_enabled 1
+#define dsps_fft2r_sc16_aes3_enabled 1
+#endif
+
+
+#endif // _dsps_fft2r_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r.h

@@ -0,0 +1,177 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft4r_H_
+#define _dsps_fft4r_H_
+#include "dsp_err.h"
+#include "sdkconfig.h"
+
+#include "dsps_fft_tables.h"
+#include "dsps_fft4r_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern float *dsps_fft4r_w_table_fc32;
+extern int dsps_fft4r_w_table_size;
+extern uint8_t dsps_fft4r_initialized;
+
+extern int16_t *dsps_fft4r_w_table_sc16;
+extern int dsps_fft4r_w_table_sc16_size;
+extern uint8_t dsps_fft4r_sc16_initialized;
+
+/**@{*/
+/**
+ * @brief      init fft tables
+ *
+ * Initialization of Complex FFT Radix-4. This function initialize coefficients table.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] fft_table_buff: pointer to floating point buffer where sin/cos table will be stored
+ *                          if this parameter set to NULL, and table_size value is more then 0, then
+ *                          dsps_fft4r_init_fc32 will allocate buffer internally
+ * @param[in] max_fft_size: maximum fft size. The buffer for sin/cos table that will be used for radix-4 it's
+ *                          four times maximum length of FFT.
+ *                          if fft_table_buff is NULL and table_size is not 0, buffer will be allocated internally.
+ *                          If table_size is 0, buffer will not be allocated.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - ESP_ERR_DSP_PARAM_OUTOFRANGE if table_size > CONFIG_DSP_MAX_FFT_SIZE
+ *      - ESP_ERR_DSP_REINITIALIZED if buffer already allocated internally by other function
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft4r_init_fc32(float *fft_table_buff, int max_fft_size);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      deinit fft tables
+ *
+ * Free resources of Complex FFT Radix-4. This function delete coefficients table if it was allocated by dsps_fft4r_init_fc32.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ *
+ */
+void dsps_fft4r_deinit_fc32(void);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      complex FFT of radix 4
+ *
+ * Complex FFT of radix 4
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[inout] data: input/output complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] table: pointer to sin/cos table
+ * @param[in] table_size: size of the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fft4r_fc32_ansi_(float *data, int N, float *table, int table_size);
+esp_err_t dsps_fft4r_fc32_ae32_(float *data, int N, float *table, int table_size);
+/**@}*/
+// This is workaround because linker generates permanent error when assembler uses
+// direct access to the table pointer
+#define dsps_fft4r_fc32_ansi(data, N) dsps_fft4r_fc32_ansi_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+#define dsps_fft4r_fc32_ae32(data, N) dsps_fft4r_fc32_ae32_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+
+/**@{*/
+/**
+ * @brief      bit reverse operation for the complex input array radix-4
+ *
+ * Bit reverse operation for the complex input array
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: input/ complex array. An elements located: Re[0], Im[0], ... Re[N-1], Im[N-1]
+ *               result of FFT will be stored to this array.
+ * @param[in] N: Number of complex elements in input array
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_bit_rev4r_fc32(float *data, int N);
+esp_err_t dsps_bit_rev4r_fc32_ae32(float *data, int N);
+esp_err_t dsps_bit_rev4r_direct_fc32_ansi(float *data, int N);
+esp_err_t dsps_bit_rev4r_sc16_ansi(int16_t *data, int N);
+/**@}*/
+
+/**@{*/
+/**
+ * @brief      Convert complex FFT result to real array
+ *
+ * Convert FFT result of complex FFT for real input to real array.
+ * This function have to be used if FFT used to process real data.
+ * This function use tabels inside and can be used only it dsps_fft4r_init_fc32(...) was
+ * called and FFT4 was initialized.
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[inout] data: Input complex array and result of FFT2R/FFT4R.
+ *               input has size of 2*N, because contains real and imaginary part.
+ *               result will be stored to the same array.
+ *               Input1: input[0..N-1], Input2: input[N..2*N-1]
+ * @param[in] N: Number of complex elements in input array
+ * @param[in] table: pointer to sin/cos table
+ * @param[in] table_size: size of the sin/cos table
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_cplx2real_fc32_ansi_(float *data, int N, float *table, int table_size);
+esp_err_t dsps_cplx2real_fc32_ae32_(float *data, int N, float *table, int table_size);
+/**@}*/
+#define dsps_cplx2real_fc32_ansi(data, N) dsps_cplx2real_fc32_ansi_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+#define dsps_cplx2real_fc32_ae32(data, N) dsps_cplx2real_fc32_ae32_(data, N, dsps_fft4r_w_table_fc32, dsps_fft4r_w_table_size)
+
+
+esp_err_t dsps_gen_bitrev4r_table(int N, int step, char *name_ext);
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_fft4r_fc32_ae32_enabled == 1)
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ae32
+#else
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ansi
+#endif // dsps_fft4r_fc32_ae32_enabled
+
+#define dsps_fft4r_sc16 dsps_fft4r_sc16_ae32
+#define dsps_bit_rev4r_fc32 dsps_bit_rev4r_fc32_ae32
+
+#if (dsps_cplx2real_fc32_ae32_enabled == 1)
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ae32
+#else
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ansi
+#endif // dsps_cplx2real_fc32_ae32_enabled
+
+#else
+#define dsps_fft4r_fc32 dsps_fft4r_fc32_ansi
+#define dsps_fft4r_sc16 dsps_fft4r_sc16_ansi
+#define dsps_bit_rev4r_fc32 dsps_bit_rev4r_fc32
+#define dsps_cplx2real_fc32 dsps_cplx2real_fc32_ansi
+#endif
+
+#endif // _dsps_fft4r_H_

tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft4r_platform.h

@@ -0,0 +1,34 @@
+#ifndef _dsps_fft4r_platform_H_
+#define _dsps_fft4r_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fft4r_fc32_ae32_enabled 1
+#define dsps_cplx2real_fc32_ae32_enabled 1
+
+#endif // 
+
+
+#if ((XCHAL_HAVE_LOOPS == 1) && (XCHAL_HAVE_MAC16 == 1))
+
+#define dsps_fft2r_sc16_ae32_enabled 1
+
+#endif //
+
+#if (XCHAL_HAVE_LOOPS == 1)
+
+#define dsps_bit_rev_lookup_fc32_ae32_enabled 1
+
+#endif //
+#endif // __XTENSA__
+
+
+
+#endif // _dsps_fft4r_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/fft/include/dsps_fft_tables.h

@@ -0,0 +1,89 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fft_tables_H_
+#define _dsps_fft_tables_H_
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+extern const uint16_t bitrev2r_table_16_fc32[];
+extern const uint16_t bitrev2r_table_16_fc32_size;
+
+extern const uint16_t bitrev2r_table_32_fc32[];
+extern const uint16_t bitrev2r_table_32_fc32_size;
+
+extern const uint16_t bitrev2r_table_64_fc32[];
+extern const uint16_t bitrev2r_table_64_fc32_size;
+
+extern const uint16_t bitrev2r_table_128_fc32[];
+extern const uint16_t bitrev2r_table_128_fc32_size;
+
+extern const uint16_t bitrev2r_table_256_fc32[];
+extern const uint16_t bitrev2r_table_256_fc32_size;
+
+extern const uint16_t bitrev2r_table_512_fc32[];
+extern const uint16_t bitrev2r_table_512_fc32_size;
+
+extern const uint16_t bitrev2r_table_1024_fc32[];
+extern const uint16_t bitrev2r_table_1024_fc32_size;
+
+extern const uint16_t bitrev2r_table_2048_fc32[];
+extern const uint16_t bitrev2r_table_2048_fc32_size;
+
+extern const uint16_t bitrev2r_table_4096_fc32[];
+extern const uint16_t bitrev2r_table_4096_fc32_size;
+
+void dsps_fft2r_rev_tables_init_fc32(void);
+extern uint16_t *dsps_fft2r_rev_tables_fc32[];
+extern const uint16_t dsps_fft2r_rev_tables_fc32_size[];
+
+extern const uint16_t bitrev4r_table_16_fc32[];
+extern const uint16_t bitrev4r_table_16_fc32_size;
+
+extern const uint16_t bitrev4r_table_32_fc32[];
+extern const uint16_t bitrev4r_table_32_fc32_size;
+
+extern const uint16_t bitrev4r_table_64_fc32[];
+extern const uint16_t bitrev4r_table_64_fc32_size;
+
+extern const uint16_t bitrev4r_table_128_fc32[];
+extern const uint16_t bitrev4r_table_128_fc32_size;
+
+extern const uint16_t bitrev4r_table_256_fc32[];
+extern const uint16_t bitrev4r_table_256_fc32_size;
+
+extern const uint16_t bitrev4r_table_512_fc32[];
+extern const uint16_t bitrev4r_table_512_fc32_size;
+
+extern const uint16_t bitrev4r_table_1024_fc32[];
+extern const uint16_t bitrev4r_table_1024_fc32_size;
+
+extern const uint16_t bitrev4r_table_2048_fc32[];
+extern const uint16_t bitrev4r_table_2048_fc32_size;
+
+extern const uint16_t bitrev4r_table_4096_fc32[];
+extern const uint16_t bitrev4r_table_4096_fc32_size;
+
+void dsps_fft4r_rev_tables_init_fc32(void);
+extern uint16_t *dsps_fft4r_rev_tables_fc32[];
+extern const uint16_t dsps_fft4r_rev_tables_fc32_size[];
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_fft_tables_H_

tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir.h

@@ -0,0 +1,147 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_fir_H_
+#define _dsps_fir_H_
+
+
+#include "dsp_err.h"
+
+#include "dsps_fir_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief Data struct of f32 fir filter
+ *
+ * This structure used by filter internally. User should access this structure only in case of
+ * extensions for the DSP Library.
+ * All fields of this structure initialized by dsps_fir_init_f32(...) function.
+ */
+typedef struct fir_f32_s {
+    float  *coeffs;     /*!< Pointer to the coefficient buffer.*/
+    float  *delay;      /*!< Pointer to the delay line buffer.*/
+    int     N;          /*!< FIR filter coefficients amount.*/
+    int     pos;        /*!< Position in delay line.*/
+    int     decim;      /*!< Decimation factor.*/
+    int     d_pos;      /*!< Actual decimation counter.*/
+} fir_f32_t;
+
+/**
+ * @brief   initialize structure for 32 bit FIR filter
+ *
+ * Function initialize structure for 32 bit floating point FIR filter
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param fir: pointer to fir filter structure, that must be preallocated
+ * @param coeffs: array with FIR filter coefficients. Must be length N
+ * @param delay: array for FIR filter delay line. Must be length N
+ * @param N: FIR filter length. Length of coeffs and delay arrays.
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fir_init_f32(fir_f32_t *fir, float *coeffs, float *delay, int N);
+
+/**
+ * @brief   initialize structure for 32 bit Decimation FIR filter
+ * Function initialize structure for 32 bit floating point FIR filter with decimation
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param fir: pointer to fir filter structure, that must be preallocated
+ * @param coeffs: array with FIR filter coefficients. Must be length N
+ * @param delay: array for FIR filter delay line. Must be length N
+ * @param N: FIR filter length. Length of coeffs and delay arrays.
+ * @param decim: decimation factor.
+ * @param start_pos: initial value of decimation counter. Must be [0..d)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fird_init_f32(fir_f32_t *fir, float *coeffs, float *delay, int N, int decim, int start_pos);
+
+
+/**@{*/
+/**
+ * @brief   FIR filter
+ *
+ * Function implements FIR filter
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param fir: pointer to fir filter structure, that must be initialized before
+ * @param[in] input: input array
+ * @param[out] output: array with result of FIR filter
+ * @param[in] len: length of input and result arrays
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_fir_f32_ansi(fir_f32_t *fir, const float *input, float *output, int len);
+esp_err_t dsps_fir_f32_ae32(fir_f32_t *fir, const float *input, float *output, int len);
+esp_err_t dsps_fir_f32_aes3(fir_f32_t *fir, const float *input, float *output, int len);
+/**@}*/
+
+/**@{*/
+/**
+ *  @brief   Decimation FIR filter
+ *
+ * Function implements FIR filter with decimation
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param fir: pointer to fir filter structure, that must be initialized before
+ * @param input: input array
+ * @param output: array with result of FIR filter
+ * @param len: length of input and result arrays
+ *
+ * @return: function returns amount of samples stored to the output array
+ *          depends on the previous state value could be [0..len/decimation]
+ */
+int dsps_fird_f32_ansi(fir_f32_t *fir, const float *input, float *output, int len);
+int dsps_fird_f32_ae32(fir_f32_t *fir, const float *input, float *output, int len);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_fir_f32_ae32_enabled == 1)
+#define dsps_fir_f32 dsps_fir_f32_ae32
+#else
+#define dsps_fir_f32 dsps_fir_f32_ansi
+#endif
+
+#if (dsps_fird_f32_ae32_enabled == 1)
+#define dsps_fird_f32 dsps_fird_f32_ae32
+#else
+#define dsps_fird_f32 dsps_fird_f32_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_fir_f32 dsps_fir_f32_ansi
+#define dsps_fird_f32 dsps_fird_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_fir_H_

tools/sdk/esp32c3/include/esp-dsp/modules/fir/include/dsps_fir_platform.h

@@ -0,0 +1,19 @@
+#ifndef _dsps_fir_platform_H_
+#define _dsps_fir_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_fir_f32_ae32_enabled  1
+#define dsps_fird_f32_ae32_enabled  1
+
+#endif // 
+#endif // __XTENSA__
+
+#endif // _dsps_fir_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad.h

@@ -0,0 +1,67 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _dsps_biquad_H_
+#define _dsps_biquad_H_
+
+#include "dsp_err.h"
+
+#include "dsps_biquad_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**@{*/
+/**
+ * @brief   IIR filter
+ *
+ * IIR filter 2nd order direct form II (bi quad)
+ * The extension (_ansi) use ANSI C and could be compiled and run on any platform.
+ * The extension (_ae32) is optimized for ESP32 chip.
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: length of input and output vectors
+ * @param coef: array of coefficients. b0,b1,b2,a1,a2
+ *              expected that a0 = 1. b0..b2 - numerator, a0..a2 - denominator
+ * @param w: delay line w0,w1. Length of 2.
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_f32_ansi(const float *input, float *output, int len, float *coef, float *w);
+esp_err_t dsps_biquad_f32_ae32(const float *input, float *output, int len, float *coef, float *w);
+esp_err_t dsps_biquad_f32_aes3(const float *input, float *output, int len, float *coef, float *w);
+/**@}*/
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_biquad_f32_ae32_enabled == 1)
+#define dsps_biquad_f32 dsps_biquad_f32_ae32
+#else
+#define dsps_biquad_f32 dsps_biquad_f32_ansi
+#endif
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_biquad_f32 dsps_biquad_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+
+#endif // _dsps_biquad_H_

tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_gen.h

@@ -0,0 +1,200 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_biquad_gen_H_
+#define _dsps_biquad_gen_H_
+
+#include "dsp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+// Common rules for all generated coefficients.
+// The coefficients placed to the array as follows:
+// coeffs[0] = b0;
+// coeffs[1] = b1;
+// coeffs[2] = b2;
+// coeffs[3] = a1;
+// coeffs[4] = a2;
+// a0 - are not placed and expected always as == 1
+
+/**
+ * @brief   LPF IIR filter coefficients
+ * Coefficients for low pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_lpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   HPF IIR filter coefficients
+ *
+ * Coefficients for high pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter cut off frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_hpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   BPF IIR filter coefficients
+ *
+ * Coefficients for band pass 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_bpf_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   0 dB BPF IIR filter coefficients
+ *
+ * Coefficients for band pass 2nd order IIR filter (bi-quad) with 0 dB gain in passband
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter center frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_bpf0db_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   Notch IIR filter coefficients
+ *
+ * Coefficients for notch 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_notch_f32(float *coeffs, float f, float gain, float qFactor);
+
+/**
+ * @brief   Allpass 360 degree IIR filter coefficients
+ *
+ * Coefficients for all pass 2nd order IIR filter (bi-quad) with 360 degree phase shift
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_allpass360_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   Allpass 180 degree IIR filter coefficients
+ *
+ * Coefficients for all pass 2nd order IIR filter (bi-quad) with 180 degree phase shift
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_allpass180_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   peak IIR filter coefficients
+ *
+ * Coefficients for peak 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_peakingEQ_f32(float *coeffs, float f, float qFactor);
+
+/**
+ * @brief   low shelf IIR filter coefficients
+ *
+ * Coefficients for low pass Shelf 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_lowShelf_f32(float *coeffs, float f, float gain, float qFactor);
+
+/**
+ * @brief   high shelf IIR filter coefficients
+ *
+ * Coefficients for high pass Shelf 2nd order IIR filter (bi-quad)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param coeffs: result coefficients. b0,b1,b2,a1,a2, a0 are not placed to the array and expected by IIR as 1
+ * @param f: filter notch frequency in range of 0..0.5 (normalized to sample frequency)
+ * @param gain: gain in stopband in dB
+ * @param qFactor: Q factor of filter
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_biquad_gen_highShelf_f32(float *coeffs, float f, float gain, float qFactor);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif // _dsps_biquad_gen_H_

tools/sdk/esp32c3/include/esp-dsp/modules/iir/include/dsps_biquad_platform.h

@@ -0,0 +1,18 @@
+#ifndef _dsps_biquad_platform_H_
+#define _dsps_biquad_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_biquad_f32_ae32_enabled  1
+
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_biquad_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf/include/ekf.h

@@ -0,0 +1,208 @@
+// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef _ekf_h_
+#define _ekf_h_
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <math.h>
+#include <stdint.h>
+#include <mat.h>
+
+class ekf {
+public:
+    // x - amount of states in EKF. x[n] = F*x[n-1] + G*u + W. Size of matrix F
+    // w - amount of control measurements and noise inputs. Size of matrix G
+
+    ekf(int x, int w);
+
+    virtual ~ekf();
+    virtual void Process(float *u, float dt);
+
+    virtual void Init() = 0;
+    // x[n] = F*x[n-1] + G*u + W
+    int NUMX; // number of states, X is the state vector (size of F matrix)
+    int NUMW; // size of G matrix
+
+    // System state vector
+    dspm::Mat &X;
+
+    // linearized system matrices
+    dspm::Mat &F;
+    dspm::Mat &G;
+
+    // covariance matrix and state vector
+    dspm::Mat &P;
+
+    // input noise and measurement noise variances
+    dspm::Mat &Q;
+
+    /**
+     * Runge-Kutta state update method.
+	 * The method calculates derivatives of input vector x and control measurements u
+     * Re
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     * @param[in] dt: time interval from last update in seconds
+     */
+    void RungeKutta(dspm::Mat &x, float *u, float dt);
+
+    // System Dependent methods:
+
+    /**
+     * Derivative of state vector X
+     * Re
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     * @return
+     *      - derivative of input vector x and u
+     */
+    virtual dspm::Mat StateXdot(dspm::Mat &x, float *u) = 0;
+    /**
+     * Calculation of system state matrices F and G
+     * @param[in] x: state vector
+     * @param[in] u: control measurement
+     */
+    virtual void LinearizeFG(dspm::Mat &x, float *u) = 0;
+    //
+
+    // System independent methods
+
+    /**
+     * Calculates covariance prediction matrux P.
+	 * Update matrix P
+     * @param[in] dt: time interval from last update
+     */
+    virtual void CovariancePrediction(float dt);
+
+    /**
+     * Update of current state by measured values.
+     * Optimized method for non correlated values
+	 * Calculate Kalman gain and update matrix P and vector X. 
+     * @param[in] H: derivative matrix
+     * @param[in] measured: array of measured values
+     * @param[in] expected: array of expected values
+     * @param[in] R: measurement noise covariance values
+     */
+    virtual void Update(dspm::Mat &H, float *measured, float *expected, float *R);
+    /**
+     * Update of current state by measured values.
+     * This method just as a reference for research purpose.
+     * Not used in real calculations.
+     * @param[in] H: derivative matrix
+     * @param[in] measured: array of measured values
+     * @param[in] expected: array of expected values
+     * @param[in] R: measurement noise covariance values
+     */
+    virtual void UpdateRef(dspm::Mat &H, float *measured, float *expected, float *R);
+
+
+    float *HP;
+    float *Km;
+
+public:
+    // Additional universal helper methods
+    /**
+     * Convert quaternion to rotation matrix.
+     * @param[in] q: quaternion
+     *
+     * @return
+     *      - rotation matrix 3x3
+     */
+    static dspm::Mat quat2rotm(float q[4]);
+
+    /**
+     * Convert rotation matrix to quaternion.
+     * @param[in] R: rotation matrix
+     *
+     * @return
+     *      - quaternion 4x1
+     */
+    static dspm::Mat rotm2quat(dspm::Mat &R);
+
+    /**
+     * Convert quaternion to Euler angels.
+     * @param[in] R: quaternion
+     *
+     * @return
+     *      - Euler angels 3x1
+     */
+    static dspm::Mat quat2eul(const float q[4]);
+    /**
+     * Convert Euler angels to rotation matrix.
+     * @param[in] xyz: Euler angels
+     *
+     * @return
+     *      - rotation matrix 3x3
+     */
+    static dspm::Mat eul2rotm(float xyz[3]);
+
+    /**
+     * Convert rotation matrix to Euler angels.
+     * @param[in] rotm: rotation matrix
+     *
+     * @return
+     *      - Euler angels 3x1
+     */
+    static dspm::Mat rotm2eul(dspm::Mat &rotm);
+
+    /**
+     * Df/dq:  Derivative of vector by quaternion.
+     * @param[in] vector: input vector
+     * @param[in] quat: quaternion
+     *
+     * @return
+     *      - Derivative matrix 3x4
+     */
+    static dspm::Mat dFdq(dspm::Mat &vector, dspm::Mat &quat);
+
+    /**
+     * Df/dq: Derivative of vector by inverted quaternion.
+     * @param[in] vector: input vector
+     * @param[in] quat: quaternion
+     *
+     * @return
+     *      - Derivative matrix 3x4
+     */
+    static dspm::Mat dFdq_inv(dspm::Mat &vector, dspm::Mat &quat);
+
+    /**
+     * Make skew-symmetric matrix of vector.
+     * @param[in] w: source vector
+     *
+     * @return
+     *      - skew-symmetric matrix 4x4
+     */
+    static dspm::Mat SkewSym4x4(float *w);
+
+    // q product
+    // Rl = [q(1) - q(2) - q(3) - q(4); ...
+    //      q(2)  q(1) - q(4)  q(3); ...
+    //      q(3)  q(4)  q(1) - q(2); ...
+    //      q(4) - q(3)  q(2)  q(1); ...
+
+    /**
+     * Make right quaternion-product matrices.
+     * @param[in] q: source quaternion
+     *
+     * @return
+     *      - right quaternion-product matrix 4x4
+     */
+    static dspm::Mat qProduct(float *q);
+
+};
+
+#endif // _ekf_h_

tools/sdk/esp32c3/include/esp-dsp/modules/kalman/ekf_imu13states/include/ekf_imu13states.h

@@ -0,0 +1,83 @@
+// Copyright 2020-2021 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _ekf_imu13states_H_
+#define _ekf_imu13states_H_
+
+#include "ekf.h"
+
+/**
+* @brief This class is used to process and calculate attitude from imu sensors.
+*
+*   The class use state vector with 13 follows values
+*   X[0..3] - attitude quaternion
+*   X[4..6] - gyroscope bias error, rad/sec
+*   X[7..9] - magnetometer vector value - magn_ampl
+*   X[10..12] - magnetometer offset value - magn_offset
+*
+*   where, reference magnetometer value = magn_ampl*rotation_matrix' + magn_offset
+*/
+class ekf_imu13states: public ekf {
+public:
+    ekf_imu13states();
+    virtual ~ekf_imu13states();
+    virtual void Init();
+
+    // Method calculates Xdot values depends on U
+    // U - gyroscope values in radian per seconds (rad/sec)
+    virtual dspm::Mat StateXdot(dspm::Mat &x, float *u);
+    virtual void LinearizeFG(dspm::Mat &x, float *u);
+
+    // Methods for tests only.
+    void Test();
+    void TestFull(bool enable_att);
+
+    // Initial reference valies magnetometer and accelerometer
+    dspm::Mat mag0;
+    dspm::Mat accel0;
+
+    int NUMU; // number of control measurements
+
+    /**
+     * Update part of system state by reference measurements accelerometer and magnetometer.
+     * Only attitude and gyro bias will be updated.
+     * This method should be used as main method after calibration.
+     * 
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurement(float *accel_data, float *magn_data, float R[6]);
+    /**
+     * Update full system state by reference measurements accelerometer and magnetometer.
+     * This method should be used at calibration phase.
+     * 
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurementMagn(float *accel_data, float *magn_data, float R[6]);
+    /**
+     * Update system state by reference measurements accelerometer, magnetometer and attitude quaternion.
+     * This method could be used when system on constant state or in initialization phase.
+     * @param[in] accel_data: accelerometer measurement vector XYZ in g, where 1 g ~ 9.81 m/s^2
+     * @param[in] magn_data: magnetometer measurement vector XYZ
+     * @param[in] attitude: attitude quaternion
+     * @param[in] R: measurement noise covariance values for diagonal covariance matrix. Then smaller value, then more you trust them.
+     */
+    void UpdateRefMeasurement(float *accel_data, float *magn_data, float *attitude, float R[10]);
+
+};
+
+#endif // _ekf_imu13states_H_

tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add.h

@@ -0,0 +1,78 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_add_H_
+#define _dsps_add_H_
+#include "dsp_err.h"
+
+#include "dsps_add_platform.h"
+
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   add two arrays
+ *
+ * The function add one input array to another
+ * out[i*step_out] = input1[i*step1] + input2[i*step2]; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input1: input array 1
+ * @param[in] input2: input array 2
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param step1: step over input array 1 (by default should be 1)
+ * @param step2: step over input array 2 (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_add_f32_ansi(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+esp_err_t dsps_add_f32_ae32(const float *input1, const float *input2, float *output, int len, int step1, int step2, int step_out);
+
+esp_err_t dsps_add_s16_ansi(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+esp_err_t dsps_add_s16_ae32(const int16_t *input1, const int16_t *input2, int16_t *output, int len, int step1, int step2, int step_out, int shift);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#if CONFIG_DSP_OPTIMIZED
+
+#if (dsps_add_f32_ae32_enabled == 1)
+#define dsps_add_f32 dsps_add_f32_ae32
+#else
+#define dsps_add_f32 dsps_add_f32_ansi
+#endif
+
+#if (dsps_add_s16_ae32_enabled == 1)
+#define dsps_add_s16 dsps_add_s16_ae32
+#else
+#define dsps_add_s16 dsps_add_s16_ansi
+#endif
+
+#else // CONFIG_DSP_OPTIMIZED
+#define dsps_add_f32 dsps_add_f32_ansi
+#define dsps_add_s16 dsps_add_s16_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_add_H_

tools/sdk/esp32c3/include/esp-dsp/modules/math/add/include/dsps_add_platform.h

@@ -0,0 +1,23 @@
+#ifndef _dsps_add_platform_H_
+#define _dsps_add_platform_H_
+
+#include "sdkconfig.h"
+
+#ifdef __XTENSA__
+#include <xtensa/config/core-isa.h>
+#include <xtensa/config/core-matmap.h>
+
+
+#if ((XCHAL_HAVE_FP == 1) && (XCHAL_HAVE_LOOPS == 1))
+
+#define dsps_add_f32_ae32_enabled  1
+
+#endif
+
+#if (XCHAL_HAVE_LOOPS == 1)
+#define dsps_add_s16_ae32_enabled  1
+#endif
+#endif // __XTENSA__
+
+
+#endif // _dsps_add_platform_H_

tools/sdk/esp32c3/include/esp-dsp/modules/math/addc/include/dsps_addc.h

@@ -0,0 +1,65 @@
+// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _dsps_addc_H_
+#define _dsps_addc_H_
+#include "dsp_err.h"
+
+#include "dsps_addc_platform.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+/**@{*/
+/**
+ * @brief   add constant
+ *
+ * The function adds constant to the input array
+ * x[i*step_out] = y[i*step_in] + C; i=[0..len)
+ * The implementation use ANSI C and could be compiled and run on any platform
+ *
+ * @param[in] input: input array
+ * @param output: output array
+ * @param len: amount of operations for arrays
+ * @param C: constant value
+ * @param step_in: step over input array (by default should be 1)
+ * @param step_out: step over output array (by default should be 1)
+ *
+ * @return
+ *      - ESP_OK on success
+ *      - One of the error codes from DSP library
+ */
+esp_err_t dsps_addc_f32_ansi(const float *input, float *output, int len, float C, int step_in, int step_out);
+esp_err_t dsps_addc_f32_ae32(const float *input, float *output, int len, float C, int step_in, int step_out);
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#if CONFIG_DSP_OPTIMIZED
+#if (dsps_addc_f32_ae32_enabled == 1)
+#define dsps_addc_f32 dsps_addc_f32_ae32
+#else
+#define dsps_addc_f32 dsps_addc_f32_ansi
+#endif
+#else
+#define dsps_addc_f32 dsps_addc_f32_ansi
+#endif // CONFIG_DSP_OPTIMIZED
+
+#endif // _dsps_addc_H_