forked from espressif/arduino-esp32
Esp32 s3 support (#6341)
Co-authored-by: Jason2866 <24528715+Jason2866@users.noreply.github.com> Co-authored-by: Unexpected Maker <seon@unexpectedmaker.com> Co-authored-by: Rodrigo Garcia <rodrigo.garcia@espressif.com> Co-authored-by: Tomáš Pilný <34927466+PilnyTomas@users.noreply.github.com> Co-authored-by: Pedro Minatel <pedro.minatel@espressif.com> Co-authored-by: Ivan Grokhotkov <ivan@espressif.com> Co-authored-by: Jan Procházka <90197375+P-R-O-C-H-Y@users.noreply.github.com> Co-authored-by: Limor "Ladyada" Fried <limor@ladyada.net>
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -64,7 +64,7 @@ typedef struct {
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unsigned int hsync_idle_low: 1; /*!< The hsync signal is low in IDLE state */
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unsigned int vsync_idle_low: 1; /*!< The vsync signal is low in IDLE state */
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unsigned int de_idle_high: 1; /*!< The de signal is high in IDLE state */
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unsigned int pclk_active_neg: 1; /*!< The display will write data lines when there's a falling edge on PCLK */
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unsigned int pclk_active_neg: 1; /*!< Whether the display data is clocked out at the falling edge of PCLK */
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unsigned int pclk_idle_high: 1; /*!< The PCLK stays at high level in IDLE phase */
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} flags;
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} esp_lcd_rgb_timing_t;
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@ -92,6 +92,8 @@ typedef struct {
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lcd_clock_source_t clk_src; /*!< Clock source for the RGB LCD peripheral */
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esp_lcd_rgb_timing_t timings; /*!< RGB timing parameters */
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size_t data_width; /*!< Number of data lines */
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size_t sram_trans_align; /*!< Alignment for framebuffer that allocated in SRAM */
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size_t psram_trans_align; /*!< Alignment for framebuffer that allocated in PSRAM */
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int hsync_gpio_num; /*!< GPIO used for HSYNC signal */
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int vsync_gpio_num; /*!< GPIO used for VSYNC signal */
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int de_gpio_num; /*!< GPIO used for DE signal, set to -1 if it's not used */
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