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Fixes after idf rebase

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0xFEEDC0DE64
2022-02-24 14:54:57 +01:00
parent 59d3f4bd4f
commit f9d142def6
7 changed files with 27 additions and 26 deletions
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2
cores/esp32/esp32-hal-cpu.c
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@ -49,7 +49,7 @@ typedef struct apb_change_cb_s {
static apb_change_t * apb_change_callbacks = NULL; static apb_change_t * apb_change_callbacks = NULL;
static xSemaphoreHandle apb_change_lock = NULL; static SemaphoreHandle_t apb_change_lock = NULL;
static void initApbChangeCallback(){ static void initApbChangeCallback(){
static volatile bool initialized = false; static volatile bool initialized = false;

4
cores/esp32/esp32-hal-i2c.c
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@ -185,7 +185,7 @@ typedef struct {
struct i2c_struct_t { struct i2c_struct_t {
i2c_dev_t * dev; i2c_dev_t * dev;
#if !CONFIG_DISABLE_HAL_LOCKS #if !CONFIG_DISABLE_HAL_LOCKS
xSemaphoreHandle lock; SemaphoreHandle_t lock;
#endif #endif
uint8_t num; uint8_t num;
int8_t sda; int8_t sda;
@ -1290,7 +1290,7 @@ i2c_err_t i2cProcQueue(i2c_t * i2c, uint32_t *readCount, uint16_t timeOutMillis)
// how many ticks should it take to transfer totalBytes through the I2C hardware, // how many ticks should it take to transfer totalBytes through the I2C hardware,
// add user supplied timeOutMillis to Calculated Value // add user supplied timeOutMillis to Calculated Value
portTickType ticksTimeOut = ((totalBytes*10*1000)/(i2cGetFrequency(i2c))+timeOutMillis)/portTICK_PERIOD_MS; TickType_t ticksTimeOut = ((totalBytes*10*1000)/(i2cGetFrequency(i2c))+timeOutMillis)/portTICK_PERIOD_MS;
i2c->dev->ctr.trans_start=1; // go for it i2c->dev->ctr.trans_start=1; // go for it

2
cores/esp32/esp32-hal-ledc.c
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@ -44,7 +44,7 @@
#else #else
#define LEDC_MUTEX_LOCK() do {} while (xSemaphoreTake(_ledc_sys_lock, portMAX_DELAY) != pdPASS) #define LEDC_MUTEX_LOCK() do {} while (xSemaphoreTake(_ledc_sys_lock, portMAX_DELAY) != pdPASS)
#define LEDC_MUTEX_UNLOCK() xSemaphoreGive(_ledc_sys_lock) #define LEDC_MUTEX_UNLOCK() xSemaphoreGive(_ledc_sys_lock)
xSemaphoreHandle _ledc_sys_lock = NULL; SemaphoreHandle_t _ledc_sys_lock = NULL;
#endif #endif
/* /*

4
cores/esp32/esp32-hal-rmt.c
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@ -109,7 +109,7 @@ struct rmt_obj_s
/** /**
* Internal variables for channel descriptors * Internal variables for channel descriptors
*/ */
static xSemaphoreHandle g_rmt_objlocks[MAX_CHANNELS] = { static SemaphoreHandle_t g_rmt_objlocks[MAX_CHANNELS] = {
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
NULL, NULL, NULL, NULL NULL, NULL, NULL, NULL
@ -136,7 +136,7 @@ static intr_handle_t intr_handle;
static bool periph_enabled = false; static bool periph_enabled = false;
static xSemaphoreHandle g_rmt_block_lock = NULL; static SemaphoreHandle_t g_rmt_block_lock = NULL;
/** /**
* Internal method (private) declarations * Internal method (private) declarations

3
cores/esp32/esp32-hal-sigmadelta.c
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@ -19,6 +19,7 @@
#include "esp32-hal-matrix.h" #include "esp32-hal-matrix.h"
#include "soc/gpio_sd_reg.h" #include "soc/gpio_sd_reg.h"
#include "soc/gpio_sd_struct.h" #include "soc/gpio_sd_struct.h"
#include "freertos/semphr.h"
#include "esp_system.h" #include "esp_system.h"
#ifdef ESP_IDF_VERSION_MAJOR // IDF 4+ #ifdef ESP_IDF_VERSION_MAJOR // IDF 4+
@ -40,7 +41,7 @@
#else #else
#define SD_MUTEX_LOCK() do {} while (xSemaphoreTake(_sd_sys_lock, portMAX_DELAY) != pdPASS) #define SD_MUTEX_LOCK() do {} while (xSemaphoreTake(_sd_sys_lock, portMAX_DELAY) != pdPASS)
#define SD_MUTEX_UNLOCK() xSemaphoreGive(_sd_sys_lock) #define SD_MUTEX_UNLOCK() xSemaphoreGive(_sd_sys_lock)
xSemaphoreHandle _sd_sys_lock; SemaphoreHandle_t _sd_sys_lock;
#endif #endif
static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb, uint32_t new_apb){ static void _on_apb_change(void * arg, apb_change_ev_t ev_type, uint32_t old_apb, uint32_t new_apb){

2
cores/esp32/esp32-hal-spi.c
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@ -47,7 +47,7 @@
struct spi_struct_t { struct spi_struct_t {
spi_dev_t * dev; spi_dev_t * dev;
#if !CONFIG_DISABLE_HAL_LOCKS #if !CONFIG_DISABLE_HAL_LOCKS
xSemaphoreHandle lock; SemaphoreHandle_t lock;
#endif #endif
uint8_t num; uint8_t num;
}; };

36
cores/esp32/wiring_pulse.c
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@ -29,22 +29,22 @@ extern uint32_t xthal_get_ccount();
} }
// max timeout is 27 seconds at 160MHz clock and 54 seconds at 80MHz clock // max timeout is 27 seconds at 160MHz clock and 54 seconds at 80MHz clock
unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout) //unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout)
{ //{
const uint32_t max_timeout_us = clockCyclesToMicroseconds(UINT_MAX); // const uint32_t max_timeout_us = clockCyclesToMicroseconds(UINT_MAX);
if (timeout > max_timeout_us) { // if (timeout > max_timeout_us) {
timeout = max_timeout_us; // timeout = max_timeout_us;
} // }
const uint32_t timeout_cycles = microsecondsToClockCycles(timeout); // const uint32_t timeout_cycles = microsecondsToClockCycles(timeout);
const uint32_t start_cycle_count = xthal_get_ccount(); // const uint32_t start_cycle_count = xthal_get_ccount();
WAIT_FOR_PIN_STATE(!state); // WAIT_FOR_PIN_STATE(!state);
WAIT_FOR_PIN_STATE(state); // WAIT_FOR_PIN_STATE(state);
const uint32_t pulse_start_cycle_count = xthal_get_ccount(); // const uint32_t pulse_start_cycle_count = xthal_get_ccount();
WAIT_FOR_PIN_STATE(!state); // WAIT_FOR_PIN_STATE(!state);
return clockCyclesToMicroseconds(xthal_get_ccount() - pulse_start_cycle_count); // return clockCyclesToMicroseconds(xthal_get_ccount() - pulse_start_cycle_count);
} //}
unsigned long pulseInLong(uint8_t pin, uint8_t state, unsigned long timeout) //unsigned long pulseInLong(uint8_t pin, uint8_t state, unsigned long timeout)
{ //{
return pulseIn(pin, state, timeout); // return pulseIn(pin, state, timeout);
} //}