forked from EFeru/bldc-motor-control-FOC
Fix: Field weakening behavior
- fixed harsh braking when input is released quickly but the motor speed is still high - in this case field weakening behavior follows the current speed.
This commit is contained in:
Binary file not shown.
@ -3,9 +3,9 @@
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*
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*
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* Code generated for Simulink model 'BLDC_controller'.
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* Code generated for Simulink model 'BLDC_controller'.
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*
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*
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* Model version : 1.1296
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* Model version : 1.1297
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Tue Oct 20 17:29:57 2020
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* C/C++ source code generated on : Sun Mar 6 11:02:11 2022
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*
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*
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* Target selection: ert.tlc
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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@ -1019,6 +1019,8 @@ void BLDC_controller_step(RT_MODEL *const rtM)
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int32_T rtb_Sum1_jt;
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int32_T rtb_Sum1_jt;
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int16_T rtb_Merge_m;
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int16_T rtb_Merge_m;
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int16_T rtb_Merge1;
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int16_T rtb_Merge1;
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uint16_T rtb_Divide14_e;
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uint16_T rtb_Divide1_f;
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int16_T rtb_TmpSignalConversionAtLow_Pa[2];
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int16_T rtb_TmpSignalConversionAtLow_Pa[2];
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int32_T rtb_Switch1;
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int32_T rtb_Switch1;
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int32_T rtb_Sum1;
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int32_T rtb_Sum1;
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@ -2116,20 +2118,15 @@ void BLDC_controller_step(RT_MODEL *const rtM)
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/* End of Switch: '<S44>/Switch2' */
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/* End of Switch: '<S44>/Switch2' */
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/* Switch: '<S42>/Switch2' incorporates:
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/* Product: '<S42>/Divide14' incorporates:
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* Constant: '<S1>/z_ctrlTypSel'
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* Constant: '<S42>/r_fieldWeakHi'
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* Constant: '<S42>/CTRL_COMM2'
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* Constant: '<S42>/r_fieldWeakLo'
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* Constant: '<S42>/a_phaAdvMax'
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* Sum: '<S42>/Sum1'
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* Constant: '<S42>/id_fieldWeakMax'
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* Sum: '<S42>/Sum3'
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* RelationalOperator: '<S42>/Relational Operator1'
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*/
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*/
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if (rtP->z_ctrlTypSel == 2) {
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rtb_Divide14_e = (uint16_T)(((int16_T)(DataTypeConversion2 -
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rtb_Saturation1 = rtP->id_fieldWeakMax;
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rtP->r_fieldWeakLo) << 15) / (int16_T)(rtP->r_fieldWeakHi -
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} else {
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rtP->r_fieldWeakLo));
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rtb_Saturation1 = rtP->a_phaAdvMax;
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}
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/* End of Switch: '<S42>/Switch2' */
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/* Switch: '<S43>/Switch2' incorporates:
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/* Switch: '<S43>/Switch2' incorporates:
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* Constant: '<S42>/n_fieldWeakAuthHi'
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* Constant: '<S42>/n_fieldWeakAuthHi'
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@ -2151,25 +2148,53 @@ void BLDC_controller_step(RT_MODEL *const rtM)
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/* End of Switch: '<S43>/Switch2' */
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/* End of Switch: '<S43>/Switch2' */
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/* Product: '<S42>/Divide3' incorporates:
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/* Product: '<S42>/Divide1' incorporates:
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* Constant: '<S42>/n_fieldWeakAuthHi'
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* Constant: '<S42>/n_fieldWeakAuthHi'
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* Constant: '<S42>/n_fieldWeakAuthLo'
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* Constant: '<S42>/n_fieldWeakAuthLo'
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* Constant: '<S42>/r_fieldWeakHi'
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* Constant: '<S42>/r_fieldWeakLo'
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* Product: '<S42>/Divide1'
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* Product: '<S42>/Divide14'
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* Product: '<S42>/Divide2'
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* Sum: '<S42>/Sum1'
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* Sum: '<S42>/Sum2'
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* Sum: '<S42>/Sum2'
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* Sum: '<S42>/Sum3'
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* Sum: '<S42>/Sum4'
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* Sum: '<S42>/Sum4'
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*/
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*/
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rtDW->Divide3 = (int16_T)(((uint16_T)(((uint32_T)(uint16_T)(((int16_T)
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rtb_Divide1_f = (uint16_T)(((int16_T)(rtb_Saturation -
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(DataTypeConversion2 - rtP->r_fieldWeakLo) << 15) / (int16_T)
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rtP->n_fieldWeakAuthLo) << 15) / (int16_T)(rtP->n_fieldWeakAuthHi -
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(rtP->r_fieldWeakHi - rtP->r_fieldWeakLo)) * (uint16_T)(((int16_T)
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rtP->n_fieldWeakAuthLo));
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(rtb_Saturation - rtP->n_fieldWeakAuthLo) << 15) / (int16_T)
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(rtP->n_fieldWeakAuthHi - rtP->n_fieldWeakAuthLo))) >> 15) *
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/* Switch: '<S42>/Switch1' incorporates:
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rtb_Saturation1) >> 15);
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* MinMax: '<S42>/MinMax1'
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* RelationalOperator: '<S42>/Relational Operator6'
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*/
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if (rtb_Divide14_e < rtb_Divide1_f) {
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/* MinMax: '<S42>/MinMax' */
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if (!(rtb_Divide14_e > rtb_Divide1_f)) {
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rtb_Divide14_e = rtb_Divide1_f;
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}
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/* End of MinMax: '<S42>/MinMax' */
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} else {
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if (rtb_Divide1_f < rtb_Divide14_e) {
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/* MinMax: '<S42>/MinMax1' */
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rtb_Divide14_e = rtb_Divide1_f;
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}
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}
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/* End of Switch: '<S42>/Switch1' */
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/* Switch: '<S42>/Switch2' incorporates:
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* Constant: '<S1>/z_ctrlTypSel'
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* Constant: '<S42>/CTRL_COMM2'
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* Constant: '<S42>/a_phaAdvMax'
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* Constant: '<S42>/id_fieldWeakMax'
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* RelationalOperator: '<S42>/Relational Operator1'
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*/
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if (rtP->z_ctrlTypSel == 2) {
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rtb_Saturation1 = rtP->id_fieldWeakMax;
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} else {
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rtb_Saturation1 = rtP->a_phaAdvMax;
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}
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/* End of Switch: '<S42>/Switch2' */
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/* Product: '<S42>/Divide3' */
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rtDW->Divide3 = (int16_T)((rtb_Saturation1 * rtb_Divide14_e) >> 15);
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/* End of Outputs for SubSystem: '<S6>/Field_Weakening_Enabled' */
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/* End of Outputs for SubSystem: '<S6>/Field_Weakening_Enabled' */
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}
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}
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@ -3,9 +3,9 @@
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*
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*
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* Code generated for Simulink model 'BLDC_controller'.
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* Code generated for Simulink model 'BLDC_controller'.
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*
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*
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* Model version : 1.1296
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* Model version : 1.1297
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Tue Oct 20 17:29:57 2020
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* C/C++ source code generated on : Sun Mar 6 11:02:11 2022
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*
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*
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* Target selection: ert.tlc
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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@ -3,9 +3,9 @@
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*
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*
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* Code generated for Simulink model 'BLDC_controller'.
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* Code generated for Simulink model 'BLDC_controller'.
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*
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*
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* Model version : 1.1296
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* Model version : 1.1297
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Tue Oct 20 17:29:57 2020
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* C/C++ source code generated on : Sun Mar 6 11:02:11 2022
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*
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*
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* Target selection: ert.tlc
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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@ -3,9 +3,9 @@
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*
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*
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* Code generated for Simulink model 'BLDC_controller'.
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* Code generated for Simulink model 'BLDC_controller'.
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*
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*
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* Model version : 1.1296
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* Model version : 1.1297
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Tue Oct 20 17:29:57 2020
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* C/C++ source code generated on : Sun Mar 6 11:02:11 2022
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*
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*
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* Target selection: ert.tlc
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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@ -3,9 +3,9 @@
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*
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*
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* Code generated for Simulink model 'BLDC_controller'.
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* Code generated for Simulink model 'BLDC_controller'.
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*
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*
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* Model version : 1.1296
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* Model version : 1.1297
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* Simulink Coder version : 8.13 (R2017b) 24-Jul-2017
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* C/C++ source code generated on : Tue Oct 20 17:29:57 2020
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* C/C++ source code generated on : Sun Mar 6 11:02:11 2022
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*
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*
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* Target selection: ert.tlc
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* Target selection: ert.tlc
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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* Embedded hardware selection: ARM Compatible->ARM Cortex
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Binary file not shown.
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