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fix peters platine

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This commit is contained in:
Peter Poetzi
2020-10-25 02:27:18 +02:00
committed by Peter
parent 75f7451224
commit f232660cc0
3 changed files with 39 additions and 26 deletions
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55
defines.h
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@@ -22,21 +22,41 @@
#pragma once
#include "stm32f1xx_hal.h"
#define LEFT_HALL_U_PIN GPIO_PIN_5
#define LEFT_HALL_V_PIN GPIO_PIN_6
#define LEFT_HALL_W_PIN GPIO_PIN_7
#ifdef PETERS_PLATINE
#define LEFT_HALL_U_PIN GPIO_PIN_12
#define LEFT_HALL_V_PIN GPIO_PIN_11
#define LEFT_HALL_W_PIN GPIO_PIN_10
#define LEFT_HALL_U_PORT GPIOB
#define LEFT_HALL_V_PORT GPIOB
#define LEFT_HALL_W_PORT GPIOB
#define LEFT_HALL_U_PORT GPIOC
#define LEFT_HALL_V_PORT GPIOC
#define LEFT_HALL_W_PORT GPIOC
#define RIGHT_HALL_U_PIN GPIO_PIN_5
#define RIGHT_HALL_V_PIN GPIO_PIN_6
#define RIGHT_HALL_W_PIN GPIO_PIN_7
#define RIGHT_HALL_U_PORT GPIOB
#define RIGHT_HALL_V_PORT GPIOB
#define RIGHT_HALL_W_PORT GPIOB
#else
#define LEFT_HALL_U_PIN GPIO_PIN_5
#define LEFT_HALL_V_PIN GPIO_PIN_6
#define LEFT_HALL_W_PIN GPIO_PIN_7
#define LEFT_HALL_U_PORT GPIOB
#define LEFT_HALL_V_PORT GPIOB
#define LEFT_HALL_W_PORT GPIOB
#define RIGHT_HALL_U_PIN GPIO_PIN_10
#define RIGHT_HALL_V_PIN GPIO_PIN_11
#define RIGHT_HALL_W_PIN GPIO_PIN_12
#define RIGHT_HALL_U_PORT GPIOC
#define RIGHT_HALL_V_PORT GPIOC
#define RIGHT_HALL_W_PORT GPIOC
#endif
#define RIGHT_HALL_U_PIN GPIO_PIN_10
#define RIGHT_HALL_V_PIN GPIO_PIN_11
#define RIGHT_HALL_W_PIN GPIO_PIN_12
#define RIGHT_HALL_U_PORT GPIOC
#define RIGHT_HALL_V_PORT GPIOC
#define RIGHT_HALL_W_PORT GPIOC
#define LEFT_TIM TIM8
#define LEFT_TIM_U CCR1
@@ -44,24 +64,17 @@
#define LEFT_TIM_UH_PORT GPIOC
#define LEFT_TIM_UL_PIN GPIO_PIN_7
#define LEFT_TIM_UL_PORT GPIOA
#define LEFT_TIM_V CCR2
#ifdef PETERS_PLATINE
#define LEFT_TIM_VH_PIN GPIO_PIN_8
#define LEFT_TIM_VL_PIN GPIO_PIN_1
#else
#define LEFT_TIM_VH_PIN GPIO_PIN_7
#define LEFT_TIM_VL_PIN GPIO_PIN_0
#endif
#define LEFT_TIM_VH_PORT GPIOC
#define LEFT_TIM_VL_PORT GPIOB
#define LEFT_TIM_W CCR3
#define LEFT_TIM_WH_PIN GPIO_PIN_8
#define LEFT_TIM_WH_PORT GPIOC
#ifdef PETERS_PLATINE
#define LEFT_TIM_WL_PIN GPIO_PIN_0
#else
#define LEFT_TIM_WL_PIN GPIO_PIN_1
#endif
#define LEFT_TIM_WL_PORT GPIOB
#define RIGHT_TIM TIM1