2015-05-24 06:55:12 +02:00
|
|
|
// Copyright 2010 Dolphin Emulator Project
|
2015-05-18 01:08:10 +02:00
|
|
|
// Licensed under GPLv2+
|
2013-04-17 22:43:11 -04:00
|
|
|
// Refer to the license.txt file included.
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2014-02-10 13:54:46 -05:00
|
|
|
#pragma once
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2011-01-03 10:39:48 +00:00
|
|
|
#include <list>
|
|
|
|
|
|
2014-02-17 05:18:15 -05:00
|
|
|
#include "Common/x64ABI.h"
|
|
|
|
|
#include "Common/x64Emitter.h"
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2014-02-17 05:18:15 -05:00
|
|
|
#include "Core/DSP/DSPCommon.h"
|
|
|
|
|
#include "Core/DSP/Jit/DSPJitRegCache.h"
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2014-02-17 05:18:15 -05:00
|
|
|
#define COMPILED_CODE_SIZE 2097152
|
|
|
|
|
#define MAX_BLOCKS 0x10000
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2011-01-31 04:36:49 +00:00
|
|
|
typedef u32 (*DSPCompiledCode)();
|
2011-01-14 18:00:25 +00:00
|
|
|
typedef const u8 *Block;
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2014-04-09 01:22:52 -05:00
|
|
|
class DSPEmitter : public Gen::X64CodeBlock
|
2010-04-07 15:04:45 +00:00
|
|
|
{
|
|
|
|
|
public:
|
|
|
|
|
DSPEmitter();
|
|
|
|
|
~DSPEmitter();
|
|
|
|
|
|
2011-01-14 18:00:25 +00:00
|
|
|
Block m_compiledCode;
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2010-05-29 18:22:50 +00:00
|
|
|
void EmitInstruction(UDSPInstruction inst);
|
2010-04-07 15:04:45 +00:00
|
|
|
void ClearIRAM();
|
2011-05-30 13:02:05 +00:00
|
|
|
void ClearIRAMandDSPJITCodespaceReset();
|
2010-05-29 18:22:50 +00:00
|
|
|
|
|
|
|
|
void CompileDispatcher();
|
2011-01-14 18:00:25 +00:00
|
|
|
Block CompileStub();
|
2011-01-03 10:39:48 +00:00
|
|
|
void Compile(u16 start_addr);
|
2010-04-07 15:04:45 +00:00
|
|
|
|
2011-04-15 13:04:20 +00:00
|
|
|
bool FlagsNeeded();
|
|
|
|
|
|
2015-10-08 12:45:14 -04:00
|
|
|
void FallBackToInterpreter(UDSPInstruction inst);
|
2010-12-15 01:42:32 +00:00
|
|
|
|
2010-12-03 13:59:14 +00:00
|
|
|
// CC Util
|
2010-12-21 14:48:05 +00:00
|
|
|
void Update_SR_Register64(Gen::X64Reg val = Gen::EAX);
|
2015-02-04 22:18:28 +01:00
|
|
|
void Update_SR_Register64_Carry(Gen::X64Reg val, Gen::X64Reg carry_ovfl, bool carry_eq = false);
|
2010-12-23 15:27:49 +00:00
|
|
|
void Update_SR_Register16(Gen::X64Reg val = Gen::EAX);
|
|
|
|
|
void Update_SR_Register16_OverS32(Gen::X64Reg val = Gen::EAX);
|
2010-12-03 13:59:14 +00:00
|
|
|
|
2010-04-11 18:06:29 +00:00
|
|
|
// Register helpers
|
2010-04-11 20:03:38 +00:00
|
|
|
void setCompileSR(u16 bit);
|
|
|
|
|
void clrCompileSR(u16 bit);
|
2010-10-09 21:43:57 +00:00
|
|
|
void checkExceptions(u32 retval);
|
2010-04-16 10:50:52 +00:00
|
|
|
|
2010-04-07 15:04:45 +00:00
|
|
|
// Memory helper functions
|
|
|
|
|
void increment_addr_reg(int reg);
|
|
|
|
|
void decrement_addr_reg(int reg);
|
2011-02-27 18:04:35 +00:00
|
|
|
void increase_addr_reg(int reg, int ix_reg);
|
2010-04-07 15:04:45 +00:00
|
|
|
void decrease_addr_reg(int reg);
|
2011-02-27 18:04:35 +00:00
|
|
|
void imem_read(Gen::X64Reg address);
|
|
|
|
|
void dmem_read(Gen::X64Reg address);
|
2010-12-16 23:27:38 +00:00
|
|
|
void dmem_read_imm(u16 addr);
|
2011-02-27 18:04:35 +00:00
|
|
|
void dmem_write(Gen::X64Reg value);
|
|
|
|
|
void dmem_write_imm(u16 addr, Gen::X64Reg value);
|
2010-04-19 13:02:24 +00:00
|
|
|
|
|
|
|
|
// Ext command helpers
|
|
|
|
|
void popExtValueToReg();
|
2010-04-19 13:29:05 +00:00
|
|
|
void pushExtValueFromMem(u16 dreg, u16 sreg);
|
2010-11-07 23:43:26 +00:00
|
|
|
void pushExtValueFromMem2(u16 dreg, u16 sreg);
|
|
|
|
|
|
2010-04-07 15:04:45 +00:00
|
|
|
// Ext commands
|
|
|
|
|
void l(const UDSPInstruction opc);
|
|
|
|
|
void ln(const UDSPInstruction opc);
|
|
|
|
|
void ls(const UDSPInstruction opc);
|
|
|
|
|
void lsn(const UDSPInstruction opc);
|
|
|
|
|
void lsm(const UDSPInstruction opc);
|
|
|
|
|
void lsnm(const UDSPInstruction opc);
|
|
|
|
|
void sl(const UDSPInstruction opc);
|
|
|
|
|
void sln(const UDSPInstruction opc);
|
|
|
|
|
void slm(const UDSPInstruction opc);
|
|
|
|
|
void slnm(const UDSPInstruction opc);
|
|
|
|
|
void s(const UDSPInstruction opc);
|
|
|
|
|
void sn(const UDSPInstruction opc);
|
|
|
|
|
void ld(const UDSPInstruction opc);
|
Core/DSP: Split extended opcode 0xc0/mask 0xc0 to account for 0xc3/mask 0xc3 variant
In assembly, these are 'ld $ax0.d,$ax1.r,@$arS with their n,m and nm variants,
which have been special cased for S==3. The regular 'ld can be decomposed
into lrri $ax0.d,@$arS and lrri $ax1.r,@$ar3, while the S==3 case decomposes
to lrri $axR.h,@$arD and lrri $axR.l,@$ar3. The latter variant will be
disassembled to 'ldax $axR,@$arD after this change. The assembler recognizes
both the new 'ldax variant and the old 'ld with @$ar3 but the disassembler
only outputs 'ldax. Besides the readability, this allows for more correct
register use analysis(when it's done).
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7413 8ced0084-cf51-0410-be5f-012b33b47a6e
2011-03-25 22:28:18 +00:00
|
|
|
void ldax(const UDSPInstruction opc);
|
2010-04-07 15:04:45 +00:00
|
|
|
void ldn(const UDSPInstruction opc);
|
Core/DSP: Split extended opcode 0xc0/mask 0xc0 to account for 0xc3/mask 0xc3 variant
In assembly, these are 'ld $ax0.d,$ax1.r,@$arS with their n,m and nm variants,
which have been special cased for S==3. The regular 'ld can be decomposed
into lrri $ax0.d,@$arS and lrri $ax1.r,@$ar3, while the S==3 case decomposes
to lrri $axR.h,@$arD and lrri $axR.l,@$ar3. The latter variant will be
disassembled to 'ldax $axR,@$arD after this change. The assembler recognizes
both the new 'ldax variant and the old 'ld with @$ar3 but the disassembler
only outputs 'ldax. Besides the readability, this allows for more correct
register use analysis(when it's done).
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7413 8ced0084-cf51-0410-be5f-012b33b47a6e
2011-03-25 22:28:18 +00:00
|
|
|
void ldaxn(const UDSPInstruction opc);
|
2010-04-07 15:04:45 +00:00
|
|
|
void ldm(const UDSPInstruction opc);
|
Core/DSP: Split extended opcode 0xc0/mask 0xc0 to account for 0xc3/mask 0xc3 variant
In assembly, these are 'ld $ax0.d,$ax1.r,@$arS with their n,m and nm variants,
which have been special cased for S==3. The regular 'ld can be decomposed
into lrri $ax0.d,@$arS and lrri $ax1.r,@$ar3, while the S==3 case decomposes
to lrri $axR.h,@$arD and lrri $axR.l,@$ar3. The latter variant will be
disassembled to 'ldax $axR,@$arD after this change. The assembler recognizes
both the new 'ldax variant and the old 'ld with @$ar3 but the disassembler
only outputs 'ldax. Besides the readability, this allows for more correct
register use analysis(when it's done).
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7413 8ced0084-cf51-0410-be5f-012b33b47a6e
2011-03-25 22:28:18 +00:00
|
|
|
void ldaxm(const UDSPInstruction opc);
|
2010-04-07 15:04:45 +00:00
|
|
|
void ldnm(const UDSPInstruction opc);
|
Core/DSP: Split extended opcode 0xc0/mask 0xc0 to account for 0xc3/mask 0xc3 variant
In assembly, these are 'ld $ax0.d,$ax1.r,@$arS with their n,m and nm variants,
which have been special cased for S==3. The regular 'ld can be decomposed
into lrri $ax0.d,@$arS and lrri $ax1.r,@$ar3, while the S==3 case decomposes
to lrri $axR.h,@$arD and lrri $axR.l,@$ar3. The latter variant will be
disassembled to 'ldax $axR,@$arD after this change. The assembler recognizes
both the new 'ldax variant and the old 'ld with @$ar3 but the disassembler
only outputs 'ldax. Besides the readability, this allows for more correct
register use analysis(when it's done).
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@7413 8ced0084-cf51-0410-be5f-012b33b47a6e
2011-03-25 22:28:18 +00:00
|
|
|
void ldaxnm(const UDSPInstruction opc);
|
2010-04-07 15:04:45 +00:00
|
|
|
void mv(const UDSPInstruction opc);
|
|
|
|
|
void dr(const UDSPInstruction opc);
|
|
|
|
|
void ir(const UDSPInstruction opc);
|
|
|
|
|
void nr(const UDSPInstruction opc);
|
|
|
|
|
void nop(const UDSPInstruction opc) {}
|
2010-04-11 18:06:29 +00:00
|
|
|
|
2010-11-27 23:40:09 +00:00
|
|
|
// Command helpers
|
|
|
|
|
void dsp_reg_stack_push(int stack_reg);
|
|
|
|
|
void dsp_reg_stack_pop(int stack_reg);
|
2010-12-26 12:34:38 +00:00
|
|
|
void dsp_reg_store_stack(int stack_reg, Gen::X64Reg host_sreg = Gen::EDX);
|
|
|
|
|
void dsp_reg_load_stack(int stack_reg, Gen::X64Reg host_dreg = Gen::EDX);
|
2010-11-27 23:40:09 +00:00
|
|
|
void dsp_reg_store_stack_imm(int stack_reg, u16 val);
|
|
|
|
|
void dsp_op_write_reg(int reg, Gen::X64Reg host_sreg);
|
|
|
|
|
void dsp_op_write_reg_imm(int reg, u16 val);
|
|
|
|
|
void dsp_conditional_extend_accum(int reg);
|
|
|
|
|
void dsp_conditional_extend_accum_imm(int reg, u16 val);
|
2011-09-04 15:37:53 +02:00
|
|
|
void dsp_op_read_reg_dont_saturate(int reg, Gen::X64Reg host_dreg, DSPJitSignExtend extend = NONE);
|
2011-01-14 18:00:25 +00:00
|
|
|
void dsp_op_read_reg(int reg, Gen::X64Reg host_dreg, DSPJitSignExtend extend = NONE);
|
2010-11-27 23:40:09 +00:00
|
|
|
|
2010-04-11 18:06:29 +00:00
|
|
|
// Commands
|
|
|
|
|
void dar(const UDSPInstruction opc);
|
|
|
|
|
void iar(const UDSPInstruction opc);
|
|
|
|
|
void subarn(const UDSPInstruction opc);
|
|
|
|
|
void addarn(const UDSPInstruction opc);
|
|
|
|
|
void sbclr(const UDSPInstruction opc);
|
|
|
|
|
void sbset(const UDSPInstruction opc);
|
|
|
|
|
void srbith(const UDSPInstruction opc);
|
2010-12-15 01:42:32 +00:00
|
|
|
void lri(const UDSPInstruction opc);
|
2010-11-27 23:40:09 +00:00
|
|
|
void lris(const UDSPInstruction opc);
|
|
|
|
|
void mrr(const UDSPInstruction opc);
|
|
|
|
|
void nx(const UDSPInstruction opc);
|
2010-05-29 18:22:50 +00:00
|
|
|
|
2010-12-21 14:48:05 +00:00
|
|
|
// Branch
|
2010-12-26 12:34:38 +00:00
|
|
|
void HandleLoop();
|
2010-12-15 01:42:32 +00:00
|
|
|
void jcc(const UDSPInstruction opc);
|
|
|
|
|
void jmprcc(const UDSPInstruction opc);
|
|
|
|
|
void call(const UDSPInstruction opc);
|
|
|
|
|
void callr(const UDSPInstruction opc);
|
2010-12-27 23:23:53 +00:00
|
|
|
void ifcc(const UDSPInstruction opc);
|
|
|
|
|
void ret(const UDSPInstruction opc);
|
|
|
|
|
void rti(const UDSPInstruction opc);
|
|
|
|
|
void halt(const UDSPInstruction opc);
|
2010-12-26 12:34:38 +00:00
|
|
|
void loop(const UDSPInstruction opc);
|
|
|
|
|
void loopi(const UDSPInstruction opc);
|
|
|
|
|
void bloop(const UDSPInstruction opc);
|
|
|
|
|
void bloopi(const UDSPInstruction opc);
|
2010-12-15 01:42:32 +00:00
|
|
|
|
2010-12-16 23:27:38 +00:00
|
|
|
// Load/Store
|
|
|
|
|
void srs(const UDSPInstruction opc);
|
|
|
|
|
void lrs(const UDSPInstruction opc);
|
|
|
|
|
void lr(const UDSPInstruction opc);
|
|
|
|
|
void sr(const UDSPInstruction opc);
|
|
|
|
|
void si(const UDSPInstruction opc);
|
2010-12-17 03:34:50 +00:00
|
|
|
void lrr(const UDSPInstruction opc);
|
|
|
|
|
void lrrd(const UDSPInstruction opc);
|
|
|
|
|
void lrri(const UDSPInstruction opc);
|
2010-12-28 00:42:00 +00:00
|
|
|
void lrrn(const UDSPInstruction opc);
|
2010-12-17 03:34:50 +00:00
|
|
|
void srr(const UDSPInstruction opc);
|
|
|
|
|
void srrd(const UDSPInstruction opc);
|
|
|
|
|
void srri(const UDSPInstruction opc);
|
2010-12-28 00:42:00 +00:00
|
|
|
void srrn(const UDSPInstruction opc);
|
2010-12-17 03:34:50 +00:00
|
|
|
void ilrr(const UDSPInstruction opc);
|
|
|
|
|
void ilrrd(const UDSPInstruction opc);
|
|
|
|
|
void ilrri(const UDSPInstruction opc);
|
2010-12-28 00:42:00 +00:00
|
|
|
void ilrrn(const UDSPInstruction opc);
|
2010-12-16 23:27:38 +00:00
|
|
|
|
2010-12-09 11:52:31 +00:00
|
|
|
// Arithmetic
|
2010-12-23 15:27:49 +00:00
|
|
|
void clr(const UDSPInstruction opc);
|
|
|
|
|
void clrl(const UDSPInstruction opc);
|
|
|
|
|
void andcf(const UDSPInstruction opc);
|
|
|
|
|
void andf(const UDSPInstruction opc);
|
2010-12-21 14:48:05 +00:00
|
|
|
void tst(const UDSPInstruction opc);
|
2010-12-23 15:27:49 +00:00
|
|
|
void tstaxh(const UDSPInstruction opc);
|
|
|
|
|
void cmp(const UDSPInstruction opc);
|
|
|
|
|
void cmpar(const UDSPInstruction opc);
|
|
|
|
|
void cmpi(const UDSPInstruction opc);
|
|
|
|
|
void cmpis(const UDSPInstruction opc);
|
|
|
|
|
void xorr(const UDSPInstruction opc);
|
|
|
|
|
void andr(const UDSPInstruction opc);
|
|
|
|
|
void orr(const UDSPInstruction opc);
|
|
|
|
|
void andc(const UDSPInstruction opc);
|
|
|
|
|
void orc(const UDSPInstruction opc);
|
|
|
|
|
void xorc(const UDSPInstruction opc);
|
|
|
|
|
void notc(const UDSPInstruction opc);
|
|
|
|
|
void xori(const UDSPInstruction opc);
|
|
|
|
|
void andi(const UDSPInstruction opc);
|
|
|
|
|
void ori(const UDSPInstruction opc);
|
2010-12-09 11:52:31 +00:00
|
|
|
void addr(const UDSPInstruction opc);
|
2010-12-21 14:48:05 +00:00
|
|
|
void addax(const UDSPInstruction opc);
|
|
|
|
|
void add(const UDSPInstruction opc);
|
|
|
|
|
void addp(const UDSPInstruction opc);
|
2010-12-23 15:27:49 +00:00
|
|
|
void addaxl(const UDSPInstruction opc);
|
2010-12-21 14:48:05 +00:00
|
|
|
void addi(const UDSPInstruction opc);
|
|
|
|
|
void addis(const UDSPInstruction opc);
|
|
|
|
|
void incm(const UDSPInstruction opc);
|
|
|
|
|
void inc(const UDSPInstruction opc);
|
|
|
|
|
void subr(const UDSPInstruction opc);
|
|
|
|
|
void subax(const UDSPInstruction opc);
|
|
|
|
|
void sub(const UDSPInstruction opc);
|
|
|
|
|
void subp(const UDSPInstruction opc);
|
|
|
|
|
void decm(const UDSPInstruction opc);
|
|
|
|
|
void dec(const UDSPInstruction opc);
|
|
|
|
|
void neg(const UDSPInstruction opc);
|
|
|
|
|
void abs(const UDSPInstruction opc);
|
|
|
|
|
void movr(const UDSPInstruction opc);
|
|
|
|
|
void movax(const UDSPInstruction opc);
|
|
|
|
|
void mov(const UDSPInstruction opc);
|
2010-12-09 11:52:31 +00:00
|
|
|
void lsl16(const UDSPInstruction opc);
|
2010-12-21 14:48:05 +00:00
|
|
|
void lsr16(const UDSPInstruction opc);
|
|
|
|
|
void asr16(const UDSPInstruction opc);
|
2010-12-09 11:52:31 +00:00
|
|
|
void lsl(const UDSPInstruction opc);
|
2010-12-23 15:27:49 +00:00
|
|
|
void lsr(const UDSPInstruction opc);
|
2010-12-21 14:48:05 +00:00
|
|
|
void asl(const UDSPInstruction opc);
|
2010-12-23 15:27:49 +00:00
|
|
|
void asr(const UDSPInstruction opc);
|
|
|
|
|
void lsrn(const UDSPInstruction opc);
|
|
|
|
|
void asrn(const UDSPInstruction opc);
|
|
|
|
|
void lsrnrx(const UDSPInstruction opc);
|
|
|
|
|
void asrnrx(const UDSPInstruction opc);
|
|
|
|
|
void lsrnr(const UDSPInstruction opc);
|
|
|
|
|
void asrnr(const UDSPInstruction opc);
|
2010-12-09 11:52:31 +00:00
|
|
|
|
2010-12-03 13:59:14 +00:00
|
|
|
// Multipliers
|
|
|
|
|
void multiply();
|
2010-12-04 23:20:31 +00:00
|
|
|
void multiply_add();
|
|
|
|
|
void multiply_sub();
|
2010-12-26 03:12:29 +00:00
|
|
|
void multiply_mulx(u8 axh0, u8 axh1);
|
2010-12-03 13:59:14 +00:00
|
|
|
void clrp(const UDSPInstruction opc);
|
|
|
|
|
void tstprod(const UDSPInstruction opc);
|
|
|
|
|
void movp(const UDSPInstruction opc);
|
|
|
|
|
void movnp(const UDSPInstruction opc);
|
|
|
|
|
void movpz(const UDSPInstruction opc);
|
2010-12-26 03:12:29 +00:00
|
|
|
void addpaxz(const UDSPInstruction opc);
|
2010-12-03 13:59:14 +00:00
|
|
|
void mulaxh(const UDSPInstruction opc);
|
|
|
|
|
void mul(const UDSPInstruction opc);
|
2010-12-04 23:20:31 +00:00
|
|
|
void mulac(const UDSPInstruction opc);
|
2010-12-03 13:59:14 +00:00
|
|
|
void mulmv(const UDSPInstruction opc);
|
|
|
|
|
void mulmvz(const UDSPInstruction opc);
|
2010-12-26 03:12:29 +00:00
|
|
|
void mulx(const UDSPInstruction opc);
|
|
|
|
|
void mulxac(const UDSPInstruction opc);
|
|
|
|
|
void mulxmv(const UDSPInstruction opc);
|
|
|
|
|
void mulxmvz(const UDSPInstruction opc);
|
2010-12-03 13:59:14 +00:00
|
|
|
void mulc(const UDSPInstruction opc);
|
2010-12-04 23:20:31 +00:00
|
|
|
void mulcac(const UDSPInstruction opc);
|
|
|
|
|
void mulcmv(const UDSPInstruction opc);
|
|
|
|
|
void mulcmvz(const UDSPInstruction opc);
|
2010-12-23 15:27:49 +00:00
|
|
|
void maddx(const UDSPInstruction opc);
|
|
|
|
|
void msubx(const UDSPInstruction opc);
|
2010-12-04 23:20:31 +00:00
|
|
|
void maddc(const UDSPInstruction opc);
|
|
|
|
|
void msubc(const UDSPInstruction opc);
|
|
|
|
|
void madd(const UDSPInstruction opc);
|
|
|
|
|
void msub(const UDSPInstruction opc);
|
2010-12-03 13:59:14 +00:00
|
|
|
|
2010-11-28 05:28:21 +00:00
|
|
|
// CALL this to start the dispatcher
|
|
|
|
|
const u8 *enterDispatcher;
|
2011-02-27 18:04:35 +00:00
|
|
|
const u8 *reenterDispatcher;
|
2011-01-10 03:03:03 +00:00
|
|
|
const u8 *stubEntryPoint;
|
2011-01-16 06:24:48 +00:00
|
|
|
const u8 *returnDispatcher;
|
2010-12-15 01:42:32 +00:00
|
|
|
u16 compilePC;
|
2010-12-29 04:34:33 +00:00
|
|
|
u16 startAddr;
|
2011-01-14 18:00:25 +00:00
|
|
|
Block *blockLinks;
|
2010-12-29 04:34:33 +00:00
|
|
|
u16 *blockSize;
|
2011-03-22 07:27:23 +00:00
|
|
|
std::list<u16> unresolvedJumps[MAX_BLOCKS];
|
2011-01-14 18:00:25 +00:00
|
|
|
|
|
|
|
|
DSPJitRegCache gpr;
|
2010-05-29 18:22:50 +00:00
|
|
|
private:
|
2011-01-31 04:36:49 +00:00
|
|
|
DSPCompiledCode *blocks;
|
2011-01-14 18:00:25 +00:00
|
|
|
Block blockLinkEntry;
|
2010-05-29 18:22:50 +00:00
|
|
|
u16 compileSR;
|
|
|
|
|
|
|
|
|
|
// The index of the last stored ext value (compile time).
|
|
|
|
|
int storeIndex;
|
2010-11-07 23:43:26 +00:00
|
|
|
int storeIndex2;
|
2013-10-29 01:23:17 -04:00
|
|
|
|
2010-05-29 21:34:34 +00:00
|
|
|
// Counts down.
|
|
|
|
|
// int cycles;
|
|
|
|
|
|
2010-12-21 14:48:05 +00:00
|
|
|
void Update_SR_Register(Gen::X64Reg val = Gen::EAX);
|
|
|
|
|
|
|
|
|
|
void get_long_prod(Gen::X64Reg long_prod = Gen::RAX);
|
|
|
|
|
void get_long_prod_round_prodl(Gen::X64Reg long_prod = Gen::RAX);
|
2010-12-03 13:59:14 +00:00
|
|
|
void set_long_prod();
|
2010-12-23 15:27:49 +00:00
|
|
|
void round_long_acc(Gen::X64Reg long_acc = Gen::EAX);
|
2010-12-21 14:48:05 +00:00
|
|
|
void set_long_acc(int _reg, Gen::X64Reg acc = Gen::EAX);
|
2011-01-14 18:00:25 +00:00
|
|
|
void get_acc_h(int _reg, Gen::X64Reg acc = Gen::EAX, bool sign = true);
|
2015-06-04 14:06:22 -04:00
|
|
|
void set_acc_h(int _reg, const Gen::OpArg& arg = R(Gen::EAX));
|
2011-01-14 18:00:25 +00:00
|
|
|
void get_acc_m(int _reg, Gen::X64Reg acc = Gen::EAX, bool sign = true);
|
2015-06-04 14:06:22 -04:00
|
|
|
void set_acc_m(int _reg, const Gen::OpArg& arg = R(Gen::EAX));
|
2011-01-14 18:00:25 +00:00
|
|
|
void get_acc_l(int _reg, Gen::X64Reg acc = Gen::EAX, bool sign = true);
|
2015-06-04 14:06:22 -04:00
|
|
|
void set_acc_l(int _reg, const Gen::OpArg& arg = R(Gen::EAX));
|
2010-12-21 14:48:05 +00:00
|
|
|
void get_long_acx(int _reg, Gen::X64Reg acx = Gen::EAX);
|
2010-12-23 15:27:49 +00:00
|
|
|
void get_ax_l(int _reg, Gen::X64Reg acx = Gen::EAX);
|
|
|
|
|
void get_ax_h(int _reg, Gen::X64Reg acc = Gen::EAX);
|
2010-12-21 14:48:05 +00:00
|
|
|
void get_long_acc(int _reg, Gen::X64Reg acc = Gen::EAX);
|
2010-12-03 13:59:14 +00:00
|
|
|
};
|